1
LOC (LEAD ON CHIP) PACKAGE AND
FABRICATING METHOD THEREOF
BACKGROUND OF THE INVENTION
1. Field of the Invention 5 The present invention relates to a an LOC (Lead On Chip)
package and a fabricating method thereof adopting a coating process to reduce the area taken up by a molding resin.
2. Description of the Prior Art 10 Recently, according to a tendency of enlargement in chip
size, an LOC (Lead On Chip) structure is being developed to increase an occupation area of the chip, which is inevitably required.
For a brief explanation of LOC packaging, 15 conventionally, the normal package has an inner structure whereby an adhesive material for die attaching is mounted on a paddle of a lead frame, on which a semiconductor chip is mounted and wire-bonded. Comparatively, the LOC package has a structure that a polyimide tape both surfaces of 20 which are coated with an adhesive material is mounted on a semiconductor chip, to which the inner leads of a lead frame are mounted and wire-bonded.
For instance, a conventional LOC package has the following structure. First, a lead frame as shown in FIG. 1 is 25 used for the conventional LOC package.
Reference numeral 1 denotes a guide rail. A plurality of lead frames 10 are formed spaced within the pair of guide rails 1. And, a plurality of two-sided adhesive tapes 3 are attached to the inner leads 2 of each lead frame 10. A semiconductor chip 4 is attached on the two-sided adhesive tape 3. Bonding pads (not shown) of the semiconductor chip
4 are electrically connected to the inner leads 2 by using bonding wire 5.
35
The semiconductor chip 4, the inner leads 2 and the wires
5 are sealed by an encapsulating resin 6, as shown in FIG. 2. And then, dam bars 8 and the guide rails 1 of the lead frame 10 are trimmed and outer leads 9 (referring to FIG. 2) are formed, so as to complete formation of the LOC pack- 4Q age.
However, as to the LOC package as constructed above, since, after it is sealed with a resin molding, the guide rails and the dam bars of the lead frame are trimmed and the outer leads are formed, its overall process becomes complicated. 45 In addition, a transfer molding needs to be performed, requiring equipment having an additional tray, disadvantageously resulting in an increase in production cost.
SUMMARY OF THE INVENTION
50
Therefore, an object of the present invention is to provide an LOC semiconductor package and a fabrication method therefor capable of reducing a unit cost of the package and of simplifying the manufacturing process by adopting a coating process without requiring a trimming/forming step 55 nor a resin sealing step.
In order to attain the above object, there is provided an LOC semiconductor package including a semiconductor chip; first two-sided tapes attached to the semiconductor chip at first and third end portions of the semiconductor chip, 60 wherein the first and third end portions of the semiconductor chip are respectively in opposite sides; second two-sided tapes attached to the first two-sided tapes; a lead frame having a step that includes a plurality of first portions and second portions, and being upwardly bent from the first 65 portions to the second portions attached to the first and second two-sided tapes; a plurality of wires connecting the
2
semiconductor chip to the first portions of the lead frame, respectively; insulating films attached to the semiconductor chip at second and fourth end portions of the semiconductor chip, wherein the second and fourth end portions are respectively in opposite sides; and a coating fluid covering a portion of the semiconductor chip, the first portions of the lead frame, and a portion of the second two-sided tapes and the wires.
In order to obtain the above object, there is also provided a method for fabricating an LOC package including the steps of: forming an LOC lead frame having a step including a plurality of first portions and second portions and being upwardly bent from first portions to second portions; attaching second two-sided tapes to the second base part of the lead frame and first two-sided tapes to the first base part of the lead frame and upper surfaces of the second two-sided tapes; attaching a semiconductor chip to second two-sided tapes; wire-bonding a plurality of pads of the semiconductor chip to the plurality of first portions of the lead frame, respectively; and potting to inject a coating fluid into the lead frame.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a plan view of a lead frame of a conventional LOC package;
FIG. 2 is a schematic cross-sectional view of the conventional LOC package;
FIG. 3 is a plan view of a lead frame of an LOC package in accordance with the present invention; and
FIG. 4 is a cross-sectional view of the LOC package in accordance with the present invention.
DETAILED DESCRIPTION OF THE
INVENTION
A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 3 is a plan view of an LOC package having removed coating fluid 28 from the LOC package in accordance with the embodiment of the present invention. As shown in FIG. 3, respective first two-sided tapes 24 and second two-sided tapes 23 differing in size are attached on predetermined portions of a lead frame 22. That is, the first two-sided tapes 24 and the second two-sided tapes 23 are attached by being formed as two layers so as to correspond to the form of the lead frame 22. Insulating films 26, which can be made of two-sided tapes, is attached to the semiconductor chip at two end portions of the semiconductor 20 in order to prevent flowing of a coating fluid 28 (not shown in FIG. 3) to adjacent semiconductor chip 20. The coating fluid 28 is shown in FIG. 4. Wires 27 are formed to connect a plurality of first portions 29 of the lead frame to a plurality of pads (not shown) of semiconductor chip 20, respectively. The line b-b' is a trim line to separate the LOC package. Description of the other structures of the LOC package which are similar to those of the conventional art is omitted here.
FIG. 4 is a cross-sectional view along the line of a-a' of FIG. 3 of the LOC package in accordance with the present invention, which includes, as its main components, the semiconductor chip 20; two first two-sided tapes 24 and second two-sided tapes 23 each being attached to predetermined portions of the semiconductor chip 20 in the form of layers; the lead frame 22 being formed to have a a step including a plurality of first portions and second portions and to be upwardly bent from first portions 29 to second
