An architecture for a serial multi-chip package digital controller including a controller oriented processor die and a separate non-volatile memory die. The architecture provides for a low pin count on the package, minimal electrical connections on and between the dice, and a minimal number of registers...http://www.google.se/patents/US5613144?utm_source=gb-gplus-sharePatent US5613144 - Serial register multi-input multiplexing architecture for multiple chip processor
