The present invention provides a method and apparatus for increasing the vector rate of an integrated circuit test system and simplifying the wiring of the tester to the device under test. The tester incorporates circuitry that allows the CPU to remap assignments of tester channels in the CPU address...http://www.google.se/patents/US6076179?utm_source=gb-gplus-sharePatent US6076179 - Method and apparatus of increasing the vector rate of a digital test system
