WO2009075530A2

WO2009075530A2 - Semiconductor and manufacturing method thereof

Info

Publication number: WO2009075530A2
Application number: PCT/KR2008/007332
Authority: WO
Inventors: Yeunho Bang; Junseung Baek; Wongil Choi; Myungyeol Lee
Original assignee: Amoleds Co., Ltd.
Priority date: 2007-12-13
Filing date: 2008-12-11
Publication date: 2009-06-18
Also published as: WO2009075530A3

Abstract

Semiconductor package includes: a substrate having a cavity in which a light-emitting device mounting region is formed; a light-emitting device mounted in the light-emitting device mounting region; and a white reflection layer that is formed in the cavity and covers a bottom surface and an inner side wall of the cavity around the light-emitting device. The reflection layer includes at least one of TiO2, ZnO, lithopone, ZnS, BaS04, SiO2. PTFE (poly tetrafluoroe thy lene), the main materials being added by 5 to 60 wt%.

Description

SEMICONDUCTOR AND MANUFACTURING METHOD

THEREOF

Technical Field

[1] The present invention relates to a semiconductor package and a manufacturing method thereof, and more specifically, to a semiconductor package using a white reflection material having high reflectivity and a manufacturing method thereof. Background Art

[2] A light emission diode (hereinafter, referred to as an LED) is a semiconductor device that can form light emitting source by changing compound semiconductor materials such as GaAs, AlGaAs, GaN, InGaN, AlGaInP, etc. in order to implement various colors. The semiconductor device in a package form has been mainly used for electronic devices. Referring to FIGS. l(a) and l(b), package structures of a typical lamp type LED and a surface mounting type LED are compared with each other. FIG. l(a) shows a structure of a lamp type LED package 10. FIG. l(b) shows a structure of a surface mounting type LED package 20,

[3] In the lamp type LED package 10, an upper portion of one (for example, 3b) of two lead frames 3a and 3b has a cup-shaped metal electrode surface. An LED device 5 is mounted on the upper portion of the metal electrode surface of the lead frame 3b. The lamp type LED package 10 is packaged by a semispherical case 7 made of transparent molding resins.

[4] On the other hand, the surface mounting type LED package 20 has a package 11 made of molding epoxy resins. The surface mounting type LED package 20 is formed in a structure where an LED device 15 is disposed in a mounting region having a small profile angle and is connected with pattern electrodes (not shown) by a wire 13.

[5] By the package structure, in the lamp type LED package 10 the semispherical case 7 performs a role of a lens. In particular, the lamp type LED package 10 can increase luminance in the range of a predetermined angle by controlling a luminance distribution to be narrow and can increase luminance strength by reflecting light from the light emitting source from the cup-shaped metal electrode surface.

[6] To the contrary, the surface mounting type LED package 20 has a wide luminance distribution by the package but a low luminance distribution. As such, the luminance is significantly affected by the package structure. As a result, there has been proposed an LED package (see FIG. 2) capable of improving luminance efficacy even to some extent by applying various plating technologies or attaching a thin metal reflector to an inclined cavity or a vertical cutting surface around the LED device occurring when preparing an inner mounting space using a ceramic substrate.

[7] The LED package shown in FIG. 2 has a top surface on which a mounting region 103 of an LED device 105 is formed and is configured to include a first ceramic substrate 101 where a predetermined conductive pattern is formed around the mounting region 103; at least one LED device 105 that is disposed in the mounting region 103 and connected with a predetermined conductive pattern electrode by a wire 107; a second ceramic substrate 102 that is stacked on the first ceramic substrate 101 and has a cavity formed in a region corresponding to the mounting region 103; and a metal reflector 120 that is formed in the cavity of the second ceramic substrate 102 to surround the LED device 105, wherein a projection 120a is formed on an upper portion of the second ceramic substrate 102 such that the metal reflector 120 is locked to the upper portion of the second ceramic substrate 102.

[8] In the LED package of FIG. 2, the metal reflector 120 should be manufactured and attached separately. Due to the use of the metal reflector 120, the reflectivity can be increased to seme degree. However, a separate process for manufacturing the metal reflector is needed.

[9] Also, since the manufactured metal reflector 120 should be manually disposed in the cavity of the second ceramic substrate 102, much time is consuned.

[10] Further, in order to maintain the metal reflector 120 at a right position within the cavity, an adhesion member (not shown) in addition to the projection 120a should be used. When the adhesion member is wrongly used, a partial separation between the ceramic substrate and the metal reflector 120 may occur, such that a desired light orientation angle cannot be obtained.

[11] As such, when the metal reflector 120 is used, the reflectivity increases, but the manufacturing process of the package is complicated and the error rate of the product increases.

Disclosure of Invention Technical Problem

[12] The present invention proposes to solve the above^nentioned problems. It is an object of the present invention to provide a semiconductor package that can use a reflection material having high reflectivity as a material of a reflection layer instead of a reflector of a metal material to simply its manufacturing and increase efficacy and a manufacturing method thereof.

[13] It is another object of the present invention to provide a semiconductor package that can be applied in various forms, have a function of preventing static electricity, and minimize a loss of luninous flux.

[14] It is still another object of the present invention to provide a semiconductor package that can be applied in various forms and improve efficacy as compared to the related art without performing a separate plating process.

[15] It is yet still another object of the present invention to provide a semiconductor package that can be applied in various forms and more easily improve the luminous flux of emitted warm white light.

[16] It is further still another object of the present invention to provide a semiconductor package that can be applied in various forms and more easily improve a color rendering index of emitted white light. Technical Solution

[17] In order to achieve the above objects, there is provided a semiconductor package according to an exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a light-emitting device mounted in the light-emitting device mounting region; and a white reflection layer that is formed in the cavity and covers a bottom surface and an inner side wall of the cavity around the light-emitting device.

[18] The reflection layer is rounded inwardly and includes a white resin.

[19] The reflection layer includes at least one of TiO2, ZnO, and lithopone.

[20] The reflection layer includes one of TiO2, ZnO, and lithopone as main materials, wherein the main materials are added by 5 to 25 wt%. In this case, the reflection layer uses sub-materials, which is silicon resin of 30 to 50 wt% and epoxy resin of 25 to 65 wt%, together with the main materials.

[21] The reflection layer includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4,

SiO2. PTFE (polytetrafluoroethylene).

[22] The reflection layer includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4,

SiO2. PTFE (polytetrafluoroethylene), wherein the main materials are added by 5 to 60 wt%. In this case, the reflection layer uses sub^riaterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. Unlike this, the reflection layer uses of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials.

[23] One of a transparent silicon layer and a phosphor layer may further be formed on the upper portion of the reflection layer.

[24] The semiconductor package further includes an electrode that is formed at a bottom surface of the cavity and has the light-emitting device mounted on the top surface thereof, wherein the reflection layer is formed to expose the top surface of the electrode. Preferably, the shape of the electrode is the same as the shape of the cavity.

[25] The semiconductor package further includes a dam formed to surround the light- emitting device mounting region. Preferably, the shape of the dam is the same as the shape of the cavity.

[26] The semiconductor package further includes an electrode that is formed at the bottom surface of the cavity on the substrate and has the light-emitting device mounted the top surface thereof and the dam is formed on the top surface of the electrode.

[27] The semiconductor package may further include a separate electrode formed at the bottom surface of the cavity to be spaced from the electrode. In this case, the reflection layer is formed to cover the separate electrode. Unlike this, the reflection layer is formed to expose the top surface of the separate electrode.

[28] The light-emitting device is configured of one or more LED chip.

[29] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate formed with an electrode on which a light-emitting device is mounted; and a white reflection layer formed in the remaining region other than the light-emitting device mounting region on the top surface of the substrate.

[30] The reflection layer is formed flat.

[31] The reflection layer is formed to expose the top surface of the electrode and to contact the edge of the electrode.

[32] The semiconductor package may further include a separate substrate having a cavity that surrounds the light-emitting device mounting region.

[33] There is provided a substrate for a semiconductor package according to an exemplary embodiment of the present invention comprising: a ZnO-based varistor substrate on which an internal electrode and an external electrode are formed,

[34] wherein the external electrode is formed on a portion of the top surface and bottom surface of the varistor substrate via an insulating layer and the external electrode is electrically connected to the internal electrode through the insulating layer and the white reflection layer is formed in the remaining region other than some regions where a light-emitting device is positioned on the top surface of the varistor substrate.

[35] The insulating layer includes at least one of BaO, CaO, K2O, and ZnO. [36] The insulating layer includes BaO of 3 to 9 wt%, CaO of 9 to 15 wt%, K2O of 3 to 9 wt%, and ZnO of 3 to 10 wt% as main materials.

[37] The insulating layer uses a sub^naterial, which are a mixture of A12O3 of 5 to 9 wt%, SiO2 of 50 to 65 wt%, TiO2 of 1 to 5 wt%, and B2O3 of 2 to 6 wt%, together with the main materials.

[38] The reflection layer is formed flat or rounded inwardly.

[39] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a ZnO-based varistor substrate on which an internal electrode and an external electrode are formed; and a light-emitting device mounted on the upper surface of the varistor substrate,

[40] wherein the external electrode is formed on a portion of the top surface and bottom surface of the varistor substrate via an insulating layer and the external electrode is electrically connected to the internal electrode through the insulating layer and a white reflection layer is formed in the remaining region other than some regions where the light-emitting device is positioned on the top surface of the varistor substrate.

[41] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity on which a light-emitting device is mounted; an electric element that is mounted on the cavity and is other than the light-emitting device; and a white reflection layer that is formed in the remaining region other than the light-emitting device mounting region in the cavity and covers the electric element.

[42] The electric element is an electric element protecting the light-emitting device from an ESD.

[43] The reflection layer is rounded inwardly.

[44] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity formed with a light-emitting device mounting region; and a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region,

[45] wherein the reflection layer includes inorganic pigments having colors meeting colors emitted from the light-emitting device and white reflection materials.

[46] The reflection layer is rounded inwardly.

[47] In the case where the color emitted from the light-emitting device is red, the inorganic pigment is a red series ceramic pigment and the white reflection material include at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (poly tetrafluoroethylene) .

[48] In the case where the color emitted from the light-emitting device is red, the inorganic pigment is a red series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (poly tetrafluoroethylene) as main materials, wherein the main materials are added by 5 to 60 wt%.

[49] The white reflection material uses sub^naterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. Unlike this, the white reflection materials use sub^naterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials.

[50] In the case where the color emitted from the light-emitting device is green, the inorganic pigment is a green series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (poly tetrafluoroethylene) .

[51] In the case where the color emitted from the light-emitting device is green, the inorganic pigment is a green series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (poly tetrafluoroethylene) as main materials, wherein the main materials are added by 5 to 60 wt%.

[52] The white reflection material uses sub^naterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. Unlike this, the white reflection material use sub^riaterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials.

[53] In the case where the color emitted from the light-emitting device is blue, the inorganic pigment is a blue series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (poly tetrafluoroethylene) .

[54] In the case where the color emitted from the light-emitting device is blue, the inorganic pigment is a blue series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (poly tetrafluoroethylene) as main materials, wherein the main materials are added by 5 to 60 wt%.

[55] The white reflection material uses sub^naterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. Unlike this, the white reflection material use sub^riaterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials.

[56] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; and a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region, wherein the reflection layer includes inorganic pigments having colors meeting colors emitted from the light-emitting device and white reflection materials.

[57] The reflection layer is formed flat.

[58] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and yellow inorganic pigments.

[59] The reflection layer is rounded inwardly.

[60] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and dark brown inorganic pigments.

[61] The reflection layer is rounded inwardly.

[62] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and yellow inorganic pigments.

[63] The reflection layer is formed flat. [64] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and dark brown inorganic pigments.

[65] The reflection layer is formed flat.

[66] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red series inorganic pigments.

[67] The reflection layer is rounded inwardly.

[68] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red phosphors.

[69] The reflection layer is rounded inwardly.

[70] In the reflection layer, the white reflection material of 1 to 99 wt% and the red phosphor of 1 to 99 wt% are mixed.

[71] In the reflection layer, the white reflection material of 80 to 94 wt% and the red phosphor of 6 to 20 wt% are mixed.

[72] In the reflection layer, the red phosphor is 100 to 200 wt% with respect to the white reflection material.

[73] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; and a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red series inorganic pigments.

[74] The reflection layer is formed flat.

[75] There is provided a semiconductor package according to another exemplary embodiment of the present invention comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; and a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red phosphors.

[76] The reflection layer is formed flat.

[77] In the reflection layer, the white reflection material of 1 to 99 wt% and the red phosphor of 1 to 99 wt% are mixed.

[78] In the reflection layer, the white reflection material of 80 to 94 wt% and the red phosphor of 6 to 20 wt% are mixed.

[79] In the reflection layer, the red phosphor is 100 to 200 wt% with respect to the white reflection material.

[80] There is provided with a manufacturing method of a semiconductor package according to an exemplary embodiment of the present invention comprising: preparing a substrate having a cavity; mounting a light-emitting device in a light-emitting device mounting region within a cavity; and forming a white reflection layer that is formed in the cavity and covers a bottom surface and an inner side wall of the cavity around the light-emitting device.

[81] The forming the reflection layer forms the reflection layer so as to have an inwardly rounded shape.

[82] The manufacturing method of a semiconductor package further includes forming a dam that surrounds the light-emitting device mounting region, prior to the forming the reflection layer.

[83] The preparing the substrate includes forming an electrode whose top surface is the light-emitting device mounting region on the bottom surface of the cavity.

[84] The forming the reflection layer forms the reflection layer prior to mounting the light-emitting device on the electrode.

[85] The forming the reflection layer forms the reflection layer after mounting the light- emitting device on the electrode. [86] There is provided with a manufacturing method of a semiconductor package according to an exemplary embodiment of the present invention comprising: preparing a substrate on which an electrode having a light-emitting device mounted thereon; and forming a white reflection layer in the remaining region other than a region where the light-emitting device is mounted on the top surface of the substrate.

[87] The forming the reflection layer forms the reflection layer to be flat.

[88] The forming the reflection layer forms the reflection layer to expose the top surface of the electrode and contact to an edge of the electrode.

[89] There is provided with a manufacturing method of a semiconductor package according to an exemplary embodiment of the present invention comprising: a first step preparing a lower substrate; a second step forming a white reflector having an inwardly rounded cavity whose center is perforated by injecting white reflection materials into a forming mold by a transfer molding; and a third step bonding the white reflector to the upper surface of the lower substrate.

[90] The first step includes forming an electrode pattern on the top surface of the lower substrate.

[91] In the first step, the materials of the lower substrate is any one of metal, ceramic, varistor, and plastic.

[92] The manufacturing method of a semiconductor package further includes mounting one or more LED chip on the lower substrate.

[93] There is provided with a manufacturing method of a semiconductor package according to an exemplary embodiment of the present invention comprising: forming a laminate where a plurality of sheets having a plurality of unit element regions are stacked; forming a cutting groove having a predetermined depth at the top surface and bottom surface of the laminate based on a border of the unit element regions; forming an insulating layer on the top surface of the laminate; sintering the laminate on which the insulating layer is formed; forming the electrode on the top surface of the sintered laminate; and after forming the electrode, separating the sintered laminate into each unit element by using the cutting groove.

[94] The plurality of sheets includes a varistor material.

[95] The forming the cutting groove forms the cutting groove to have a V-letter shape.

[96] The forming the insulating layer forms the insulating layer for each unit element region.

[97] There is provided with a manufacturing method of a semiconductor package according to another exemplary embodiment of the present invention comprising: forming a laminate where a plurality of sheets having a plurality of unit element regions are stacked; forming a cutting groove having a predetermined depth at the top surface and bottom surface of the laminate based on a border of the unit element regions; forming an insulating layer on the top surface of the laminate; sintering the laminate on which the insulating layer is formed; forming the electrode on the top surface of the sintered laminate; forming a white reflection layer in the remaining region other than a portion where the light-emitting device is mounted on the top surface of the laminate after forming the electrode; mounting the light-emitting device on the top surface of the laminate; bonding a substrate having a cavity on the upper portion of the laminate; and separating into each unit element by using the cutting groove.

[98] The forming the reflection layer forms the reflection layer to be flat.

[99] There is provided with a manufacturing method of a semiconductor package according to another exemplary embodiment of the present invention comprising: forming a laminate where a plurality of sheets having a plurality of unit element regions are stacked; forming a cutting groove having a predetermined depth at the top surface and bottom surface of the laminate based on a border of the unit element regions; forming an insulating layer on the top surface of the laminate; sintering the laminate on which the insulating layer is formed; forming the electrode on the top surface of the sintered laminate; mounting the light-emitting device on the top surface of the laminate; bonding a substrate having a cavity on the upper portion of the laminate; forming a white reflection layer in the cavity to cover the inner side wall and bottom surface of the cavity and in a portion other than a region where the light- emitting device is mounted on the top surface of the laminate after forming the electrode; and separating into each unit element by using the cutting groove.

[100] The forming the reflection layer forms the reflection layer so as to have an inwardly rounded shape.

Advantageous Effects

[101] The present invention configured as described above has the following effects. [102] 1. The reflection layer is formed to be connected to the side surface of the LED chip and the inner side wall of the cavity by dispensing the white reflection materials around the light-emitting device, such that the metal reflector in the related art is not needed. [103] 2. The light reflection is made by the inwardly rounded reflection layer without using the metal reflector, such that the manufacturing process of the package is very simple. [104] 3. The white reflection layer is filled up to the bottom surface of the cavity, such that there is no loss of light, thereby increasing the efficacy as compared to the related art. As a result, the efficacy is improved as compared to the package structure in the related art.

[105] 4. Due to the above-mentioned effects, when measuring the LUX value per a distance, the uniformity is improved.

[105] 5. The rounded border of the filler is certain by the electrode on which the LED chip is mounted. The rounded border of the reflection layer is more certain by forming the dam to surround the light-emitting device mounting region.

[107] 6. If the size of the electrode or the size of the dam are changed, the filling region of the reflection layer and the curvature of the reflection layer can be controlled. Thereby, the control of the orientation angle can be controlled.

[108] 7. The reflection layer formed on the substrate has insulating property, such that there is no need to consider the spaced value between the electrode and the reflector as in the related art. Thereby, the manufacturing process is very simple as well as since the short between the electrode and the reflector does not occur, the defect rate of the product is reduced.

[109] 8. The portion where the plurality LED chips are mounted on the substrate is covered with the white reflection material having small light absorbance and good reflectivity, such that the reflector can be simply manufactured as compared to the manufacturing process of the reflector (including the metal reflector) in the multi-chip package in the related art. The loss of light is significantly reduced as compared to the multi-chip package in the related art to improve the efficacy.

[110] 9. In the substrate having the cavity formed with the region where the plurality of LED chips are mounted, the inner side wall and bottom surface (except for the electrode portion) of the cavity is covered to be rounded inwardly with the white reflection material having small light absorbance and good reflectivity, such that there is no need the reflector in the related art. In this case, light emitted from the plurality of LED chips is almost all reflected, such that the loss of light is significantly reduced as compared to the multi-chip package in the related art, thereby maximizing the efficacy.

[I l l] 10. The sheet for the white reflector is manufactured by the transfer molding, such that the plurality of reflectors can be quickly and accurately manufactured. This is achieved without the separate plating process as well as makes the entire process simple and reduces the defect rate.

[112] 11. The insulating layer is formed on the top surface and bottom surface of ZnO- based varistor substrate and the top surface electrode and the bottom surface electrode is then formed, such that the insulating layer prevents the erosion phenomenon of the surface of the varistor due to the plating liquid. Thereby, the adhesion between the top surface electrode and the varistor substrate and the adhesion between the bottom surface electrode and the varistor substrate are improved.

[113] 12. The insulating layer prevents the electrical short between the top surface electrode and the bottom surface electrode at the time of forming the electrode by the plating and prevents the peeling of the electrode at the time of performing the wire bonding.

[114] 13. The reflection layer is manufactured by selecting the white TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2, and polytetrafluoroethylene (PTFE), and the like, which have a small light absorbance and good reflectivity, such that light is little absorbed in the visible ray region as well as light emitted from the light-emitting device is almost all reflected, thereby increasing the efficacy as compared to the semiconductor package in the related art.

[115] 14. The electric elements (for example, varistor, etc.) for protecting the ESD mounted around the light-emitting device (LED chip) are covered with the white reflection layer having excellent reflectivity, such that the reduction of luninous flux due to the varistor is solved.

[116] 15. The electric elements (for example, varistor, etc.) for protecting the unit ESD is mounted around the light-emitting device, such that the packaging is made very simply as compared to the related art.

[117] 16. The reflection layer is rounded inwardly around the light-emitting device and the ceramic pigments having colors corresponding to the colors emitted from the light- emitting device and the white reflection materials are used as the materials of the reflection layer, such that the luninous flux emitted from the light-emitting device is more increased. In other words, it is possible to simply implement the semiconductor package that provides the more luninous flux as compared to the related art without using the separate plating process and the metal reflector.

[118] 17. Light from the light-emitting device is more reflected by the reflection layer made of the yellow or dark brown series ceramic pigment and the white reflection materials and transmits the phosphor layer, such that the luninous flux of the warm white light emitted from the phosphor layer is increased. In other words, it is possible to simply implement the semiconductor package that provides the more luninous flux of the warm white than the semiconductor package in the related art capable of outputting the warm white light.

[119] 18. The reflection layer (reflector) is formed by using the yellow or dark brown inorganic pigments (ceramic pigment) as some materials, such that the color rendering index (CRI) of light emitted from the semiconductor package is improved.

[120] 19. If the red series inorganic pigment or the red phosphor and the white reflection material are used as the materials of the reflection layer, light from the LED chip is almost all reflected without any loss by the reflection layer and output as the white light added with red through the phosphor layer. In this case, the red light is naturally mixed with the white light emitted through the phosphor layer to increase the color rendering index of the white light.

[121] 20. Due to the use of the white reflection material having good reflectivity, even when a very small amount of red series inorganic pigment or red phosphor is used, it is possible to add the red light to the white light emitted through the phosphor layer. This can improve the color rendering index of the emitted white light.

[122] 21. The reflection layer (reflector) can be easily formed without using the separate plating process or the metal reflector as compared to the related art as well as the output of the white light having the improved color rendering index can be simply implemented as compared to the semiconductor package in the related art. Brief Description of Drawings

[123] FIG. 1 is a schematic view of an LED package structure in the related art;

[124] FIG. 2 is a perspective view of an LED package having a metal reflector in the related art;

[125] FIG. 3 is a cross-sectional view of a semiconductor package according to a first embodiment of the present invention;

[126] FIG. 4 is a cross-sectional view of a semiconductor package according to a second embodiment of the present invention;

[127] FIG. 5 is a flow chart describing a manufacturing method of the semiconductor package according to the first and second embodiments of the present invention;

[128] FIGS. 6 and 7 are photographs used for explaining the flow chart of FIG. 5;

[129] FIG. 8 is an absorption graph;

[130] FIG. 8 (a) is an absorption graph in the case of using TiO2 as a material of a reflection layer;

[131] FIG. 8(b) is an absorption graph in the case of using ZnO as a material of a reflection layer;

[132] FIG. 9 is a perspective view of a semiconductor package according to a third embodiment of the present invention;

[133] FIG. 10 is a cross-sectional view taken along line A-A of FIG. 9; [134] FIG. 11 is a view showing a changed example of FIG. 9 and a cross-sectional view taken along line A-A of FIG. 9

[135] FIG. 12 is a plan view in the case of changing an electrode pattern of FIG. 9; [136] FIG. 13 is a plan view of a semiconductor package according to a fourth embodiment of the present invention;

[137] FIG. 14 is a cross-sectional view taken along line B-B of FIG. 13; [138] FIG. 15 is a view for explaining a configuration and a manufacturing process of a semiconductor package according to a fifth embodiment of the present invention; [139] FIG. 16 is a view for explaining a configuration and a manufacturing process of a semiconductor package according to a sixth embodiment of the present invention; [140] FIG. 17 is a view for explaining a configuration and a manufacturing process of a semiconductor package according to a seventh embodiment of the present invention; [141] FIG. 18 is a view showing a sequence of a manufacturing method of a semiconductor package according to an eighth embodiment of the present invention; [142] FIG. 19 is an enlarged perspective view of any one of a plurality of semiconductor packages shown in FIG. 19H; [143] FIG. 20 is a view used for explaining a birth background of a ninth embodiment and a tenth embodiment of the present invention; [144] FIGS. 21 to 31 are views for explaining an LED package according to the ninth embodiment of the present invention; [145] FIG. 32 is a view for explaining an LED package according to a tenth embodiment of the present invention; [146] FIG. 33 is a flow chart for explaining a manufacturing process of a semiconductor package according to an eleventh embodiment of the present invention; [147] FIG. 34 is a view used for explaining a configuration and a manufacturing process of a semiconductor package according to an eleventh embodiment of the present invention;

[148] FIG. 35 is a cross-sectional view taken along line A-A of FIG. 34F [149] FIG. 36 is a perspective view of a semiconductor package according to a thirteenth embodiment of the present invention;

[150] FIG. 37 is a cross-sectional view taken along line A-A of FIG. 36. [151] FIGS. 38 to 41 are data sheets experimenting by varying a mixed ratio of materials of a reflection layer of a semiconductor package according a fourteenth embodiment of the present invention; and

[152] FIG. 42 is a graph showing a change in a color rendering index and a luninous flux according to a red phosphor mixed ratio based on Table 14. Best Mode for Carrying out the Invention

[153] Hereinafter, a semiconductor package and a manufacturing method thereof according to exemplary embodiments of the present invention will be described with reference to the accompanying drawings. Hereinafter, the semiconductor package will be described based on an LED package as a best embodiment. It is considered that the LED package is applied to all SMD type packages such as a ceramic package, a plastic package, a lead frame package, a plastic + lead frame type package, etc.

[154] (First Embodiment)

[155] FIG. 3 is a cross-sectional view of a semiconductor package according to a first embodiment.

[156] The semiconductor package of FIG. 3 includes a substrate 30 having a cavity 40; a chip type light-emitting device 34 (hereinafter, referred to as an "LED chip") mounted in a light-emitting device mounting region within a cavity 40; a wire 36 that electrically connects the LED chip 34 and a pattern electrode (not shown); and a white reflection layer 38 that is filled in the cavity 40 as a white reflection material and filled to be connected to a side surface of a die 32 on a lower portion of the LED chip and an inner side wall of the cavity 40.

[157] If the substrate 30 can mount the LED chip 34 at a high density, the substrate forming material is not limited. For example, there may be alunina, quartz, calcium zirconate, forsterite, SiC, graphite, fiαesed silica, mullite, cordierite, zirconia, beryllia, and aluminum nitride, low temperature co-fired ceramic (LTCC), high temperature co- fired ceramic (HTCC), plastic, metal, varistor, etc. In particular, ZnO-based varistor has high thermal conductivity. If the substrate is manufactured by a varistor material using ZnO as a main component, it performs a function as the varistor as well as can quickly lower the temperature of the LED package due to the high thermal conductivity of the varistor itself. Meanwhile, when the substrate is made of plastic, the plastic is generally weak in heat such that when the substrate is used for a long time, the deformation of the substrate 30 occurs, thereby degrading the efficacy of products (semiconductor package). However, the first embodiment of the present invention forms the reflection layer 38 using a material having thermosetting property and fills it in the cavity 40 to cover the inner side wall and bottom surface of the cavity. Therefore, the first embodiment of the present invention minimizes a region where light generated from the LED chip 24 comes in direct contact with the substrate 30, such that the problems caused by the heat generation due to the light generated from the LED chip 34 can be solved. In other words, the first embodiment of the present invention can solve the problems of the deformation and the degradation of efficacy, etc., due to the heat generation even though the substrate 30 made of plastic is used for a long time. In the specification of the present invention, it is assumed that the substrate 30 is manufactured using LTCC. Those skilled in the art can easily manufacture the substrate 30 of FIG. 3 by using the known manufacturing process and stacking process of LTCC.

[158] The cavity 40 may take a cylindrical shape and a square shape. If necessary, the shape of the cavity 40 may take shapes other than the above^nentioned shapes.

[159] The die 32 serves as a stand for fixing the LED chip 34 to the light-emitting device mounting region. The die 32 is made of materials having excellent thermal conductivity, such as AIN, ZnO, CuW, SiC, Mo, Cu, diamond, and the like. If the LED chip 34 comes in direct contact with the substrate 30 without using the die 32, Ag epoxy or white epoxy is used as adhesives. Since the Ag epoxy has high thermal conductivity, it is very efficient as adhesives. When the white epoxy is used as adhesives, it has slightly degraded thermal conductivity but is a material similar to the reflection layer 38, such that the manufacturing process is simpler.

[160] The LED chip 34 has a wavelength band of approximately 200 to 900 nm. For example, the LED chip 34 is a light-emitting device that emits light having a wavelength band of approximately 450 to 500 nm, a light-emitting device that emits light having a wavelength band of approximately 500 to 570 nm, a light-emitting device that emits light having a wavelength band of approximately 620 to 750 nm. Of course, the LED chip 34 can be a light-emitting device having an ultraviolet wavelength band or an infrared wavelength band, if necessary. The LED chip 34 can be adopted by power from a single chip to a multi chip, if necessary. The LED chip 34 can use a chip that performs light emission upward or a chip that performs light emission upward and laterally.

[161] The reflection layer 38 is rounded inwardly. For example, a white reflection material (see the following Table 1) having reflectivity of 90% or more is used as a material of the reflection layer 38. The reflection layer 38 can use materials listed in Table 11 or Table 13 to be described below.

[162] Table 1 [Table 1]

[163] In Table 1, TiO2, ZnO, Lithopone, etc., are used to implement a white color. Silicon resin, epoxy resin, etc., are used to implement viscosity and adhesion. The reflection layer 38 serves as the reflector. In Table 1, in order to implement the white color, TiO2, ZnO, Lithopone, etc., are main materials and silicon resin, epoxy resin, etc., are sub^naterials. In Table 1, if TiO2, ZnO, Lithopone, etc., are used below 5 wt%, it is difficult to implement the white color. If TiO2, ZnO, Lithopone, etc., are used above 25 wt%, a small amount of silicon resin, epoxy resin, etc., are added as additives, such that it is difficult to obtain desired viscosity and adhesion. If silicon resin is used below 30 wt%, viscosity is too low such that it is difficult to form the inwardly rounded shape as shown in FIG. 3. If silicon resin is used above 50 wt%, viscosity is too high such that it is difficult to form the inwardly rounded shape as shown in FIG. 3. If epoxy resin, etc., are used below 25 wt%, a weak adhesion is obtained such that it is difficult to maintain a rounded shape as shown in FIG. 3. If epoxy resin, etc., are used above 65 wt%, contents of TiO2, ZnO, Lithopone, silicon resin, etc., are insufficient, such that it is difficult to implement the white color or a desired viscosity is not obtained.

[164] The semiconductor package of FIG. 3 is mainly adopted when the LED chip 34 performing the light emission upward and laterally is used.

[165] (Second Embodiment)

[166] FIG. 4 is a cross-sectional view of a semiconductor package according to a second embodiment of the present invention. FIG. 4 may be a modified example of FIG. 3. The semiconductor package of FIG. 4 has approximately the same structure as the semiconductor package of FIG. 3. The only difference therebetween is that in FIG. 3, the reflection layer 38 is filled to be connected with the inner side wall of the cavity 40 and the side surface of the die 32 on the lower portion of the LED chip 34 but in FIG. 4, the reflection layer 38 is filled to be connected with the inner side wall of the cavity 40 and the side surface of the LED chip 34. [167] Preferably, the side surface of the light-emitting device claimed in claims of the present invention is interpreted as including the side surface of the die 32.

[168] The semiconductor package of FIG. 4 is adopted when the LED chip 34 performing the light emission upwardly is used.

[169] Although not shown in FIGS. 3 and 4, if necessary, a transparent silicon or a phosphor may be filled in regions other than the region where the reflection layer 38 occupies in the cavity 40. For example, when the LED chip 34 is the light-emitting device emitting light having a wavelength band of approximately 450 to 500nm, the white light can be implemented by the phosphor filled on the upper portion of the reflection layer 38.

[170] FIG. 5 is a flow chart describing the manufacturing method of the semiconductor package according to the first and second embodiments. FIGS. 6 and 7 are photographs used for describing the flow chart of FIG. 5. The following description describes a case of manufacturing a single product.

[171] First, the substrate 30 on which the cavity 40 is formed is prepared. Although not shown in FIG. 5, a hole, which vertically penetrates through the substrate 30, is formed underneath the light-emitting device mounting region of the substrate 30 and thermal via materials such as a Cu slug, a diamond slug, etc. are embedded into the hole. This is to more quickly emit heat generated from the LED chip 34 since a position receiving earliest and most heat in the LED chip 34 is underneath the light-emitting device mounting region.

[172] The LED chip 34 is mounted in the light-emitting device mounting region of the substrate 30. At this time, it is assuned that the LED chip 34 is attached on the top surface of the die 32 (SlO). For example, when TiO2 is used as a material of the reflection layer 38, a blue LED chip is mounted and when ZnO is used as a material of the reflection layer 38, a UV LED chip is mounted.

[173] Pattern electrodes (cathode electrode, anode electrode) (not shown) formed on the bottom surfaces of the cavity 40 and the LED chip 34 are electrically connected to each other via the wire 36 (see FIG. 6) (S 12). In the case of FIG. 6, the pattern electrodes on the bottom surface of the cavity 40 are shown because the reflection layer 38 is not yet formed.

[174] Thereafter, a white liquid material (for example, white liquid material where any one or more of TiO2, ZnO, and Lithopone listed in Table 1 are added) in consideration of viscosity is dispensed around the LED chip 34. Thereby, the liquid material is slowly diffused laterally and at the same time, is connected with the side surface of the die 32 or the LED chip 34 and the inner side wall of the cavity 40 as shown in FIG. 3 or 4. As a result, the liquid material has a rounded shape inwardly as shown in FIG. 3 or 4 and becomes the reflection layer 38 in a gel state as a predetermined time goes (see FIG. 7) (S 14). In this case, the reflection layer 38 completely covers the bottom of the cavity 40. If the viscosity and input amount of the reflection layer 38 are controlled, the reflection layer 38 has a sufficiently rounded form as shown in FIG. 3 or 4 by surface tension. The viscosity and input amount of the material, etc. forming the reflection layer 38 should be changed according to the change in the product size. In the case of FIG. 7, since the reflection layer 38 is formed to cover the bottom surface and inner side wall of the cavity 40, the pattern electrode on the bottom surface of the cavity 40 is not shown.

[175] Thereafter, a primary curing is performed at a temperature of approximately 17O⁰C for approximately 2 hours so that the reflection layer 38 is well bonded to the substrate 30 (S16). The reflection layer 38 and the substrate 30 are tightly bonded to each other by the primary curing. Even after the primary curing is performed, it may have a slight difference in terms of the size but becomes a state shown in FIG. 7.

[176] Then, the transparent silicon or the phosphor (not shown) is dispensed on the upper portions of the reflection layer 38 and the LED chip 34 (S 18). In this case, if the LED chip 34 is the light-emitting device that emits the white light, the transparent silicon is dispensed on the upper portions of the reflection layer 38 and the LED chip 34. For example, if the LED chip 34 is the light-emitting device that emits the blue light, a yellow phosphor is dispensed on the upper portion of the reflection layer 38 and the LED chip 34 in order to implement the white light.

[177] According to the demands, the mixture of the phosphor and the transparent silicon may be used and only the transparent silicon may be used. The color of phosphor uses R/G/B, etc alone or in a combination thereof in consideration of the light efficacy and the optical properties (High CRI/GAMNUT, CCT, Cx/Cy).

[178] Finally, a secondary curing is performed so that the transparent silicon or the phosphor is tightly bonded to the lower structure (S20).

[179] Thereby, a single semiconductor package is manufactured. In the size (A*B*C) of the completed semiconductor package, A is approximately 0.4mm or more, B approximately 0.4mm or more, and C approximately 0.5mm or more when considering the case of using the multi chip. Several semiconductor packages can be manufactured at a time. This can be easily understood by those skilled in the art from the above- mentioned description. [180] The following Table 2 is contents obtained by comparing the semiconductor package of the second embodiment of the present invention with the semiconductor package in the related art. This comparison contents are results obtained by performing the experiment several times. The results of the following Table 2 is a case of experimenting the semiconductor package using the LED chip that performs the light emission upward. For example, in the first embodiment using the LED chip that performs the light emission upward and laterally, the reflection layer covers the bottom surface of the cavity, such that the effect will be larger.

[181] Table 2 [Table 2]

[182] As shown in Table 2, it can be appreciated that the semiconductor package of the second embodiment of the present invention significantly increases the efficacy (Cd, TLF) as compared to the semiconductor package in the related art. Further, since the effect of the reflectivity is very excellent, the effect having a value of 50% or more with respect to a central point upon measuring an LUX value can be obtained.

[183] In the second embodiment of the present invention, the white reflection material having reflectivity of 90% or more (for example, white liquid material where any one or more of TiO2, ZnO, and Lithopone listed in Table 1 are added) as the material of the reflection layer 38 is formed around the chip to perform the role of the reflection layer at a low power package ( below 0.5W) as well as a high power package (0.5 W or more).

[184] FIG. 8 (a) is a absorption graph when TiO2 is used as the material of the reflection layer 38 and FIG. 8(b) is a absorption graph when ZnO is used as the material of the reflection layer 38. For example, when TiO2 is used as the material of the reflection layer 38, the blue LED chip is mounted and when ZnO is used as the material of the reflection layer 38, the UV LED chip is mounted.

[185] As shown in the absorption graph, it can be appreciated that there is little the light absorption in a visible ray region. In the optical aspect, what is more important than reflectivity is absorbance. Generally, since a black color completely absorbs light, there is no light to be reflected. However, in the case of the first and second embodiments of the present invention, the reflection layer 38 is formed by selecting TiO2, ZnO, and Lithopone that has a small amount of absorbance and good reflectivity, such that the reflectivity is excellent at the rounded top surface of the reflection layer 38. The absorption graph of FIG. 8 A and 8B are applied to the following embodiments as it is.

[186] Various types of tests (thermal shock test, normal temperature test, moisture resistance test) as described below are performed.

[187] 1) The thermal shock test was performed on the structure adopting the white reflection layer 38 by applying a rated current (IF) of approximately 20 at a temperature of -30 to 100⁰C several times (for example, approximately 50 times). Unlike this, the thermal shock test was performed on the structure adopting the white reflection layer 38 by applying a rated current (IF) of approximately 150 at a temperature of -30 to 100⁰C several times (for example, approximately 50 times).

[188] It can be appreciated from the results of the thermal shock test that both cases have almost no difference even if rated voltage VF, luninous intensity, XY color coordinate, color temperature, color rendering index, etc., are compared in a first 1 cycle and a final 50 cycle.

[189] It can be appreciated from the thermal shock test that the structure of the first and second embodiments of the present invention bears up against the thermal shock as compared to a general plastic package and a general ceramic package. With the structure of the first and second embodiments, a surface degradation phenomenon (yellowing phenomenon) due to heat is less caused, such that direct light degradation is less caused as well as the change in the optical properties is excellent.

[190] 2) The normal temperature test was performed on the LED chip having a structure adopting the white reflection layer 38 by applying a rated current (IF) of approximately 20 mA and lighting it at a temperature of approximately 25⁰C for a long time. Unlike this, the normal temperature test was performed on the LED chip having a structure adopting the white reflection layer 38 by applying a rated current (IF) of approximately 150 mA and lighting it at a temperature of approximately 25⁰C for a long time.

[191] It can be appreciated from the results of the normal temperature test that both cases have almost no difference even if rated voltage VF, luninous intensity, XY color coordinate, color temperature, color rendering index, etc., are compared when one hour elapses and 1500 hours elapse.

[192] 3) The moisture resistance of the package was confirmed after performing a pressure cooker test (PCT). For example, after the PCT is performed at a temperature of 100⁰C, an air pressure of 2 atm, and a humidity of 120 %RH for 60 hours, the moisture resistance of the package was confirmed. Ink used for confirming the moisture resistance is a red stamp ink available from Maepyo Chemical Co. The following Table 3 shows the experiment processes.

[193] Table 3

[Table 3]

[194] As a result of confirming the moisture resistance after performing the PCT in the above^nentioned conditions, it is confirmed that the red ink is not infiltrated into the package according to the first and second embodiments. This performs a test on the influence of the product due to the ccming-off phenomenon between the silicon and the substrate by comparing the general plastic package and the ceramic package. It can be appreciated from the results of the test that there is no abnormal state.

[195] Also, the following Table 4 shows the results of comparing before and after the white reflection layer 38 is applied to the fixed package for each chip manufacturer. The following Table 4 shows the results of comparing properties when the LED chip 34 is a blue chip of 20 mA.

[196] Table 4 [Table 4]

[197] In the state where the rated voltage IF and the color temperature CCT are fixed to be the same (or almost similar), the change between luninous intensity CDl before applying the white reflection layer 38 and luninous intensity CD2 after applying the white reflection layer 38 is observed. It can be appreciated from the comparative result that the luminous intensity CD2 is increased more than the luninous intensity CDl.

[198] Further, the following Table 5 shows the results of comparing before and after the white reflection layer 38 is applied to the fixed package for each chip manufacturer in the state where the high-power chip is adopted. The following Table 5 shows the results of comparing efficacy when the LED chip 34 is a power chip of 350mA or more.

[199] Table 5

[Table 5]

[200] The change in luninous intensity CD, orientation angle, and total luminous flux (TLF) before applying the white reflection layer 38 and after applying the white reflection layer 38 is compared. It can be clearly appreciated from the comparative result that the luninous intensity CD, orientation angle, and total luminous flux (TLF) of the package after applying the white reflection layer 38 are increased more than those of the package before applying the white reflection layer 38. In particular, when the white reflection layer 38 is applied, it can be appreciated that the total luminous flux is increased despite the increase of the orientation angle.

[201] Further, the following Table 6 shows the results of comparing the efficacy of the structure where the white reflection layer 38 is applied to various packages and the structure in the related art (for example, a structure having the metal reflector 120 of FIG. 2).

[202] Table 6 [Table 6]

[203] In Table 6, for example, the case in the related art (for example, it has the metal reflector 120 of FIG. 2) having a "2812" package size directly contacts the LED chip 34 to the substrate 30 by using the white epoxy as adhesives and fills the yellow phosphor in the cavity 40. The cases of the first and second embodiments of the present invention having the "2812" package size directly contact the LED chip 34 to the substrate 30 by using the white epoxy as adhesives, form the reflection layer 38, and fill the yellow phosphor in the upper space of the reflection layer 38.

[204] In Table 6, the case of a 5050 package is experimented in the state where the color temperature is fixed to be almost similar to 51 ISC and 5012K and the rated current and the orientation angle are each fixed to be the same. Although the most accurate data is obtained by fixing the color temperature to be the same, it is difficult to fix the color temperature to be the same. As a result, it is experimented in the state where the color temperature is fixed to be almost similar. When comparing before the white reflection layer 38 of the present invention is applied (normal) and after the white reflection layer 38 of the present invention is applied (the invention), it can be appreciated that the structure adopting the white reflection layer 38 improves efficacy (for example, luminous intensity) as compared to the structure in the related art.

[205] The following Table 7 shows the results of testing the increase of efficacy in the package of ceramic and the package of plastic. The package of ceramic means a package using an LTCC substrate and the package of plastic means a package using a lead frame substrate. The unit of the package is mm and the proposed size is a size of the substrate of the package. In the case of A Co., a chip of 14 mil or 24 mil was used and in the case of B Co., a chip of 40 mil was used.

[203] Table 7

[Table 7]

[207] The structure in the related art (for example, it has the metal reflector 120 of FIG. 2) and the structure where the white reflection 38 is applied to the package of plastic are compared for each chip manufacturer. It can be appreciated from the comparative result that the lurdnous intensity Cd and total lurdnous flux (TLF) of the package are significantly increased.

[208] Further, the following Table 8 shows the effect due to the difference between the structure in the related art and the structure of the first or second embodiment (the invention) of the present invention for each size of two packages when the semiconductor package implements the white light. [2G9] Table 8 [Table 8]

[210] As can be appreciated from Table 8, in the case of 3030 (1.Ot) package, when the white reflection layer 38 such as the structure according to the present invention is applied, it can be appreciated that the luminous intensity and the total lurdnous flux is significantly increased as compared to the structure in the related art. In the case of 5050 (1.05) package size, it can be appreciated that the structure of the present invention significantly increases the luminous intensity and the total lurdnous flux as compared to the structure in the related art.

[211] Further, The following Table 9 shows the effect due to the difference between the structure in the related art and the structure of the first or second embodiment (the invention) of the present invention for each size of various packages when the semiconductor package implements the white light.

[212] Table 9 [Table 9]

[213] As can be appreciated from Table 9, it can be appreciated from the results of testing the luninous intensity and the total luminous flux by variously varying the package size that the structure of the present invention increases the luminous intensity and the total luninous flux. In particular, when comparing the total luninous flux (TLF) of 7CP0 (4.2t) and 7Φ0 (1.2t) in the related art and the total luminous flux (TLF) of 7CP0 (4.2t) and 7CP0 (1.3t) of the present invention after applying the white reflection layer 38 of the present invention, it can be appreciated that the total luninous flux (TLF) of 7CP0 (4.2t) and 7CP0 (1.3t) after applying the white reflection layer 38 of the present invention is significantly increased.

[214] Further, the following Table 10 shows the effect due to the difference between the structure of the first or second embodiment of the present and the structure in the related art for each light-emitting color of the semiconductor package.

[215] Table 10 [Table 10]

[216] In Table 10, the contents listed in the upper portion are data for explaining the effect due to the difference between the structure in the related art and the structure of the present invention (that is, the structure adopting the white reflection layer 38) when the light-emitting source of the semiconductor package of 5050 (3.2t) is implemented by green and red colors. In Table 10, the contents listed in the lower portion are data for explaining the effect due to the difference between the structure in the related art and the structure of the present invention when the semiconductor package of 4508 (1.3t) implements the white light. Reviewing each case, it can be appreciated that the structure of the present invention increases the luninous intensity as compared to the structure in the related art.

[217] According to the first and second embodiments described above, the reflection layer is formed to be connected with the side surface of the LED and the inner side wall of the cavity by dispensing the white reflection material around the light-emitting device, such that there is no need to adopt the metal reflector in the related art. The light reflection is made by the inwardly rounded reflection layer without using the metal reflector, such that the manufacturing process of the package is very simple. In particular, since the white reflection layer is filled up to the bottom surface of the cavity, the loss of light does not occur and thus, the efficacy is increased as compared to the related art. As a result, the efficacy is increased as compared to the package structure in the related art. Due to the effect, the uniformity can be improved when measuring an LUX value per a distance in the light source.

[218] (Third Embodiment) [219] FIG. 9 is a perspective view of a semiconductor package according to a third embodiment of the present invention and FIG. 10 is a cross-sectional view taken along line A-A of FIG. 9.

[220] The above^nentioned firs and second embodiments are described in the state where the electrodes (anode electrode and cathode electrode) are not shown, but the third embodiment shows electrodes 42 and 44. In the configuration of the third embodiment, the description of the same components as the first and second embodiments will not be repeated.

[221] The semiconductor package of the third embodiment includes: the electrode 42 that is formed at the bottom surface of the cavity 40 of the substrate 30 but has the LED chip 34 mounted on the top surface thereof; and the white reflection layer 38 that is filled in the cavity 40 to cover the inner side wall and bottom surface of the cavity 40 but exposes the upper surface of the electrode 42 and is filled to come in contact with the edge of the electrode 42.

[222] The electrode 42 means any one of the anode electrode and the cathode electrode and the electrode 44 means the other of the anode electrode and the cathode electrode. The electrode 42 and the electrode 44 are formed to be spaced from each other.

[223] The electrode 42 may take a circular shape or a square shape. For example, if the plane shape of the cavity 40 is circular shape, it is preferable that the plane shape of the electrode 42 is a circular shape. In other words, it is preferable that the plane shape of the electrode 42 and the cavity 40 is the same. As such, if the plane shape of the cavity 40 and the electrode 40 is a circular shape, a distance from an outer peripheral portion of the electrode 42 to the cavity 40 is the same at all the points, such that the uniformity of light emitted from the LED chip 34 is secured. In other words, when the plane shape of the cavity 40 and the electrode 42 is a circular shape, it is advantageous in the secure of the uniformity of light as compared to a quadrangular shape. Of course, if necessary, the shape of the electrode 42 may have shapes other than the above^nentioned shapes.

[224] In FIGS. 9 and 10, the reason for showing the two electrodes is to indicate a wire bonding scheme that connects the LED chip 34 to the electrodes 42 and 44, respectively, by using two wires 36. For example, if the LED chip 34 is a light-emitting device that can be connected by an eutectic bonding scheme, the nunber of wires may be one. Meanwhile, if the LED chip 34 is a light-emitting device that can be connected by a flip bonding scheme, the wire 36 is not needed and the nunber of electrode (in more detail, a pad for connecting with a flip chip) may be one. This content is applied to the above^nentioned embodiments and other embodiments to be described below as it is.

[225] The third embodiment can certainly form the rounded border of the reflection layer 38 by the electrode 42 on which the LED chip 34 is mounted. Further, when varying the size of the electrode 42, the filling region of the reflection layer 38 and the curvature of the reflection layer 38 can be controlled and the orientation angle can be controlled. In particular, the reflection layer 38 is formed by selecting the white TiO2, ZnO, Lithopone, etc., having good reflectivity, such that there is little the light absorption in the visible ray region. In other words, the semiconductor package of the third embodiment has less light absorbance and an excellent reflectivity at the rounded top surface of the reflection layer 38, as in the above ^nentioned first embodiment.

[226] FIG. 11, which is a modified example of the third embodiment, is a cross-sectional view taken along line A-A of FIG. 9.

[227] In the third embodiment, the top surface of the electrode 42 is exposed and the electrode 44 is completely covered by the reflection layer 38. However, in FIG. 11, all the top surfaces of the electrodes 42 and 42 are exposed.

[228] As shown in FIG. 11, exposing all the uppers surfaces of the electrodes 42 and 44 can be achieved by controlling the contents of the material of the reflection layer 38.

[229] Comparing FIG. 10 and FIG. 11, the semiconductor package of FIG. 10 can easily obtain the excellent efficacy and desired orientation angle as compared to the semiconductor package of FIG. 11. The semiconductor package of FIG. 10 can obtain more excellent luminous intensity Cd and total luninous flux (TLF) than those of the semiconductor package of FIG. 11 since the reflection layer 38 exposes only the top surface of electrode. Further, the semiconductor package of FIG. 10 can form the right and left symmetrical curvature on the basis of the electrode 42, such that it can easily obtain the desired orientation angle as compared to the semiconductor package of FIG. 11.

[230] Meanwhile, the semiconductor package of FIG. 10 is a structure where the mounting of LED chip 34 and the bonding of the wire 36 are performed and the filling of the reflection layer 38 is then performed. As a result, the finished product should be manufactured and sold. However, the semiconductor package of FIG. 11 may perform the mounting of the LED chip 34 and the bonding of the wire 36 after the reflection layer 38 is filled to expose the top surfaces of the electrodes 42 and 44. Thereby, the defect inspection (for example, whether or not the electrode is formed well, whether or not the reflection layer 38 is formed well) can be performed before mounting the LED chip 34. Further, the semiconductor package of FIG. 11 can be sufficiently sold even in the state where there are no the LED chip 34 and the wire 36 .

[231] FIG. 12 is a plan view in the case where the electrode pattern of FIG. 9 is modified. The electrodes 42 and 44 of FIG. 9 are formed at a right position in a printing scheme. In FIG. 12, in the case where the substrate is formed by stacking a plurality of ceramic sheets, the electrode layer (for example, Ag plating layer) is formed on the top surface of the ceramic sheet on which the electrode will be formed and is then separated into the two electrodes 42 and 44 region by the etching. In FIG. 12, non-explained reference mineral 46 is an etching unit. The bottom surface of the cavity 40 is formed with the electrodes 42 and 44 that are separated from each other by the etching unit 46.

[232] As shown in FIG. 12, if the LED chip 34 is mounted on the top surface of the electrode 42, the wire (not shown) bonding is performed, and the white liquid material (for example, the white liquid material to which any one or more of TiO2, ZnO, and Lithopone of Table 1 are applied) considering viscosity is dispensed within the cavity 40, the reflection layer 38 in the naturally inwardly rounded shape is formed. In FIG. 12, the reflection layer 38 contacts the inner side wall of the cavity 40 to cover the top surface of the electrode 44. In FIG. 12, the etching unit 46 performs a role of a threshold, such that the reflection layer 38 does not lift up to the top surface of the electrode 38.

[233] As a result, even in the case of the electrode pattern shown in FIG. 12, the semiconductor package having the same shape as the third embodiment can be completed.

[234] (Fourth Embodiment)

[235] FIG. 13 is a plan view of a semiconductor package according to a fourth embodiment of the present invention and FIG. 14, which is a cross-sectional view taken along line B-B of FIG. 13, is a view showing a case of forming the reflection layer.

[236] The semiconductor package of the fourth embodiment includes: the electrodes 42 and 44 that are formed on the bottom surface of the cavity 40 of the substrate 30; a dam 48 that is formed to surround the light-emitting device mounting region on the top surfaces of the electrodes 42 and 44; and the white reflection layer 38 that is filled in regions other than the region surrounded by the dam 48 in the inside of the cavity 40 but filled to be in contact with the dam 48.

[237] When comparing the fourth embodiment and the above^nentioned third embodiment, there is a difference in that the fourth embodiment further includes the dam 48. Although the description of other components is not repeated, it can be sufficiently understood to those skilled in the art through the above-mentioned description. [238] The rounded border of the reflection layer 38 is more certainly formed by allowing the dam 48 to surround the light-emitting device mounting region. Further, the filling region and curvature of the reflection layer 38 can be controlled by varying the size of the dam 48 and thus, the orientation angle can be controlled.

[239] The dam 48 may take a circular ring shape or a quadrangular ring shape. For ex ample, if the dam 48 is a circular ring shape, it is preferable that the plane shape of the cavity 40 is a circular shape. As such, if the plane shape of the cavity 40 and the dam 48 is a circular shape, a distance from an outer peripheral portion of the dam 48 to the cavity 40 is the same at all the points, such that the uniformity of light emitted from the LED chip 34 is secured. In other words, when the plane shape of the cavity 40 and the dam 48 is a circular shape, it is advantageous in the secure of the uniformity of light as compared to a quadrangular shape. Of course, if necessary, the shape of the dam 42 may take shapes other than the above^nentioned shapes.

[240] In the fourth embodiment, the bottom surface of the dam 48 comes in contact with the top surfaces of the electrodes 42 and 44. Of course, the dam 48 may be formed only on the top surface of the electrode by making the shape of the electrodes 42 and 44 different. Those skilled in the art can easily make the shapes of the electrodes 42 and 44 different from FIG. 13.

[241] According to the above^nentioned third embodiment and fourth embodiment, the white reflection layer is filled to be rounded in the regions other than the electrodes mounted with the LED chips in the cavity, such that the loss of light is significantly reduced and the efficacy is improved, as compared to the related art.

[242] In particular, the rounded border of the filler is certainly formed by the electrodes on which the LED chips are mounted. Further, the rounded border of the reflection layer is more certainly formed by allowing the dam to surround the light-emitting device mounting region.

[243] Meanwhile, the filling region and curvature of the reflection layer can be controlled by varying the size of the electrode and the size of the dam. Thereby, the orientation angle can be controlled.

[244] In the description of the above-mentioned first to fourth embodiments, although one LED chip 34 is mounted on the semiconductor package, the above embodiments can be sufficiently applied to the case where two or more LED chips in a chip form is mounted. By the above configuration, the effect becomes larger. The multi-chip package will be described with reference to the following fifth to seventh embodiments. [245] There is little difference between the semiconductor package manufactured by the manufacturing process of the following fifth to seventh embodiments and he semiconductor package manufactured by the manufacturing process of the first to fourth embodiments. Accordingly, although the detail description of each component will be not repeated, those skilled in the art can sufficiently understand them through the above^nentioned description. Also, the following fifth to seventh embodiments relates to the manufacturing process of the multi-chip package, but can be sufficiently applied to the manufacturing process of the semiconductor package on which the one LED chip is mounted.

[246] (Fifth Embodiment)

[247] FIG. 15 are a view for explaining a configuration and manufacturing process of a semiconductor package according to a fifth embodiment of the present invention in the case where the plurality of LED chips are mounted.

[248] As shown in FIG. 15(a), the substrate 30 is prepared and a plurality of electrodes

42a, 42b, and 42c on which the LED chips will be mounted are formed on the prepared substrate 30. Herein, the number of electrodes is three, but two or more electrodes are enough.

[249] Thereafter, as shown in FIG. 15(b), the white reflection layer 38 is formed flat in regions other than the region where the plurality of LED chips are mounted on the top surface of the substrate 30. The region where the plurality of LED chips are mounted means the entire top surfaces of the corresponding electrodes 42a, 42b, and 42c or means a region where the LED chips are actually occupied on the top surfaces of each electrode 42a, 42b, and 42c. The former case is to expose the top surface of the plurality of electrodes 42a, 42b, and 42c and to form the reflection layer to be in contact with the edges of the plurality of electrodes 42a, 42b, and 42c, when forming the reflection layer 38. The latter case is to form the reflection layer in the region except for the region where the LED chips are actually occupied on the top surfaces of each electrode 42a, 42b, and 42c, when forming the reflection layer 38. In FIG. 15, the drawing corresponding to the former case is already suggested, but it may be more advantageous in the efficacy to suggest the drawing meeting the latter case, if possible. As a method of flat forming the reflection layer 38, a screen printing method using a mask, a spray method using a mask, or a sputtering method using a sputtering equipment, and the like is used. In the case of the sputtering method, since the sputtering equipment can recognize the formation position of the plurality of electrodes 42a, 42b, and 42c, only the patterns of the plurality of electrodes 42a, 42b, and 42c remain and the material of the reflection layer 38 is sputtered on the substrate 30, such that there is no need to use the mask. For example, when forming the reflection layer 38 by the printing or the sputtering, the applying thickness of the material of the reflection layer, which is applied on the substrate 30, may different according to the material of the substrate 30. For example, in the black ZnO substrate, the applying thickness of the material of the reflection layer 38 should be thick. In the case of the white substrate, the applying thickness of the material of the reflection layer becomes thin. In the fifth embodiment, the applying thickness of the material of the reflection layer 38 is approximately 10 to 300 A.

[250] Herein, the reflection layer 38 may use the material of Table 1 as described above, but in the fifth embodiment, uses the material of the following Table 11. Of course, the reflection layer 38 may be formed of the material of Table 13 to be described below. The reflection layer 38 has the reflectivity of 90 % or more and the thermosetting property.

[251] Table 11 [Table 11]

[252] In Table 11, in order to implement the white color, TiO2, ZnO, lithopone, ZnS, BaSO4, polytetrafluoroethylene (PTFE), and the like were used. Of course, in Table 11, in order to implement the white color, TiO2, ZnO, lithopone, ZnS, BaSO4, polytetrafluoroethylene (PTFE), and the like were used, but if necessary, other materials, which can implement the white color, may be further used. For example, other materials can be used instead of ZnS, BaSO4, polytetrafluoroethylene (PTFE). In order to implement viscosity and adhesion, silicon resin and epoxy resin, and the like can be used. In Table 11, in order to implement the white color, TiO2, ZnO, lithopone, ZnS, BaSO4, polytetrafluoroethylene (PTFE), and the like are main materials and silicon resin and epoxy resin are sub^riaterials. In Table 11, if TiO2, ZnO, lithopone, ZnS, BaSO4, and polytetrafluoroethylene (PTFE) are used below 5 wt%, it is difficult to implement the white color. If TiO2, ZnO, lithopone, ZnS, BaSO4, and polytetrafluoroethylene (PTFE) are used above 60 wt%, a small amount of silicon resin, epoxy resin, etc., are added, such that it is difficult to obtain desired viscosity and adhesion. If silicon resin is used below 5 wt%, viscosity is too low. If silicon resin is used above 30 wt%, viscosity is too high. If epoxy resin, etc., are used below 20 wt%, adhesion is weak. If epoxy resin, etc., are used above 65 wt%, the contents of TiO2, ZnO, lithopone, ZnS, BaSO4, and polytetrafluoroethylene (PTFE), silicon resin, etc., are insufficient, such that it is difficult to implement the white color or a desired viscosity is not obtained. The reflection layer 38 is manufactured by selecting the white TiO2, ZnO, lithopone, ZnS, BaSO4, and polytetrafluoroethylene (PTFE), and the like, which have small light absorbance and good reflectivity, such that light is little absorbed in the visible ray region as well as light emitted from the plurality of LED chips (34a, 34b, and 34c) is almost all reflected, thereby increasing the efficacy.

[253] Thereafter, a curing is performed at a temperature of approximately 17O⁰C for approximately 2 hours so that the reflection layer 38 is well bonded to the electrodes 42a, 42b, and 42c. The reflection layer 38, the substrate 30, and the electrodes 42a, 42b, and 42c are tightly bonded to each other by the curing.

[254] As shown in FIG. 15(c), the LED chips (34: 34a, 34b, and 34c) are mounted on the top surfaces of each electrode 42a, 42b, and 42c. Although the wire is not shown in FIGS. 15, the LED chips (34a, 34b, and 34c) can be wired by the wire bonding scheme and the eutectic bonding scheme or the flip bonding scheme. In the case of the flip bonding scheme, the wire is not needed. Although FIGS. 15 shows that one LED chip corresponds to one electrode, the number of electrodes corresponding to one LED chip is determined according to the wire bonding scheme, the eutectic bonding scheme, and the flip bonding scheme.

[255] As shown in FIG. 15(d), a separate substrate 50 having the cavity filled with a phosphor (not shown) is attached to the upper portion of the substrate 30. For convenience of explanation, the substrate 30 may be referred to as a lower substrate and the substrate 50 may be referred to as an upper substrate. In FIG. 15(d), when light emitted from the LED chips 34a, 34b, and 34c is output to the outside, the efficacy is changed by the reflection layer 38 formed on the lower substrate (substrate 30 in FIG. 15 but is also changed by the upper substrate (substrate 50 in FIG. 15). The material of the substrate 50 is various like the material of the substrate 30. The materials used as the material of the substrate have different reflectivity with respect to the visible ray. In order to increase the reflectivity of the substrate 50, a method of plating Ag may be used. However, the application of this method is limited depending on the material of the substrate 50. Accordingly, after the process of previously coating and curing the material of the above^nentioned reflection layer 38 on the inner side wall of the cavity on the substrate 50 is performed, the upper substrate 50 and the lower substrate 30 are attached to each other. Since the reflection layer 38 is made of the white reflection material, it has insulating property. Even if the reflector in the related art is formed in the cavity on the substrate and the lower end of the reflector in the related art is closely attached to the top surface of the substrate 30, there is no risk of a short with the electrodes 34a, 34b, and 34c.

[256] Thereafter, the curing is performed at a temperature of approximately 17O⁰C for approximately 2 hours so that the reflection layer 38 is well bonded to the substrate 50. The reflection layer 38 and the substrate 50 are tightly bonded to each other by the curing.

[257] (Sixth Embodiment)

[258] FIG. 16 is a view for explaining a configuration and manufacturing process of a multi-chip package according to a sixth embodiment. In the sixth embodiment, the same components as the fifth embodiment are denoted by the same reference numerals. In the components of the sixth embodiment, the description of the components, which can be replaced with the description of the fifth embodiment, will not be repeated. When comparing FIG. 16 and FIG. 15, the shape of the reflection layer is different from each other. Of course, the shape of the substrate 50 also has a slight difference.

[259] As show in FIG. 16(a), the substrate 30 is prepared and the plurality of electrodes

42a, 42b, and 42c are formed on the prepared substrate 30. Thereafter, the substrate 50 on which the cavity is formed is formed on the substrate 30.

[260] Next, the substrate 30, the electrodes 42a, 42b, and 42c, and the substrate 50 are tightly bonded to each other by a heat treatment.

[261] Then, as shown in FIG. 16(b), the material of the reflection layer 38 is filled

(dispensed) in the cavity to cover the inner side wall and bottom surface of the cavity on the substrate 50. At this time, the material of the reflection layer 38 is filled in regions other than the regions where the plurality of LED chips 34a, 34b, and 34c are mounted. The reflection layer 38 has the inwardly rounded shape. For example, the reflection material (for example, see Table 1, Table 11, and Table 13 to be described below) having the reflectivity of 90% or more is used as the material of the reflection layer 38. The white reflection material used as the reflection layer 38 has the thermosetting property. In the above^nentioned fifth embodiment, the reflection layer 38 is flat, but in the sixth embodiment, it is rounded. In order to make the reflection layer 38 of the sixth embodiment into a round shape, the material may be the same but the viscosity may be different. For example, it is preferable that the viscosity needed to form the reflection layer 38 of the sixth embodiment is higher than the viscosity needed to form the reflection layer 38 of the fifth embodiment.

[262] A method of forming the shape of the reflection layer 38 shown in FIG. 16(b) is schematically described as follows. The white liquid material (for example, a liquid material to which any one or more of TiO2, ZnO, lithopone, ZnS, BaSO4, and polyte- trafluoroethylene (PTFE) of Table 1 is added) considering the viscosity is dispensed around the electrode 32. Thereby, the liquid material is slowly diffused laterally and is connected to the outer side surface of the electrode 32 and the inner side wall of the cavity. As a result, the liquid material is the inwardly rounded form and is the reflection layer 38 in the gel state as a predetermined times goes. In this case, the reflection layer 38 completely covers the bottom surface of the cavity. If the viscosity and input amount of the reflection layer 38 are controlled, the reflection layer is the naturally inwardly rounded form by surface tension. In FIG. 16(b), the dispensed amount of the material of the reflection layer 38 has a close relationship with the cir- curference of the cavity on the substrate 50. In the case of the dispensing, the material of the reflection layer is discharged in consideration of the size (length and width) of the cavity on the substrate 50 at the time of performing a molding. The air amount, the revolution and velocity of screw, etc., are determined. Although the formation of the reflection layer 38 is described by the dispensing scheme, the mixed scheme of the dispensing and sputtering (or print), etc., may be used. For example, in FIG. 16, the flat surface between the LED chips adjacent to each other forms the reflection layer 38 by the sputtering scheme or the printing scheme and the rounded reflection layer 38 is formed at other portions (in other words, a portion adjacent to the inner side wall of the cavity) by the dispensing scheme.

[263] The viscosity and input amount of the material forming the reflection layer 38 are changed according to the size of the product. In FIG. 16, the reflection layer 38 is filled in the cavity to cover the inner side wall and bottom surface of the substrate 50, such that a portion where light emitted from the LED chips 34a, 34b, and 34c comes in direct contact with the substrates 30 and 50 is more minimized as compared to FIG. 15. Thereby, the problems caused by the heat generation due to light from the plurality of LED chips 34a, 34b, and 34c are more certainly solved as compared to FIG. 15. For example, although the substrates 30 and 50 are made of plastic, FIG. 16 more certainly solves the degradation of efficacy, etc., due to the heat generation caused by the use for a long time as compared to FIG. 15. In FIG. 15, although the case where the reflector should be formed in the inner side wall of the cavity on the substrate 50 separately from the flat reflection layer 38 is generated, in FIG. 16, this is solved in only one-time process. As a result, the manufacturing process is very simple and the entire manufacturing time of the multi-chip package is shortened.

[264] Thereafter, the curing is performed at a temperature of approximately 17O⁰C for approximately 2 hours so that the reflection layer 38, the electrodes 42a, 42b, and 42c, and the substrates 30 and 50 are well bonded to each other. The reflection layer 38, the electrodes 42a, 42b, and 42c, and the substrates 30 and 50 are tightly bonded to each other by the curing.

[265] Finally, as shown in FIG. 16(c), the LED chips 34a, 34b, and 34c are mounted on the top surfaces of each electrode 42a, 42b, and 42c and the wire (not shown) bonding is then performed.

[266] The case of FIG. 16 can easily control the round curvature of the reflection layer 38, if possible, making it possible to obtain the desired orientation angle. In particular, in FIG. 15, in order to obtain the desired orientation angle, the angle of the inclined surface of the cavity on the substrate 50 (upper substrate) should be controlled. To this end, a process of precisely machining the cavity on the substrate 50 (upper substrate) is needed. However, in FIG. 16, since the desired orientation angle can be easily obtained by forming the cavity vertically perforated on the substrate 50 and controlling the round curvature of the reflection layer 38, it is a very simple process as compared to FIG. 15.

[267] In FIG. 16, if there is only the rounded reflection layer 38, since there is no need to form the reflector in the related art in the cavity on the substrate 50, it is a very high effective value.

[268] Meanwhile, in the case of FIG. 16, since the mounting of the plurality of LED chips 34a, 34b, and 34c is performed after the filling of the reflection layer 38, the defect inspection (for example, whether or not the electrode is formed well, whether or not the reflection layer 38 is formed well, etc.) can be performed before mounting the LED chips 34a, 34b, and 34c. Further, the multi-chip package of FIGS. 16A to 16C can be sufficiently sold even in the state except for the LED chips 34a, 34b, and 34c.

[269] (Seventh Embodiment)

[270] FIG. 17 is a view for explaining a configuration and manufacturing process of a multi-chip package according to a seventh embodiment of the present invention. In FIG. 17, the same components as FIG. 15 and FIG. 16 are denoted by the same reference minerals. In the components of the seventh embodiment, the description of the components, which can be replaced with the description of the fifth embodiment or the sixth embodiment, will not be repeated. When comparing FIG. 17 and FIG. 16, there is a difference in that in FIG. 16, the mounting of the plurality of LED chips 34a, 34b, and 34c is performed after the filling of the reflection layer 38, but in FIG. 17, the filling of the reflection layer 38 is performed after the mounting of the plurality of LED chips 34a, 34b, and 34c. In other words, in FIG. 17, the reflection layer 38 is filled after the plurality of LED chips 34a, 34b, and 34c are mounted on the top surfaces of the electrodes 42a, 42b, and 42c.

[271] The configuration and manufacturing process of the multi-chip package shown in FIG. 17 are easily understood through the description of FIG. 15 or FIG. 16 as described above and therefore, are schematically described simply.

[272] As shown in FIG. 17(a), the substrate 30 is prepared and the plurality of electrodes 42a, 42b, and 42c are formed on the prepared substrate 30.

[273] Then, as shown in FIG. 17(b), the LED chips 34a, 34b, and 34c are mounted on the top surfaces of each of the electrodes 42a, 42b, and 42c and if necessary, the wire (not shown) bonding is then performed.

[274] Finally, as shown in FIG. 17(c), the substrate 50 on which the cavity is formed is disposed on the upper portion of the substrate 30 and the material of the reflection layer 38 is then filled in the cavity to cover the inner side wall and bottom surface of the cavity on the substrate 50. Thereby, as described above, the reflection layer 38 takes the inwardly rounded form.

[275] Since the multi-chip package of the seventh embodiment is a product manufactured by the process that performs the mounting of the LED chips 34a, 34b, and 34c and then the filling of the reflection layer 38, the manufacturing process of the seventh embodiment can be adopted when manufacturing and selling the finished product.

[276] According to the above^nentioned fifth to seventh embodiments, since the reflection layer formed on the substrate has the insulating property, there is no need to consider the spaced value between the electrode and the reflector in the related art. This makes the manufacturing process very simple as well as since there is no short generation between the electrode and the reflector, reduces the defect rate of the product.

[277] If the white reflection material having a small light absorbance and good reflectivity flat covers the circurference of the portion where the plurality of LED chips are mounted on the substrate, the reflector can be very simply manufactured as compared to the manufacturing process of the reflector (including the metal reflector) in the multi-chip package in the related art. The loss of light is significantly reduced as compared to the multi-chip package in the related art, thereby increasing the efficacy.

[278] Further, in the substrate having the cavity formed with the region where the plurality of LED chips are mounted, the inner side wall (except for the electrode portion) and bottom surface of the cavity is covered with the white reflection material having a small light absorbance and good reflectivity but is covered to be inwardly rounded, the reflector in the related art is not needed. In this case, light emitted from the plurality of LED chips is almost all reflected, such that the loss of light is significantly reduced and the efficacy is maximized as compared to the multi-chip package in the related art.

[279] (Eighth Embodiment)

[280] Another manufacturing method of a semiconductor package of the present invention, which is different from the manufacturing methods of the above^nentioned semiconductor package, will be described with reference to FIG. 18 and FIG. 19. The above^nentioned manufacturing methods manufacture the reflection layer by the printing, sputtering, dispensing schemes, and the like, but the manufacturing method described in the eighth embodiment uses a transfer molding scheme.

[281] FIG. 18 sequentially shows the manufacturing method of the semiconductor package of the eighth embodiment of the present invention by using the transfer molding scheme and FIG. 19 is an enlarged perspective view of any one of the plurality of semiconductor packages shown in FIG. 18(h).

[282] First, a sheet 52 for the lower substrate and a sheet 56 for the white reflector are prepared. The sheet 52 for the lower substrate is manufactured in a size that can be separated into the plurality of lower substrates. The sheet 56 for the white reflector is manufactured in a size that can be separated into the plurality of reflectors. Herein, the reflector means a plate including the reflection layer described in the above^nentioned embodiments. The sheet 52 for the lower substrate is separated (divided) into the plurality of lower substrates by a firing process and a sawing process to be described below. Then, reference minerals of the lower substrate are the same as the sheet 52 for the lower substrate. The sheet 56 for the white reflector is separated (divided) into the plurality of reflectors by a deposition process and a sawing process to be described below. Then, reference minerals of the reflector are the same as the sheet 52 for the lower substrate.

[283] If the sheet 52 for the lower substrate and the sheet 56 for the white reflector are bonded and then cut, they are separated into the plurality of unit LED packages. The separated unit LED packages are referred to as a unit element. Therefore, the region corresponding to each unit element in the sheet 52 for the lower substrate and the sheet 56 for the reflector may be referred to as a unit element region.

[284] The preparation of the sheet 52 for the lower substrate means the manufacturing of the sheet 52 that is subjected to the following description, that is, the processes of FIG. 18. The preparation of the sheet 56 for the reflector means the manufacturing of the sheet 56 that is subjected to the following description, that is, the process of FIGS. 18(d). And, if the lower substrate can mount the LED chip 34 at a high density, any substrate can be used. As the material of the lower substrate, ones listed in the description of the substrate of the first embodiment can be used.

[285] The manufacturing process of the sheet 52 for the lower substrate is described under the assumption that it is manufactured using ceramic as the materials. First, glass ceramic powders having a predetermined weight are prepared and PVB -based binder is dissolved in toluene/alcohol-based solvent after measuring the glass ceramic powders to the predetermined weight part and is mixed with the glass ceramic powders.

[286] Then, the mixed glass ceramic powders are put and rotated in a vessel and uniformly mixed. For example, the glass ceramic powders having the desired particle size are obtained by a ball mill at 50 rpm for 20 hours. 50 rpm and 20 hours are provided by way of example only. Therefore, they are changed according to a diameter and amount of a ball within the ball mill, an amount of solvent and binder, and the like.

[287] If the first mixed glass ceramic powders are subjected to a milling by the ball mill, they are discharged in a slurry form. Since the discharged slurry has a predetermined amount of bubbles, a debubble process is performed in order to remove the bubbles within the discharged slurry. In order to prevent the slurry surface from being quickly dried at the time of performing the debubble process, the slurry is agitated and maintained for a predetermined time in a vacuum state.

[288] The mixed raw material (that is, a slurry form), which is subjected to the debubble process, is manufactured in a sheet form. In other words, after a film and a blade are disposed in a tape caster, the debubbled slurry is input while the film is slowly transferred and the slurry passing through the blade is dried and wound on a roll in the sheet form (that is, referred to as a ceramic sheet or a green sheet) having a desired thickness (for example, 20 to 150A on a film).

[289] The ceramic sheet wound on the roll is cut at a predetermined size (dimension) to manufacture the sheet 52 as shown in FIG. 18 (a). Herein, one sheet 52 shown in FIG. 18(a) may have a required thickness of the lower substrate in the eighth embodiment or may have the desired thickness of the lower substrate by stacking several sheets 52.

[290] Thereafter, as shown in FIG. 18(b), after a punching is performed on the sheet 52 to form a via hole 52a, a conductive paste is filled in the via hole 52a. The via hole 52a performs a role of connecting an interlayer circuit.

[291] As shown in FIG. 18(c), electrode patterns 54; 54a, 54b, and 54c are formed on the top surface of the sheet 52 on which the via hole 52a is formed. The electrode pattern 54 is formed by printing the conductive paste of Ag, Pt, Pd, and the like, by using a thick film manufacturing method such as a screen printing, etc., or a thin film manufacturing method such as a sputtering method, an evaporation method, a chemical vapor deposition method, a sol-gel coating method, etc. Herein, the electrode pattern 54a is an anode or a cathode, the electrode pattern 54b is a cathode or an anode, the electrode pattern 54c is an electrode pattern on which an EMI filter (for example, zenor diode, etc.) is mounted. Of course, the electrode pattern 54c can be removed.

[292] Then, the sheet 52 and the electrode pattern 54 are fired at a predetermined temperature so that they are bonded well.

[293] As such, the sheet 52 for the lower substrate is manufactured by the processes from FIGS. 18(a) to 189(c).

[294] The manufacturing process of the sheet 56 for the white reflector will now be described. In order to manufacture the sheet 56 for the white reflector, the white reflection material is used. The white reflection material uses the materials listed in the above Table 1 or Table 11. Of course, the materials listed in Table 13 to be described below may be used.

[295] As shown in FIG. 18(d), in order to manufacture the sheet 56 for the white reflector, the white reflector having a cavity 64 (for example, a circular shape) whose center is perforated and rounded inwardly is manufactured by injecting the above^nentioned white reflection material in a forming mold (not shown) and by the transfer molding scheme. For example, the sheet 56 is manufactured according to a core shape on the upper and lower sides of a mold that is formed to manufacture the sheet 56 in the shape such as FIG. 18(d). Since the sheet 56 is a molded body manufactured by the transfer molding scheme, it may refer to as a transfer mold. The transfer molding scheme, which is a modification of an injection molding of thermosetting resin, is referred to as a transfer forming scheme. The transfer molding scheme changes a material having plasticity into a curing state while materials (that is, white reflection materials) are injected into the closed forming molding and then transferred. In FIG. 18(d), the sheet 56 having the plurality of cavities 64 is manufactured, the bottom surfaces of each cavity 64 has perforated holes 58 and each cavity 64 is formed with holes 60 to mount the EMI filter (for example, zenor diode) on the lower substrate 52 and a hole 62 for the wire bonding. Of course, if necessary, the shape, which does not have holes 60 and 62, can be used. The diameter of the hole 58 is smaller than that of the hole formed on the upper portion of the cavity 64.

[296] As such, the sheet 56 for the white reflector is manufactured by the transfer molding scheme, such that the plurality of reflectors can be manufactured quickly and accurately. This does not need a separate plating process as well as can make the entire manufacturing process simple and reduce the defect rate.

[297] As described above, the processes from FIGS. 18(a) to 18(d) are sequentially performed to manufacture the sheet 52 for the lower substrate and the sheet 56 for the white reflector. However, the sheet 56 for the white reflector can first be manufactured. Unlike this, the manufacturing process of the sheet 52 for the white reflector and the manufacturing process of the sheet 56 for the lower substrate can be simultaneously performed.

[298] Thereafter, as shown in FIG. 18(e), after the sheet 56 for the white reflector is stacked on the top surface for the manufactured lower substrate, it is heat-treated at a predetermined temperature so that the sheet 52 for the lower substrate and the sheet 56 for the white reflector are bonded well. The sheet 52 for the lower substrate and the sheet 56 for the white reflector are tightly bonded to each other as shown in FIG. 18(f).

[299] Then, as shown in FIG. 18(g), they are cut along a virtual cutting line by a cutter (not shown) such that they are separated into a plurality of unit elements. For example, they are sawed along a cutting line by using the blade of a knife 66 so that they are separated into a plurality of unit elements (unit parts) (see FIG. 19) as shown in FIG. 18(h).

[300] By performing the above^nentioned process, the desired semiconductor package is completed. In other words, as shown in FIG. 19, the semiconductor package 68 where the white reflector 56 having the inwardly rounded cavity 64 is formed on the lower substrate 52 is completed. The reflector 56 is formed by selecting the white TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2 and polytetrafluoroethylene (PTFE), and the like, which have small light absorbance and good reflectivity, such that light is little absorbed in the visible ray region as well as light emitted from the plurality of LED chips is almost all reflected, thereby increasing the efficacy as compared to the related art.

[301] Although the light-emitting device is not shown in FIG. 18 and FIG. 19, after the light-emitting device (for example, LED in a chip form) is mounted on the top surface of the electrode pattern 54a, the wire (not shown) bonding is performed. The light- emitting device in the chip form can be wired by the wire bonding scheme and can be wired by the eutectic bonding scheme or the flip bonding scheme. In other words, a presence and absence of the wire is determined according to using any bonding scheme and since the EMI filter such as the zenor diode can be used only if necessary, it is selectively used.

[302] Hereinafter, various application examples of the semiconductor package of the present invention will be described with reference to ninth to fourteenth embodiments.

[303] First, the semiconductor package (a ninth embodiment to an eleventh embodiment) solving the problems of the semiconductor package adopting the varistor substrate in the related art is described.

[304] As shown in FIG. 20, the varistor substrate on which the LED chip 76 in the related art is mounted uses internal electrodes 70 and 71 and external electrodes 72, 73; 74, and 75. The internal electrodes 70 and 71 are printed between the green sheets and are sintered simultaneously. The external electrodes 72, 73; 74, 75 are connected to internal electrode 70, 71 of the sintered product. The external electrodes 72, 73 are a top surface electrode and the external electrodes 74 and 75 are a bottom surface electrode. In order to form the external electrodes 72, 73; 74, 75, the electrode pattern is printed on the top surface and bottom surface of the sintered product by using Ag paste and a Ni plating and an Ag plating are each performed thereon. At this time, the characteristics of the varistor is evaluated by varistor voltage and capacitance. The varistor voltage is determined by a straight distance between the internal electrodes 70 and 71 and the capacitance is determined by an area where the internal electrode 70 and the internal electrode 71 are overlapped with each other, a distance, and the raw materials.

[305] However, since the varistor has the semiconductor property, the plating is performed, the substrate material itself is changed to have a conductive property. Accordingly, electrical resistance is low at the time of performing the electric plating such that the plating layer formed on the external electrodes 72 and 73 is diffused. Thereby, as shown in FIG. 20, the external electrodes 72, 73; 74, 75 spaced from each other are not formed, but there occur the problems in that the external electrodes 72 and 73 are shorted from each other and the external electrodes 74 and 75 are shorted from each other.

[306] The varistor surface in the plating process is eroded by the plating liquid, such that the adhesion between the Ag layer, which is the lowest layer of the electrode layers, and the varistor surface is low. Therefore, a phenomenon that the electrode is peeled at the time of performing the wire bonding occurs.

[307] Further, ZnO is white, but a ZnO-based varistor is black at the times of performing the sintering process due to additives. Since the black color absorbs light, the LED package using the varistor substrate in the related art causes the loss of light emitted from the LDE due to the black color. Of course, if the top surface electrodes 72 and 73 are made of Ag having the high reflectivity, the loss is reduced to some degree due to the black color, but when viewing from the top surface, since there still remains the black portion, the loss of luninance flux occurs.

[308] Therefore, in the following ninth to eleventh embodiments, the semiconductor package solving the problems of the semiconductor package adopting the varistor substrate in the related art will be described.

[3CP] (Ninth Embodiment)

[310] FIGS. 21 to 31 are views for explaining a structure and manufacturing process of a semiconductor package having a Sanction of preventing static electricity according to a ninth embodiment of the present invention.

[311] For example, a desired composition is adjusted by putting additives such as Bi2O3, Sb2O3, etc. and any one of AlN, BN, and BeO in ZnO powders. The ZnO powders having the adjusted composition are prepared as raw material powders by a ball mill for 24 hours using water, alcohol, etc., as a solvent. In order to prepare the molding sheet, after measuring PVB-based binder of about 6 wt% as additives, which added to the prepared raw material powders, with respect to the raw material powders, the PVB- based binder is melted in toluene/alcohol-based solvent and then input. Thereafter, slurry is manufactured by performing the milling and mixing using a small ball mill for about 24 hours. The slurry is manufactured as a plurality of green sheets (sheets such as 80, 82, 84, 86, 88, 90 of FIG. 21) having a desired size by a doctor blade method, etc. Some green sheets 84 and 86 of the manufactured green sheets are printed with the patterns for the internal electrodes 83 and 85 (for example, using AgPd) for each unit element region. In order to sinter the materials, a temperature of approximately 1000 to 1050⁰C is needed. At this time, AgPd is used as the internal electrodes. Since Ag, which has a melting point of approximately 96O⁰C, is lower than a sintering temperature, AgPd is mainly used as the internal electrode.

[312] Each of the green sheets 80, 82, 84, 86, 88, and 90 is formed with two through holes 81 spaced from each other for each unit element region up and down. The inner portion of the through hole 81 is filled with a conductive material later. If the green sheets 80, 82, 84, 86, 88, and 90 are sintered and then subjected to the final cutting process, it is separated into the plurality of LED packages. The separated unit LED package is referred to as a unit element and a region where each unit element occupies is referred to as a unit element region. Therefore, it can be understood that the green sheets 80, 82, 84, 86, 88, and 90 are formed with the plurality of unit element elements.

[313] Then, as shown in FIG. 21, the green sheet 82 is stacked on the top surface of the green sheet 80, which is a lowest layer. One green sheet having the thickness, which suns the thickness of the green sheet 80 and the thickness of the green sheet 82, can be used. The green sheet 84 is stacked on the top surface of the green sheet 82 and the green sheet 86 is stacked thereon. The green sheet 88 is stacked on the top surface of the green sheet 86 and the green sheet 90 is stacked thereon. As such, one that the plurality of green sheets 80, 82, 84, 86, 88, and 90 are stacked is called a laminate.

[314] Thereafter, the laminate is compressed. Then, as shown in FIG. 22, a cutting groove 92 is formed on the top surface and bottom surface of the laminate. The cutting groove 92 on the top surface is formed along a border line between the unit element regions at a predetermined depth downwardly from the top surface of the laminate. The cutting groove 92 on the bottom surface is formed along a border line between the unit element regions at a predetermined value upwardly from the bottom surface of the laminate. In the ninth embodiment, the reason why the depth of the cutting groove 92 on the top surface and the height of the cutting groove 92 on the bottom surface are not shown is that the size of the completed LED package may be various. As a result, the depth and height values of the cutting grooves 92 are not exemplified individually. For example, the cutting groove 92 on the top surface is formed in a V-letter form and the cutting groove on the bottom surface is formed in an inverse V-letter form. Herein, it is preferable that the cutting groove on the top surface and the cutting groove on the bottom surface are formed at a depth so that they do not contact with each other but are adjacent to each other. The depth so that they are adjacent to each other means the depth so that they can be separated into each unit element by the cutting groove 92 by applying mechanically or artificially force during the final separation process. If the equipment capable of forming the groove on the laminate made of the varistor material is used, the cutting groove 92 can be formed.

[315] The cutting groove 92 is formed and the laminate of FIG. 22 is then fired. At this time, the sintering temperature is approximately 1000 to 1050⁰C. Hereinafter, the sintered laminate is called an element body and the element body is denoted by reference mineral 94.

[316] Then, as shown in FIG. 23, an insulating layer 96 is formed on the top surface and bottom surface of the element body 94. The insulating layer 96 is formed for each unit element region but is formed at a uniform thickness by the printing scheme using a mask. The insulating layer 96 is formed with two through holes 96a upwardly and downwardly, which are spaced from each other for each unit element region. The through hole 96a is formed at the same position in the same form as the through hole 81 as described above. The insulating layer 96 is made of a glass material, which has excellent adhesion with ZnO varistor on the lower portion and excellent adhesion with the external electrode (for example, using Ag) on the upper portion at the time of performing the firing process and has a strong resistance against the plating liquid, when the top surface electrode and the bottom surface electrode come in direct contact with the ZnO varistor, the varistor surface is eroded by the plating liquid during the plating process by using a simultaneous firing process, such that the adhesion between the top surface electrode and the bottom surface electrode and the ZnO varistor is very weak. In the ninth embodiment, the erosion phenomenon of the varistor surface is prevented due to the plating liquid by using the insulating layer 96, such that the adhesion between the top surface electrode and the varistor substrate and the adhesion between the bottom surface electrode and the varistor are increased. Further, the insulating layer 96 prevents the electrical short between the top surface electrode and the bottom surface electrode at the time of forming the electrode by the plating and prevents the peeling of the electrode at the time of performing the wire bonding. The composition and contents of the insulating layer 96 are listed in the following Table 12.

[317] Table 12 [Table 12]

[318] The contents of each composition listed in Table 12 is preferred nunerical values obtained by the experiments of the present applicant. Of course, the slight addition and subtraction of the contents of each composition of Table 12 is permissible. As a result, in Table 12, the insulating layer 96 uses BaO of approximately 3 to 9 wt%, CaO of approximately 9 to 15 wt%, K2O of approximately 3 to 9 wt%, and ZnO of approximately 3 to 10 wt% as main materials. The insulating layer 96 uses A12O3 of approximately 5 to 9 wt%, SiO2 of approximately 50 to 65 wt%, TiO2 of approximately 1 to 5 wt%, and B2O3 of approximately 2 to 6 wt% as sub-materials.

[319] In FIG. 12, since ZnO is the material of the varistor substrate, in order to improve the adherence with the varistor substrate, the content of approximately 3 to 10 wt% is needed. When the content of ZnO is below 3 wt%, the adhesion with the varistor substrate is weak and when the content of ZnO is above 10 wt%, the insulating property is destroyed. In order to obtain the desired firing temperature, if the contents of each K2O, CaO, and BaO are out of the range of contents listed above, it is difficult to obtain the desired firing temperature (approximately 81O⁰C).

[320] In Table 12, the sub-materials such as A12O3 of approximately 5 to 9 wt%, SiO2 of approximately 50 to 65 wt%, TiO2 of approximately 1 to 5 wt%, and B2O3 of approximately 2 to 6 wt% are to form a glass phase. Among composition used for the sub^naterial, SiO2 is mainly used for forming the glass phase. If the content of SiO2 is above 50 to 65 wt%, the firing temperature and intensity reduce. If the content of SiO2 is below 50 to 65 wt%, the firing temperature increases.

[321] Thereafter, as shown in FIG. 24, the conductive material 98 (for example, Ag) is filled inside the through holes 96a and 81 and is fired at a temperature of ap- proximately 81O⁰C in order to bond between the element body 94 and the insulating layer 96 and the conductive material 98. Herein, it is described that the conductive material 98 is filled once. However, although it is a slight troublesome, when considering the filling accuracy of the conductive material 98, the conductive material is filled inside the through hole 81 before sintering the laminate, filled in the through hole 96a of the insulating layer 96 after the sintering process is performed, and then fired.

[322] As described above, after the insulating layer 96 is formed on the top surface and bottom surface of the element body 94, the processes of forming the top surface electrode and the bottom surface electrode are performed. Thereby, the phenomenon that the varistor surface is eroded by the plating liquid is removed by the insulating layer 96, such that the short phenomenon between the top surface electrodes and the short phenomenon between the bottom surface electrodes are removed at the time of performing the plating.

[323] As shown in FIGS. 25 to 27, the processes of forming the top surface electrode and the bottom surface electrode are performed. First, as shown in FIG. 25, The Ag paste is printed on the top surface of the insulating layer 96 formed on the top surface of the element body 94 and the bottom surface of the insulating layer 96 formed on the bottom surface of the element body 94. The Ag paste can be simultaneously printed on the top surface and the bottom surface, and the Ag paste printing is performed on any one surface, the element body 94 is turned-over, and the Ag paste printing is then performed. Herein, the printing of the Ag paste is not performed on all the portions of one surface of the insulating layer 96 but is performed only on a portion thereof. In other words, the Ag paste printing is performed only on a position where the upper electrode and the lower electrode will be formed. In other words, the Ag paste is printed so that it comes in contact with the conductive material 98 of the through hole 96a of the insulating layer 96 for each unit element region. The reason for using Ag is that it can perform the wire bonding and perform a role of the reflector reflecting light and has excellent reaction with a solder. In FIG. 25, reference numerals 200a and 200b indicate an Ag layer on which an Ag printing pattern is formed and the Ag layers 200a and 200b are generally called a first metal layer 200

[324] Then, in order to bond the first metal layer 300 and the insulating layer, the firing process is performed at a temperature of approximately 81O⁰C.

[325] As shown in FIG. 26, the Ni plating is performed on the top surface of the first metal layer 200 to form a second metal layer 202. As shown in FIG. 27, the Ag plating is performed on the top surface of the second metal layer 202 to form a third metal layer 204. Ni prevents the peeling caused by the reaction of the third metal layer 204 and the solder at the time of performing a reflow process. In FIG. 26, reference minerals 202a and 202b indicate a Ni layer on which a Ni printing pattern is formed and the Ni layers 202a and 202b are generally called the second metal layer 202. In FIG. 27, reference numerals 204a and 204b indicate an Ag layer on which an Ag printing pattern is formed and the Ag layers 204a and 204b are generally called the third metal layer 204. Herein, the third metal layer 204 uses Ag but can use Ag. In FIGS. 25 to 27, although the metal layers 200, 202, and 204 are formed only on the upper portion of the insulating layer 96 on the top surface of the element body 94, the metal layers 200, 202, and 204 are actually formed only on the insulating layer 96 on the bottom surface of the element body 94. Herein, if the element body 94 of FIG. 27 is mechanically and artificially separated for each unit element region (that is, it can be easily performed if the cutting groove 92 is used), the plurality of unit varistor substrates are formed. If necessary, since there is a case where only the unit varistor substrate on which the LED chip is not mounted is needed, the separated unit varistor is very useful in this case.

[326] Thereafter, as shown in FIG. 28, the reflection layer 205 is flat printed to cover the insulating layer 96 on the top surface of the element body 94 and the third metal layer 204. FIG. 29 is a cross-sectional view of line A-A of FIG. 28. The reflection layer 205 is not formed at a portion where the LED chip will be mounted and a portion where the wire will be bonded. In other words, as shown in FIG. 29, the reflection layer 205 covers the region where the third metal layer 204 is not formed on the top surface of the insulating layer on the top surface of the element body 94 and covers a portion on the top surface of the third metal layer 204. Herein, the reflection layer 205 uses the materials listed in Table 1 or Table 11 as described above or materials listed in Table 13 to be described below.

[327] In FIG. 29, non-explained reference mineral 208, which is generally called the Ag layer 200a, the Ni layer 202a, and the Ag layer 204a, is any one (for example, anode) of the top surface electrodes. Non-explained reference numeral 210, which is generally called the Ag layer 200b, the M layer 202b, and the Ag layer 204b, is the other (for example, cathode) of the top surface electrodes. Non-explained reference mineral 209, which is generally called the Ag layer 200a, the Ni layer 202a, and the Ag layer 204a, is any one (for example, anode) of the bottom surface electrodes. Non-explained reference mineral 211, which is generally called the Ag layer 200b, the Ni layer 202b, and the Ag layer 204b, is the other (for example, cathode) of the bottom surface electrodes. In FIG. 29, non-explained reference mineral 206a is a hole for the wire bonding, reference mineral 205b is a hole in which the light-emitting device will be mounted, and a reference mineral 205c is a hole for the wire bonding.

[328] Then, as shown in FIG. 30, the LED chip 212 is mounted for each unit element region and the wire bonding 214 is then performed. In the above^nentioned ninth embodiment, two top surface electrodes are formed on the top surface of the element body 94 for each unit element region. This indicates the wire bonding scheme that connects the LED chip 212 to the top surface electrodes 208 and 210, respectively, by using two wires 214. The detailed description of the LED chip 212 is replaced with the description of the LED chip according to the first embodiment. Some regions including the regions where the light-emitting device is positioned in the external electrode on the top surface of the varistor substrate claimed in claims of the present invention mean the region where the LED chip is positioned and the region where the wire is bonded in the case of the wire bonding scheme and the eutectic bonding scheme and mean the region where the flip chip is positioned in the case of the flip bonding scheme.

[329] Finally, as shown in FIG. 31, after a substrate 216 having the cavity filled with the phosphor (not shown) is manufactured separately and attached, the element body 94 is separated into each unit element by the cutting groove 92 by mechanically and artificially applying force. Each of the separated unit elements is the LED package. In FIG. 31, although the element body 94 is attached with the substrate 216 and then separated into several unit elements, the element body 94 may be first separated into several unit elements and then attached with the substrate 216 for each unit element. The substrate for the LED package means the portion except for the LED chip and the wire.

[330] In FIG. 31, when light emitted from the LED chip 212 is output to the outside, the efficacy is changed by the reflection layer 205 formed on a base substrate lower (in FIG. 31, the lower substrate (that is, varistor substrate) on which the substrate 216 is stacked), but it can be changed by the substrate 216 having the separately manufactured cavity. The materials of the substrate 216 is various such as plastic, ceramic, metal, and the like. The materials used for the substrate 216 have different reflectivity with respect to the visible ray. As the method for increasing the reflectivity of the substrate 216, there may be an Ag plating method. However, the application of this method is limited depending on the materials of the substrate 216. Therefore, after the materials of the above^nentioned reflection layer 206 is previously coated in the inner side of the cavity and is subjected to the curing process, the substrate 216 and the lower base substrate are attached thereto.

[331] (Tenth Embodiment)

[332] FIG. 32(a) and 32(b) are views for explaining the substrate for the LED package having a function of preventing static electricity according to a tenth embodiment of the present invention and the LED package using the same. The tenth embodiment has a characteristic in that the shape of the reflection layer is different from the ninth embodiment. In other words, in the ninth embodiment, the reflection layer 206 is flat printed, but in the tenth embodiment, is formed to be rounded by the dispensing. In the case of FIG. 32(a) and 32(b), after the LED chip 212 is mounted and the substrate 216 is bonded on the base substrate 220, the reflection layer 206 is formed. The base substrate 220, which is a substrate provided for each unit element, corresponds to a varistor substrate that exists at the lower portion of the substrate 216 when the element body 94 is separated for each unit element in FIG. 31.

[333] In FIG. 32, the manufacturing process of the varistor substrate 220, the top surface electrodes 208 and 210, and the bottom surface electrodes 209 and 211 is the same as the above-mentioned ninth-embodiment and therefore, the description thereof will not be repeated. Further, the method of forming the rounded reflection layer 206 is previously sufficiently described through the above^nentioned embodiments and the detailed description thereof will not be repeated.

[334] When comparing FIGS. 32(a) and 32(b), in FIG. 32(a), all the top surfaces of the top surface electrodes 208 and 210 are exposed and in FIG. 32(b), only the top surface of the top surface electrode 208 is exposed. In the semiconductor package of the FIG. 32(a), since the mounting of the LED chip 212 and the bonding of the wire 214 may be performed after the reflection layer 206 is filled to expose the top surface of the top surface electrode 208 and 210, the defect inspection (for example, the test on whether or not the electrode is formed as it is or whether the reflection layer is formed as it is, etc.) can be performed before the mounting of the LED chip 212. Further, The LED package of FIG. 32(a) can be sufficiently sold even in the state where the LED chip 212 and the wire 214 are removed.

[335] Meanwhile, the semiconductor package of FIG. 32(b) can form the right and left symmetrical curvature on the basis of the top surface electrode 208, such that it can easily obtain the desired orientation angle as compared to the semiconductor package of FIG. 329(a). Since the semiconductor package of FIG. 32(b) is a structure where the filling of the reflection layer 206 should be made after performing the mounting of the LED chip 212 and the bonding of the wire 214, the finished product should be manufactured and sold.

[336] According to the ninth embodiment and the tenth embodiment, after the insulating layer is formed on the top surface and bottom surface of the ZnO-based varistor substrate, the top surface electrode and the bottom surface electrode are formed, such that the insulating layer prevents the erosion phenomenon of the varistor surface due to the plating liquid, thereby improving the adhesion between the top surface electrode and the varistor substrate and the adhesion between the bottom surface electrode and the varistor substrate.

[337] The insulating layer prevents the electrical short between the top surface electrode and the bottom surface electrode at the time of forming the electrode due to the plating and the peeling of the electrode at the time of performing the wire bonding.

[338] Meanwhile, the reflection layer 38 is manufactured by selecting the white TiO2,

ZnO, lithopone, ZnS, SiO2, BaSO4, and polytetrafluoroethylene (PTFE), and the like, which have small light absorbance and good reflectivity, such that light is little absorbed in the visible ray region as well as light emitted from the light-emitting device is almost all reflected, thereby increasing the efficacy as compared to the semiconductor package in the related art.

[339] Although the ninth and tenth embodiments mount one LED chip 212 on the semiconductor package, they can be sufficiently applied to a configuration where two or more LED chips are mounted as well as can obtain a larger effect.

[340] (Eleventh Embodiment)

[341] FIG. 33 is a flow chart for explaining the manufacturing process of a semiconductor package according to an eleventh embodiment. FIG. 34 is a view used for explaining the configuration and manufacturing process of the semiconductor package according to the eleventh embodiment of the present invention. FIG. 35 is a cross-sectional view taken along line A-A of FIG. 34.

[342] The above^nentioned ninth to tenth embodiments are a structure that forms the reflection layer on the top surface of the varistor substrate, while the eleventh embodiment is a structure that simply configures the substrate as the general ceramic substrate, etc., not the varistor substrate and mounts the ESD protection element or the EMI filter, etc. on the substrate and covers the ESD protection element or the EMI filter with the reflection layer.

[343] Meanwhile, since there is little difference between the configuration of the eleventh embodiment and the above^nentioned third embodiment or the fourth embodiment, the following eleventh embodiment uses the reference minerals that are used in the third embodiment or the fourth embodiment.

[344] However, as shown in FIG. 34(a), the substrate 30 is prepared (S30). The cavity 40 including the light-emitting device mounting region is formed on the substrate 30. The internal electrodes 42 and 44 are formed on the bottom surface of the cavity 40. The internal electrodes 42 and 44 are formed to be spaced from each other. The internal electrode 44 may be referred to as an anode and the internal electrode 42 may be referred to as a cathode. The detailed description of the substrate 30 will be replaced with the description of the substrate in the third embodiment or the fourth embodiment.

[345] Thereafter, as shown in FIG. 34(b), the bonding material 41 (for example, epoxy) made of Ag, and the like is coated on the position where the electric element 43 (for example, varistor, zenor diode, etc.: it is assuned that the electric element is the varistor in the following description) for protecting the light-emitting device (LED chip) from the ESD is mounted.

[346] Then, as shown in FIG. 34(c), in order to mount the varistor 43 on the surface, the varistor 43 is die-bonded on the coated bonding material 41 (S34). In other words, one side of the varistor 43 is connected to the internal electrode 44 and the other of the varistor 43 is connected to the internal electrode 42. In FIG. 34(c), one varistor 43 is mounted, but if necessary, a plurality of varistors can be mounted. Of course, the zenor diode other than the varistor may be mounted or another electric element, which can perform the ESD protection, may be mounted and if necessary, may be mounted with the EMI filter, etc.

[347] As shown in FIG. 34(d), the LED chip 34 is die-bonded (S36).

[348] As shown in FIG. 34(e), the bonding of the wire 36 is performed, such that the LED chip 34 is electrically connected to the internal electrodes 42 and 44 (S38).

[349] Hereinafter, as shown in FIG. 34(f), in order to improve the inwardly rounded reflection layer 38 in the cavity 40, white resin having high reflectivity is dispensed within the cavity 40 and is dispensed in the remaining region other than the light- emitting device mounting region (S40). As a result, the reflection layer 38 covers the inner side wall and bottom surface of the cavity 40 other than the LED chip 34. In other words, the reflection layer 38 covers the varistor 43. As shown in FIG. 35, the shape of the inwardly rounded reflection layer 38 can be sufficiently obtained by controlling the viscosity of the material of the reflection layer 38. If necessary, the gap between the internal electrode 42 and the internal electrode 44 can be or cannot be filled with the material of the reflection layer 38.

[350] The reflection layer 38 can uses the materials listed in Table 1 or Table 11. However, in the eleventh embodiment, the reflection layer 38 is formed by using the materials such as the following Table 13. Of course, in the above ^nentioned embodiments and the embodiment to be described below, materials listed in the following Table 13 are used for the reflection layer. The reflection layer 38 of the eleventh embodiment has the thermosetting property and the white reflection material (see the following Table 13) having reflectivity of approximately 90% or more is used.

[351] Table 13 [Table 13]

[352] In Table 13, as materials having good reflectivity, the white TiO2, ZnO, lithopone, ZnS, BaSO4, PTFE (polytetrafluoroethylene), and the like are used. Of course, if necessary, other materials may be further used. For example, other materials may be used instead of ZnS, BaSO4, and PTFE (polytetrafluoroethylene). For the viscosity and adhesion, for example, silicon resin or a mixture (mixing agent) of silicon resin and hardener is used. In Table 13, in order to indicate the white color and have excellent reflectivity, TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2, PTFE (polytetrafluoroethylene), and the like are used as main materials and silicon resin or a mixture (mixing agent) of silicon resin and hardener are used as sub^naterials. In Table 13, if TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2, PTFE (polytetrafluoroethylene), and the like are used below 5 wt%, it is difficult to implement the white color. If TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2, PTFE (polytetrafluoroethylene), and the like are used above 60 wt%, a small amount of sub- materials are added, such that it is difficult to obtain desired viscosity and adhesion. If silicon resin or a mixture (mixing agent) of silicon resin and hardener is used below 40 wt%, viscosity is too low. If silicon resin or a mixture (mixing agent) of silicon resin and hardener is used above 95 wt%, viscosity is too high.

[353] In order to increase the luninous flux, it is advantageous that the reflection layer 38 is white. The reflection layer should be implemented by white to make the light absorbance small. The reflection layer 38 is manufactured including any one or more of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2, and PTFE (polytetrafluoroethylene), which have small light absorbance and good reflectivity such that there is little light absorption in the visible ray region as well as light emitted from the LED chip 34 is almost all reflected, thereby increasing the efficacy (increase luninous flux). For example, when using a blue chip, TiO2 can be used and when using a UV chip, ZnO can be used.

[354] As such, if the reflection layer 38 is rounded inwardly and the white resin having excellent reflectivity is used as the material of the reflection layer, light emitted from the LED chip 34 is almost all reflected without any loss and is output upwardly. Although not shown in FIGS. 34 and 35, the upper portion of the LED chip 34 and the upper portion of the reflection layer 38 are formed with the phosphor layer. Therefore, light emitted from the LED chip 34 of FIG. 34(f) or FIG. 35 is almost all reflected without any loss by the reflection layer 38 and output as white light through the phosphor layer (not shown). In this case, when being compared with the package configuration in the related art without having the white reflection layer 38, the configuration of the package in the related art reduces the luninous flux by the varistor around the LED chip 34, but in the eleventh embodiment, since the varistor 43 has a shape existing in the reflection layer 38, the reduction of the luninous flux due to the varistor can be removed. The method of forming the rounded reflection layer 38 can be sufficiently understood through the above^nentioned embodiments and therefore, the description thereof will not be repeated.

[355] When the dispensing of the reflection layer 38 is completed, the curing is performed at a temperature of approximately 17O⁰C for approximately 2 hours so that the reflection layer 38 is well bonded to the substrate 30 (S42). The reflection layer 38 and the substrate 30 are tightly bonded to each other by the curing.

[356] By the above^nentioned process, the LED package to be implemented in the eleventh embodiment is completed.

[357] According to the eleventh embodiment, since the electric element (for example, varistor, etc.) for protecting the ESD mounted around the light-emitting device (LED chip) is covered with the white reflection layer having excellent reflectivity, the reduction of the luninous flux due to the varistor, etc., is solved.

[358] The white reflection layer having excellent reflectivity is formed around the light- emitting device, such that there is little light absorption in the visible ray region as well as light emitted from the light-emitting device is almost all reflected, thereby increasing the efficacy.

[359] In particular, since the electric element (for example, varistor, etc.) for protecting the ESD, which is parts, is mounted around the light-emitting device together with the white reflection layer, the packaging is very simple. In the related art, it is embedded in the cavity or manufactured similar to a ceramic stacking scheme to be built-in the substrate. However, in the eleventh embodiment, since it is mounted around the light- emitting device, the working process is very simple as compared to the scheme in the related art and the above^nentioned tenth embodiment.

[360] The above^nentioned ninth to eleventh embodiments describe the semiconductor package solving the problems of the semiconductor package adopting the existing varistor substrate. The following twelfth to fourteenth embodiments described an application example capable of increasing the efficacy and the color rendering index by making materials (that is, a mixture of the white reflection materials and predetermined inorganic pigments) forming the reflection layer different from the above- mentioned embodiments.

[361] (Twelfth Embodiment)

[362] A twelfth embodiment will be described with reference to the configuration of FIGS. 9 to 11. The twelfth embodiment uses a mixture of inorganic pigments (for example, ceramic pigment) corresponding to colors emitted from the LED chip 34 and the white reflection materials as the material of the reflection layer 38. Thereby, the large luminous flux is emitted from the LED chip 34 by the reflection layer 38. According to the twelfth embodiment, the semiconductor package (the semiconductor package adopting the unit LED chip), which provides larger luninous flux than the related art, can be simply implemented without using the separate plating process and the metal reflector.

[363] The semiconductor package according to the twelfth embodiment is almost similar to the configuration of the semiconductor package according to FIGS. 9 to 11 and therefore, only the reflection layer 38, which is a different component, will be described.

[364] The reflection layer 38 is rounded inwardly. The reflection layer 38 includes the inorganic pigments having colors meeting colors emitted from the LED chip 34 and the white reflection materials. For example, if the color emitted from the LED chip 34 is red, as inorganic pigments, red series ceramic pigments (that is, ceramic pigments having red color coordinates meeting the color coordinates of the red LED) are used as one example. If the color emitted from the LED chip 34 is green, as inorganic pigments, green series ceramic pigments (that is, ceramic pigments having green color coordinates meeting the color coordinates of the green LED) are used as one example. If the color emitted from the LED chip 34 is blue, as inorganic pigments, blue series ceramic pigments (that is, ceramic pigments having blue color coordinates meeting the color coordinates of the blue LED) are used as one example. Therefore, if the following exemplified ceramic pigments are used to be met with the colors the LED chip 34, the luninous flux of any color finally emitted from the semiconductor package is increased. In other words, if the red light is emitted from the LED chip 34, the red luminous flux is more increased by the red series ceramic pigment. If the green light is emitted from the LED chip 34, the green luminous flux is more increased by the green series ceramic pigment. If the blue light is emitted from the LED chip 34, the blue luninous flux is more increased by the blue series ceramic pigment.

[365] As the red series ceramic pigment, the following example can be used.

[366] 1) Zn-Al-Cr-Fe series: ZnO ^• (Al, Cr, Fe)2O3, which is a spinel of this series, has various color tones. That is, it indicates yellow, red, and dark brown inclining to black depending on the contents of A13+, Cr3+, and Fe3+. Zn-Cr-Fe series, that is, ZnO ^• (Cr, Fe)2O3 is the same as the above description.

[367] 2) Manganese pink: Mn and P is solid-dissolved in α-A12O3. MnHP04 and A1(OH)3 are mixed.

[368] 3) Chromiun-alunina pink: It is a spinel of ZnO ^• (Al, Cr)2O3. ZnO, Cr2O3,

A1(OFJ)3, etc., are mixed so that A12O3 of ZnO ^• A12O3 is substituted by Cr2O3 at about 20 mol%.

[369] 4) Chromiun-tin pink: Cr is solid-dissolved in CaO ^• SnO2 ^• SiO2. CaCO3, SnO2, and SiO2 are mixed so that CaO:SnO2:SiO2=l:l:l at a mole ratio and Cr compound such as K2Cr2O7 as coloring components and Na2B4O7 and B2O3, as mineralizers are added.

[370] 5) Salmon pink: Fe is solid-dissolved in ZrSiO4. ZrO2, SiO2, FeS04, H2O, and FeC13 and NaF, NaCl, NaN03, etc. as mineralizers are mixed.

[371] 6) Chromiun-tin lilac: Cr and Co are solid-dissolved in CaO ^• SnO2 ^• SiO2. Co is supplied as basic cobalt carbonate.

[372] 7) Fire red: Cadmiun red, which is Cd(S, Se), is coated with ZrSiO4. ZrO2, SiO2, CdCCβ, S, Se, LiF, and the like are mixed.

[373] As the green series ceramic pigments, the following example can be used.

[374] 1) Peacock: It is a spinel solid solution of (Co, Zn)O ^• (Al, Cr)2O3. CoO, ZnO, Cr2O3, and Al(0H)3, and the like are mixed. Blue is changed to bluish green by making the ratio of CoO to ZnO constant and increasing a substitution amount of A13+→Cr3+.

[375] 2) Victoria green: It is 3CaO-Cr2O3 ^• 3SiO2, which is uvarovite. SiO2, CaC03, K2Cr2O7, or Cr2O3 are mixed so that CaO:Cr2O3:SiO2=3:l:3 at a mole ratio and a small amount of CaC12, CaF2, and LiF are then added.

[376] 3) Chromiun-Alunina green: It is a α-A12O3 type solid solution of (Al, Cr)2O3. Al(0H)3 and Cr2O3 are mixed but at a mole ratio, A12O3 : Cr2O3 = 1 : 1 - 1: 5.

[377] As the blue series ceramic pigments, the following example can be used.

[378] 1) Cobalt blue: It is a spinel of CoO-nA12O3 or (Co, Zn)O-nA12O3, where n is approximately 2. CoO, ZnO, and A1(OFJ)3, and the like are mixed.

[379] 2) Co-Zn-Si series: It is a 2(Co, Zn)O ^• SiO2 ulemite type solid solution. CoO, ZnO, and SiO2, and the like are mixed so that Zn2+ of approximately 25% is substituted with Co2+at 2ZnO ^• SiO2.

[380] 3) Turkey blue: V is solid-dissolved in ZrSiO4. ZrO2, SiO2, NH4VO3 or V2O5 and NaF and NaCl as mineralizers are mixed.

[381] In the twelfth embodiment, the white reflection materials, which is mixed along with the red/green/blue ceramic pigments, is provided based on any one of Table, 1, Table 11, and Table 13. Therefore, the white reflection material used as the reflection layer 38 will not be repeated any more.

[382] The reflection layer 38 is manufactured by selecting the white TiO2, ZnO, lithopone, ZnS, BaS04, SiO2 and polytetrafluoroethylene (PTFE), and the like, which have small light absorbance and good reflectivity, such that light is little absorbed in the visible ray region as well as light emitted from the LED chip 34 is almost all reflected, thereby increasing the efficacy. In particular, the reflection layer 38 is rounded inwardly and the ceramic pigments having colors corresponding to the colors emitted from the LED chip 34 and the white reflection material are used as the materials of the reflection layer 38, such that the luninous flux of light emitted from the LED chip 34 is more increased by the reflection layer 38.

[383] When comparing the method of forming the reflection layer according to the twelfth embodiment with those of the above^nentioned other embodiments, only the difference is that the a mixture of a predetermined amount of the ceramic pigments having the same colors as those emitted from the LED chip and the white reflection material is dispensed at the time of performing the dispensing. As a result, the subsequent processes are the same as the above^nentioned other embodiments and therefore, the description thereof will not be repeated. The method of forming the reflection layer 38 according to the twelfth embodiment can be easily understood to those skilled in the art through the description of the above^nentioned embodiments.

[384] According to the above^nentioned twelfth embodiment, the reflection layer is rounded inwardly around the light-emitting device and the ceramic pigments having colors corresponding to the colors emitted from the LED chip 34 and the white reflection material are used as the materials of the reflection layer, such that the luminous flux emitted from the light-emitting device is more increased by the reflection layer. That is, the present invention can simply implement the semiconductor package that provides the luminous flux more than the related art without using the separate plating process and the metal reflector.

[385] Meanwhile, in the above-mentioned twelfth embodiment, the inorganic pigments having colors meeting the colors emitted from the LED chip and the white reflection material are used as the materials of the reflection layer, but if necessary, the organic pigments instead of the inorganic pigments may be used.

[386] (Thirteenth Embodiment)

[387] In a thirteenth embodiment, a structure capable of further increasing the luninous flux (efficacy) in the semiconductor package that emits the warm white light will be described. The thirteenth embodiment uses the white reflection material and the yellow or dark brown inorganic pigments as the materials of the reflection layer.

[388] FIG. 36 is a perspective view of a semiconductor package according to the thirteenth embodiment and FIG. 37 is a cross-sectional view taken along line A-A of FIG. 6. In FIG. 36, for convenience of explanation, the phosphor layer is not shown so that the configuration within the cavity on the semiconductor package can be easily appreciated, but in FIG. 37, the phosphor layer is shown.

[389] The semiconductor package according to the thirteenth embodiment is similar to the configuration of the third embodiment (FIGS. 9 and 10) and therefore, only the different components will be described.

[390] A phosphor layer 230 emits light from the LED chip 34 as light of the warm white (for example, a light bulb color or a thin orange color) giving gives the warm feeling, which is the color temperature of approximately 3300K or less. For example, if the LED chip 34 is the blue LED, the phosphor layer 230 may be a yellow phosphor or an orange phosphor and may be a mixture of a green phosphor or a red phosphor.

[391] The reflection layer 38 is rounded inwardly. The reflection layer is completed by mixing the yellow or dark brown inorganic pigment (for example, ceramic pigment) and the white reflection material having excellent reflectivity. The luminous flux of the warm white is increased by the reflection layer 38.

[392] As the yellow series ceramic pigments used in the thirteenth embodiment, the following examples can be used.

[393] 1) Antimony yellow: A12O3, Fe2O3, SnO2, and the like is solid-dissolved in a pyrocroa type lattice of 2PbO-Sb2O5. A1(OH)3, Fe2O3, SnO2, and the like are mixed with Pb(NO3)2 or PbO and Sb2Q5 and then, this mixture is fired at approximately 1000 to l lOO°C.

[394] 3) Vanadium-tin yellow: Vanadium (V) is solid-dissolved in SnO2. A small amount of NH4VO3 is mixed with SNO2 and then, this mixture is fired at approximately 1300⁰C. In addition, vanadium is solid-dissolved in (SnTi)O2 to control a color tone

[395] 3) Vanadium-zirconiun yellow: Vanadiun (V) is solid-dissolved in ZrO2. A small amount of V2Q5 or NH4VO3 is mixed with ZrO2 and then, this mixture is fired at approximately 1300⁰C. ZrO2-Y2O3-V2Q5 solid-dissolves Y2O3 within the range of composition that generated a single crystal ZrO2 and then, solid-dissolves vanadium and its color tone is inclined to a slight orange color. Likewise the above description, ZrO2-TiO2-V2Q5-In2O3 solid-dissolves V and In in (ZrTi)O2.

[396] 4) Praseodymiun yellow: Pr is solid-dissolved in ZrSiO4. Three or four mineralizers such as NaF, (Nffi)2MoO4, and the like are mixed with ZrO2, SiO2, PrόOl 1 and then, this mixture is fired at approximately 900⁰C.

[397] 5) Chromiun-Titaniun yellow: CrSbO4 or Cr2WO6 is solid-dissolved in TiO2.

Sb2O5, K2Cr2O7 or Na2WO4, PbCrO4, and the like is mixed with TiO2 and then, the mixture is fired at approximately 1300⁰C.

[398] 6) Zircon-cadmiun yellow: CdS or (CdZn)S is put into ZrSiO4. In other words, Cds or (CdZn)S is coated with ZrSiO4, ZrO2, SiO2, CdCCβ, SNa2SO4, ZnO, LiF, and the like are mixed in a wetting scheme and fired at approximately 1000⁰C and CdS and (CdZn)S, which is not included in ZrSiO4, are then melted using acid such as nitric acid. At this time, since the generation of CdS or (CdZn)S is completed at lower temperature than the generation temperature of ZrSiO4 and very heterogeneous materials are used such as what is coated is a sulfide and what performs a coating is a silicate, the generation of CdS or (CdZn)S and the generation of ZrSiO4 are independently from each other and progressed without an additional reaction. This can enable the preparation of Zr-Si-Cd-(Zn)-S based pignents.

[399] As the dark brown series ceramic pignents used in the thirteenth embodiment, the following example can be used.

[400] 1) Zn-Al-Cr-Fe series: ZnO ^• (Al, Cr, Fe)2O3, which is a spinel of this series, has various color tones. That is, it indicates yellow, red, and dark brown inclining to black depending on the contents of A13+, Cr3+, and Fe3+. Zn-Cr-Fe series, that is, ZnO ^• (Cr, Fe)2O3 is the same as the above description. Each oxide is mixed and fired at approximately 1200 to 1300 ⁰C.

[401] 2) Zr-Si-Pr-Fe series: It is a mixture of the praseodymiun yellow, which is Zr-Si-Pr series, and the salmon pink, which is Zr-Si-Fe series and can variously indicate intermediate colors of two components.

[402] 3) Zr-Ti-Fe-V series: V and Fe are solid-dissolved in ZrO2 type monoclinic mother lattice that is (ZrTi)O2 series. Each oxide is mixed and fired at approximately 1200 to 1300⁰C.

[403] In thirteenth embodiment, the white reflection materials mixed with the dark brown ceramic pigments are provided based on any one of Table 1, Table 11, and Table 13 as described above. Therefore, the white reflection material used as the reflection layer 38 will not be repeated any more.

[404] As such, the reflection layer 38 is rounded inwardly and the yellow or dark brown ceramic pigments and the white reflection material having excellent reflectivity are used as the materials of the reflection layer 38, such that light from the LED chip 34 is almost all reflected without any loss by the reflection layer 38 and output as the warm white light through the phosphor layer 230. In other words, since light from the LED chip is more reflected by the reflection layer 38 and transmits the phosphor layer 230, the luninous flux of the warm white light emitted through the phosphor layer 230 is increased. In other words, the thirteenth embodiment can simply implement the semiconductor package that provides the luminous flux of the warm white more than the semiconductor package in the related art that can output the warm white light.

[405] When comparing the method of forming the reflection layer 38 according to the thirteenth embodiment with the above^nentioned other embodiments, only the difference is that a mixture of the yellow or dark brown ceramic pigments and the white reflection materials is dispensed at the time of performing the dispensing. As a result, the subsequent processes are the same as the above^nentioned other embodiments and therefore, the description thereof will not be repeated.

[405] The thirteenth method can be sufficiently applied to the semiconductor package whose the reflection layer 38 is flat. The method of flat forming the reflection layer is previously described in the above ^nentioned other embodiments and therefore, can be easily understood to those skilled in the art.

[407] According to the above^nentioned thirteenth embodiment, since light from the light- emitting device is more reflected by the reflection layer made of the yellow or dark brown series ceramic pigments and the white reflection materials and transmits the phosphor layer, the luminous flux of the warm white light emitted through the phosphor layer is increased. In other words, the thirteenth embodiment can simply implement the semiconductor package that provides the luninous flux of the warm white more than the semiconductor package in the related art that can output the warm white light.

[408] The reflection layer (reflector) is formed by using the yellow or dark brown inorganic pigments (ceramic pigments) as some materials, thereby additionally obtaining an effect of improving the color rendering index (CRI) of light emitted from the semiconductor package.

[409] Meanwhile, the above ^nentioned thirteenth embodiment uses the yellow or dark brown inorganic pigments and the white reflection materials as the materials of the reflection layer but if necessary, the organic pigments instead of the inorganic pigments may be used.

[410] (Fourteenth Embodiment)

[411] A fourteenth embodiment will describe a structure that improves the color rendering index of emitted white light. The fourteenth embodiment uses the white reflection material and the red inorganic pigment or red phosphor as the materials of the reflection layer.

[412] A configuration of a semiconductor package of the fourteenth embodiment is almost similar to the configuration of the thirteenth embodiment and therefore, only the different components will be described.

[413] In the fourteenth embodiment, the phosphor layer 230 emits the white light in the LED chip 34. For example, if the LED chip 34 is the blue LED, it is understood that the phosphor within the phosphor layer 230 is a yellow phosphor. Therefore, it can be considered that the phosphor layer 230 is a mixture of a yellow phosphor and a silicon (or epoxy).

[414] The reflection layer 38 is rounded inwardly. If the red light is added to the white light, the color rendering index is high, such that the reflection layer 38 is manufactured by mixing the white reflection materials having excellent reflectivity and the red inorganic pigments. Unlike this, the reflection layer 38 may be manufactured by mixing the white reflection materials having excellent reflectivity and the red phosphor. If the blue light from the LED chip 34 collides on the reflection layer 38, the blue light to which the red light is added is emitted as the red light through the phosphor layer 230. At this time, the red light is slightly added to the white light emitted from the phosphor layer 230, such that the color rendering index becomes high.

[415] In the fourteenth embodiment, the white reflection materials, which are mixed with the red inorganic pigment or the red phosphor, are provided based on any one of Table 1, Table 11, and Table 13 as described above. Therefore, the white reflection material used as the reflection layer 38 will not be repeated any more.

[416] The reason for using the white reflection materials (see Table 1, Table 11, and Table 13) having excellent reflectivity as the materials of the reflection layer is that even although the contents of the red inorganic pigment or the red phosphor are small, the blue light from the LED chip 34 collides on the reflection layer 38 so as to make it the blue light added with the red light and to progress it toward the phosphor layer 230.

[417] When the reflection layer 38 is implemented by only the red inorganic pigment or the red phosphor, the rounded shape is not completely implemented as well as since there is the a large amount of red component, light emitted through the phosphor layer 230 is red light, not the white light.

[418] Since the white has the smaller light absorbance than other colors, the reflection layer 38 uses the white TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2, and polytetrafluo- roethylene (PTFE), and the like, which have small light absorbance and good reflectivity, as seme materials, such that there is little the light absorption in the visible ray region as well as light emitted from the plurality of LED chips 34 can be almost all reflected.

[419] Therefore, it is important to use the white reflection materials (see Table 1, Table 13, and Table 13) having excellent reflectivity. When the white reflection materials having excellent reflectivity are mixed with the red inorganic pigment or the red phosphor, even though the amount of the red series inorganic pigment or the red phosphor is small, the color rendering index of the white light can be high.

[420] As the red series inorganic pigments (ceramic pigments in the present invention) used in the fourteenth embodiment, the following examples can be used.

[421] 1) Zn-Al-Cr-Fe series: ZnO ^• (Al, Cr, Fe)2O3, which is a spinel of this series, has various color tones. That is, it indicates yellow, red, and dark brown inclining to black depending on the contents of A13+, Cr3+, and Fe3+. Zn-Cr-Fe series, that is,

ZnO ^• (Cr, Fe)2O3 is the same as the above description. Each oxide is mixed and fired at approximately 1200 to 1300 ⁰C.

[422] 2) Manganese pink: Mn and P is solid-dissolved in α-A12O3. MnHP04 and A1(OFJ)3 are mixed and fired at approximately 1200 to 1300⁰C.

[423] 3) Chrαmiun-alunina pink: It is a spinel of ZnO, ^• (Al, Cr)2O3. ZnO, Cr2O3,

Al(0H)3, etc., are mixed so that A12O3 of ZnO ^• A12O3 is substituted by Cr2O3 at about 20 mol% and fired at 1300⁰C.

[424] 4) Chrcmurn-tin pink: Cr is solid-dissolved in CaO ^• SnO2 ^• SiO2. CaCO3, SnO2, and SiO2 are mixed so that CaO:SnO2:SiO2=l:l:l at a mole ratio and Cr compound such as K2Cr2O7 as coloring components and Na2B4O7, B2O3, and the like as min- eralizers are added and fired at approximately 1200⁰C.

[425] 5) Salmon pink: Fe is solid-dissolved in ZrSiO4. ZrO2, SiO2, FeSO4, H2O, and FeC13 and NaF, NaCl, NaNO3, etc. as mineralizers are mixed and fired at approximately 900⁰C.

[426] 6) Chromiun-tin lilac: Cr and Co are solid-dissolved in CaO ^• SnO2 ^• SiO2. Co is supplied as basic cobalt carbonate. It is fired at approximately 1200⁰C.

[427] 7) Fire red: Cadmiun red, which is Cd(S, Se), is coated with ZrSiO4. ZrO2, SiO2, CdCO3, S, Se, LiF, and the like are mixed and fired at approximately 900⁰C.

[428] When comparing the method of forming the reflection layer 38 using the red ceramic pigment with the above ^nentioned other embodiments, only the difference is that a mixture of the red ceramic pigments and the white reflection materials is dispensed at the time of performing the dispensing. As a result, the subsequent processes are the same as the above^nentioned other embodiments and therefore, the description thereof will not be repeated. This can be sufficiently understood to those skilled in the art through the description of the above^nentioned embodiments.

[429] Meanwhile, if necessary, the organic pigments instead of the inorganic pigments may be used.

[430] Hereinafter, the reflection layer 38 using the red phosphor and the white reflection material will be described. This will be described with respect to FIGS. 38 to 42. When comparing the method of forming the reflection layer 38 by mixing the red phosphor to be described below and the white reflection materials with the above-described other embodiments, only the difference is that a mixture of the red ceramic pigments and the white reflection materials is dispensed at the time of performing the dispensing. As a result, the subsequent processes are the same as the above^nentioned other em- bodiments and therefore, the description thereof will not be repeated. This can be sufficiently understood to those skilled in the art through the description of the above- mentioned embodiments.

[431] It can be sufficiently applied to the semiconductor package that flat forms the reflection layer 38. The method of flat forming the reflection layer is previously described in the above^nentioned other embodiments and therefore, can be easily understood to those skilled in the art.

[432] In FIGS. 38 to 41, IF is a forward rated current of the light-emitting device (LED chip) and VF is a forward rated voltage of the light-emitting device (LED chip). Chrom x and Chrom y are color coordinates x and y based on CIE 1941. When observing a wave that periodically shows the repeated shape in the state where the flow of time stops, a distance between valleys is referred to as a wavelength in a wave. A peak wave means a portion (that is, a peak of a wavelength) where light of a LED source measured by applying current is the strongest and Dom Wave means a portion where an end point of an extension line contacts the LED source measured by applying current from a center of a CIE diagram. Color Tern is a color temperature and Gen CRI is color rendering property (color rendering index). IV, which means intensity of light, indicates how much luminous flux is emitted in any direction from a light source. The total luninous flux (TLF) means a total output amount (luninous flux) of light rays that are emitted from a light source and recognized to the eye. The efficacy means a value that divides a total output amount of light rays, which are emitted from a light source and recognized to the eye, by voltage and current applied. The efficacy means a value that divides an output amount of light generated from a light source upon applying current by voltage and current applied. When the efficacy is represented by an equation, it is " ((IF*VF/1000))/output amount from light".

[433] Data sheets shown in FIGS. 38 to 41 show the result values experimented using different mixing ratio of the materials of the reflection layer 38 in the general LED package (for example, in the case where the package size is 3030). FIGS. 38 to 41 show the case where the reflection layer 38 is made of only the white reflection material, the case where the reflection layer 38 is made of the white reflection material 98 wt% + the red phosphor 2 wt%, the case where the reflection layer 38 is the white reflection material 96 wt% + the red phosphor 4 wt%, the case where the reflection layer 38 is made of the white reflection material 94 wt% + the red phosphor 6 wt%, the case where the reflection layer 38 is made of the white reflection material 92 wt% + the red phosphor 8 wt%, the case where the reflection layer 38 is made of the white reflection material 90 wt% + the red phosphor 10 wt%, the case where the reflection layer 38 is made of the white reflection material 80 wt% + the red phosphor 20 wt%, the case where the reflection layer 38 is made of the white reflection material 70 wt% + the red phosphor 30 wt%, the case where the reflection layer 38 is made of the white reflection material 60 wt% + the red phosphor 40 wt%, the case where the reflection layer 38 is made of the white reflection material 40 wt% + the red phosphor 60 wt%, the case where the reflection layer 38 is made of the white reflection material 20 wt% + the red phosphor 80 wt%, and the case where the reflection layer 38 is made of the white reflection material to the red phosphor 100 wt% (that is, a ratio of the white reflection material to the red phosphor is 1 : 1). Of course, the present applicant also performed the experiment on the case where the reflection layer 38 is made of the white reflection material 1 to 99 wt% + the red phosphor 1 to 99 wt% in addition to the above exemplified cases. Among others, several examples are selected, which is shown in FIGS. 38 to 41. FIG. 41 shows the case where the reflection layer 38 is made of the white reflection material to the red phosphor 100 wt% (that is, a ratio of the white reflection material to the red phosphor is 1 : 1), but the present applicant performed the experiment on the case where the reflection layer 38 is made of the white reflection material to the red phosphor 200 wt% (that is, a ratio of the white reflection material to the red phosphor is 1 : X). Herein, the red phosphor 1 wt% does not means exactly 1 wt%, but is considered as including the case where the red phosphor smaller than 1 wt% is mixed.

[434] The change in the color rendering index and luninous flux corresponding to each case based on the data sheets shown in FIGS. 38 to 41 is shown in the following Table 14.

[435] Table 14

[Table 14]

[436] In Table 14, it is assuned that each of the color rendering index (CRI) 72.3 and the total output amount (luninous flux) (TLF) 30 are 100% in the case where the reflection layer 38 is made of only white reflection material.

[437] As shown in FIGS. 41 and 42, if the red phosphor from very small amount to very large amount is mixed with the white reflection material, it can be appreciated that the color rendering index is higher as compared to the case where the reflection layer 38 is made of only the white reflection material. The general white LED color rendering index indicates about 70 to 80 and the LED package of the case where the white reflection material and the red phosphor are mixed satisfies the nunerical values as well as indicates the high color rendering property from the predetermined mixing ratio (for example, in the case of 6 wt%) of the red phosphor. The high color rendering property means the high color rendering index and in the fourteenth embodiment, the high color rendering index means the color rendering index of approximately 78 or more. Of course, the reference value of the high color rendering index may be a numerical value (for example, about 75) lower than 78 or a nunerical value (for example, about 80) higher than 78.

[438] Meanwhile, as shown in FIGS. 41 and 42, if the white reflection material and the red phosphor are mixed, the color rendering index is high, but as the mixing ratio of the red phosphor is high, the total luninous flux (TLF) is reduced.

[439] Therefore, in order to satisfy the color rendering index of 70 or more, the reflection 38 should have the mixing ratios corresponding to all the cases listed above.

[440] However, when the reflection layer is made of only the white reflection material, if it wants to consider the luminous flux loss amount and to obtain the high color rendering property (that is, color rendering property (that is, color rendering index), it is most preferable to mix the white reflection material of 80 to 94 wt% and the red phosphor of 6 to 20 wt% (see the case of 4 shown in FIG. 39, the cases of 5 and 6 shown in FIG. 40, and the case of 7 shown in FIG. 41). In other words, even when the amount of the red phosphor is larger than 20 wt%, the color rendering index is high but the loss of the luminous index is large. Further, since the red phosphor is expensive, when a large amount of red phosphor is used, the manufacturing cost is increased. Of course, when it disregards the loss of luninous flux and wants to obtain the high color rendering property, the LED package having a larger amount of red phosphor than 20 wt% may be used. The portion of the luninous flux loss can be supplemented by other methods.

[441] Further, the present applicant can understand through the experiments that the high color rendering index can be implemented by controlling the contents of the material of the reflection layer according to the package size of the LED package. For example, when it wants to obtain the color rendering index (CRI) of 80 or more, the LED package of 3030 size can obtain a small loss of luminous flux and the color rendering index (CRI) of 80 or more if the content of the red phosphor is 8 to 10 wt% and the white reflection material is 90 to 92 wt%. The LED package of 5050 size can obtain and a small loss of luminous flux and the color rendering index (CRI) of 80 or more if the content of the red phosphor is 4 to 10 wt% and the white reflection material is 90 to 96 wt%.

[442] It can be appreciated that the change in the color rendering index is large according to the color temperature. In other words, the desired color rendering index can be implemented by controlling the contents of the material of the reflection layer according to the color temperature. For example, when the LED package having the size of 3030 or less wants to obtain the color rendering index (CRI) of 80 or more at the color temperature of 5000K to 6000K, the content of the red phosphor is approximately 10 wt%. When the LED package having the size of 3030 or less wants to obtain the color rendering index (CRI) of 80 or more at the color temperature of 6000K to 7000K, the content of the red phosphor is approximately 7 to 9 wt%. When the LED package having the size of 3030 or less wants to obtain the color rendering index (CRI) of 80 or more at the color temperature of 7000K to 8000K, the content of the red phosphor is approximately 4 to 7 wt%. When the LED package having the size of 4040 or more wants to obtain the color rendering index (CRI) of 80 or more at the color temperature of 5000K to 6000K, the content of the red phosphor is approximately 8 wt%. When the LED package having the size of 4040 or less wants to obtain the color rendering index (CRI) of 80 or more at the color temperature of 6000K to 7000K, the content of the red phosphor is approximately 5 to 8 wt%. When the LED package having the size of 4040 or less wants to obtain the color rendering index (CRI) of 80 or more at the color temperature of 7000K to 8000K, the content of the red phosphor is approximately 3 to 5 wt%.

[443] In particular, as shown in FIG. 42, if the content of the red phosphor is above a predetermined amount, the color rendering index can be obtained, but as the content of the red phosphor is large, the loss of the luninous flux is large. Therefore, the content of the red phosphor in the semiconductor package completed by the fourteenth embodiment is selectively adopted according to the use purpose.

[444] According to the fourteenth embodiment, if the red series inorganic pigment or the red phosphor and the white reflection material are used as the materials of the reflection layer 38, light from the LED chip 34 is almost all reflected without any loss by the reflection layer and output as the white light added with red through the phosphor layer 230. In this case, the red light is naturally mixed with the white light emitted through the phosphor layer 230 to increase the color rendering index of the white light.

[445] In particular, due to the use of the white reflection material having good reflectivity, even when a very small amount of red series inorganic pigment or red phosphor is used, it is possible to add the red light to the white light emitted through the phosphor layer 230. This can improve the color rendering index of the emitted white light.

[446] Further, the reflection layer (reflector) can be easily formed without using the separate plating process or the metal reflector as compared to the related art as well as the output of the white light having the improved color rendering index can be simply implemented as compared to the semiconductor package in the related art.

[447] The fourteenth embodiment uses the red series inorganic pigment or the red phosphor and the white reflection material as the material of the white reflection material, but if necessary, the organic pigment instead of the inorganic pigment can be used.

[448] The present invention is not limited to the above^nentioned embodiments, but can be changed and modified within the scope departing from the subject of the present invention and the changed and modified technical ideas can be considered as being included in the scope of the following claims.

Claims

[I] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a light-emitting device mounted in the light-emitting device mounting region; and a white reflection layer that is formed in the cavity and covers a bottom surface and an inner side wall of the cavity around the light-emitting device. [2] The semiconductor package according to claim 1, wherein the reflection layer is rounded inwardly. [3] The semiconductor package according to claim 1, wherein the reflection layer includes a white resin. [4] The semiconductor package according to claim 1, wherein the reflection layer includes at least one of TiO2, ZnO, and lithopone. [5] The semiconductor package according to claim 1, wherein the reflection layer includes one of TiO2, ZnO, and lithopone as main materials, the main materials being added by 5 to 25 wt%. [6] The semiconductor package according to claim 5, wherein the reflection layer

which is silicon resin of 30 to 50 wt% and epoxy resin of 25 to 65 wt%, are used with the main materials. [7] The semiconductor package according to claim 1, wherein the reflection layer includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE

(poly tetrafluoroethylene) . [8] The semiconductor package according to claim 1, wherein the reflection layer includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE

(poly tetrafluoroethylene), the main materials being added by 5 to 60 wt%. [9] The semiconductor package according to claim 8, wherein the reflection layer uses sub^naterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. [10] The semiconductor package according to claim 8, wherein the reflection layer uses sub^riaterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials.

[I I] The semiconductor package according to claim 1, wherein one of a transparent silicon layer and a phosphor layer is further formed on the upper portion of the reflection layer. [12] The semiconductor package according to claim 1, further comprising an electrode that is formed at a bottom surface of the cavity and has the light- emitting device mounted on the top surface thereof, wherein the reflection layer is formed to expose the top surface of the electrode. [13] The semiconductor package according to claim 12, wherein the shape of the electrode is the same as the shape of the cavity. [14] The semiconductor package according to claim 1, further comprising a dam formed to surround the light-emitting device mounting region. [15] The semiconductor package according to claim 14, wherein the shape of the dam is the same as the shape of the cavity. [16] The semiconductor package according to claim 14, further comprising an electrode that is formed at the bottom surface of the cavity on the substrate and has the light-emitting device mounted the top surface thereof, wherein the dam is formed on the top surface of the electrode. [17] The semiconductor package according to claim 16, further comprising a separate electrode formed at the bottom surface of the cavity to be spaced from the electrode. [18] The semiconductor package according to claim 17, wherein the reflection layer is formed to cover the separate electrode. [19] The semiconductor package according to claim 17, wherein the reflection layer is formed to expose the top surface of the separate electrode. [20] The semiconductor package according to claim 1, wherein the light-emitting device is configured of one or more LED chip. [21] A semiconductor package comprising: a substrate formed with an electrode on which a light-emitting device is mounted; and a white reflection layer formed in the remaining region other than the light- emitting device mounting region on the top surface of the substrate. [22] The semiconductor package according to claim 21, wherein The reflection layer is formed flat. [23] The semiconductor package according to claim 21, wherein the reflection layer is formed to expose the top surface of the electrode and to contact the edge of the electrode. [24] The semiconductor package according to claim 21, further comprising a separate substrate having a cavity that surrounds the light-emitting device mounting region.

[25] A substrate for a semiconductor package comprising: a substrate on which an internal electrode and an external electrode are formed, wherein the external electrode is formed on a portion of the top surface and bottom surface of the varistor substrate via an insulating layer and the external electrode is electrically connected to the internal electrode through the insulating layer and the white reflection layer is formed in the remaining region other than some regions where a light-emitting device is positioned on the top surface of the substrate.

[26] The substrate for a semiconductor package according to claim 25, wherein the substrate includes varistor materials

[27] The substrate for a semiconductor package according to claim 25, wherein the insulating layer includes at least one of BaO, CaO, K2O, and ZnO.

[28] The substrate for a semiconductor package according to claim 25, wherein the insulating layer includes BaO of 3 to 9 wt%, CaO of 9 to 15 wt%, K2O of 3 to 9 wt%, and ZnO of 3 to 10 wt% as main materials.

[29] The substrate for a semiconductor package according to claim 28, wherein the insulating layer uses a sub-material, which are a mixture of A12O3 of 5 to 9 wt%, SiO2 of 50 to 65 wt%, TiO2 of 1 to 5 wt%, and B2O3 of 2 to 6 wt%, together with the main materials.

[30] The substrate for a semiconductor package according to claim 25, wherein the reflection layer is formed flat.

[31] The substrate for a semiconductor package according to claim 25, wherein the reflection layer is rounded inwardly.

[32] A semiconductor package comprising: a substrate on which an internal electrode and an external electrode are formed; and a light-emitting device mounted on the upper surface of the substrate, wherein the external electrode is formed on a portion of the top surface and bottom surface of the substrate via an insulating layer and the external electrode is electrically connected to the internal electrode through the insulating layer and a white reflection layer is formed in the remaining region other than some regions including regions where the light-emitting device is positioned on the top surface of the substrate. [33] A semiconductor package comprising: a substrate having a cavity on which a light-emitting device is mounted; an electric element that is mounted on the cavity and is other than the light- emitting device; and a white reflection layer that is formed in the remaining region other than the light-emitting device mounting region in the cavity and covers the electric element.

[34] The semiconductor package according to claim 33, wherein the electric element is an electric element protecting the light-emitting device from an ESD.

[35] The semiconductor package according to claim 33, wherein the reflection layer is rounded inwardly.

[36] A semiconductor package comprising: a substrate having a cavity formed with a light-emitting device mounting region; and a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region, wherein the reflection layer includes inorganic pigments having colors meeting colors emitted from the light-emitting device and white reflection materials.

[37] The semiconductor package according to claim 36, wherein the reflection layer is rounded inwardly.

[38] The semiconductor package according to claim 36, wherein in the case where the color emitted from the light-emitting device is red, the inorganic pigment is a red series ceramic pigment and the white reflection material include at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (polytetrafluoroethylene).

[39] The semiconductor package according to claim 36, wherein in the case where the color emitted from the light-emitting device is red, the inorganic pigment is a red series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE (polytetrafluoroethylene) as main materials, the main materials being added by 5 to 60 wt%.

[40] The semiconductor package according to claim 39, wherein the white reflection material uses sub^riaterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials.

[41] The semiconductor package according to claim 39, wherein the white reflection materials use sub^riaterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials. [42] The semiconductor package according to claim 36, wherein in the case where the color emitted from the light-emitting device is green, the inorganic pigment is a green series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE

(poly tetrafluoroethylene) . [43] The semiconductor package according to claim 36, wherein in the case where the color emitted from the light-emitting device is green, the inorganic pigment is a green series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE

(poly tetrafluoroethylene) as main materials, the main materials being added by 5 to 60 wt%. [44] The semiconductor package according to claim 43, wherein the white reflection material uses sub^riaterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. [45] The semiconductor package according to claim 43, wherein the white reflection material use sub^naterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials. [46] The semiconductor package according to claim 36, wherein in the case where the color emitted from the light-emitting device is blue, the inorganic pigment is a blue series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE

(poly tetrafluoroethylene) . [47] The semiconductor package according to claim 36, wherein in the case where the color emitted from the light-emitting device is blue, the inorganic pigment is a blue series ceramic pigment and the white reflection material includes at least one of TiO2, ZnO, lithopone, ZnS, BaSO4, SiO2. PTFE

(poly tetrafluoroethylene) as main materials, the main materials being added by 5 to 60 wt%. [48] The semiconductor package according to claim 47, wherein the white reflection material uses sub^riaterials, which are silicon resin of 5 to 30 wt% and epoxy resin of 20 to 65 wt%, together with the main materials. [49] The semiconductor package according to claim 47, wherein the white reflection material use sub^naterials of 40 to 95 wt%, which are silicon resin or a mixture of silicon resin and hardener, together with main materials. [50] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; and a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region, wherein the reflection layer includes inorganic pigments having colors meeting colors emitted from the light-emitting device and white reflection materials. [51] The semiconductor package according to claim 50, wherein the reflection layer is formed flat. [52] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and yellow inorganic pigments. [53] The semiconductor package according to claim 52, wherein the reflection layer is rounded inwardly. [54] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and dark brown inorganic pigments. [55] The semiconductor package according to claim 54, wherein the reflection layer is rounded inwardly. [56] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and yellow inorganic pigments. [57] The semiconductor package according to claim 56, wherein the reflection layer is formed flat. [58] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as warm white light, wherein the reflection layer includes white reflection materials and dark brown inorganic pigments. [59] The semiconductor package according to claim 58, wherein the reflection layer is formed flat. [60] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red series inorganic pigments. [61] The semiconductor package according to claim 60, wherein the reflection layer is rounded inwardly. [62] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the inner side wall and bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red phosphors. [63] The semiconductor package according to claim 62, wherein the reflection layer is rounded inwardly. [64] The semiconductor package according to claim 62, wherein in the reflection layer, the white reflection material of 1 to 99 wt% and the red phosphor of 1 to

99 wt% are mixed. [65] The semiconductor package according to claim 64, wherein in the reflection layer, the white reflection material of 80 to 94 wt% and the red phosphor of 6 to

20 wt% are mixed. [66] The semiconductor package according to claim 64, wherein in the reflection layer, the red phosphor is 100 to 200 wt% with respect to the white reflection material. [67] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red series inorganic pigments. [68] The semiconductor package according to claim 67, wherein the reflection layer is formed flat. [69] A semiconductor package comprising: a substrate having a cavity in which a light-emitting device mounting region is formed; a reflection layer that is formed in the cavity to cover the bottom surface of the cavity and formed in a portion other than the light-emitting device mounting region; and a phosphor layer that is filled in the cavity to emit light from the light-emitting device as white light, wherein the reflection layer includes white reflection materials and red phosphors. [70] The semiconductor package according to claim 69, wherein the reflection layer is formed flat. [71] The semiconductor package according to claim 69, wherein in the reflection layer, the white reflection material of 1 to 99 wt% and the red phosphor of 1 to

99 wt% are mixed. [72] The semiconductor package according to claim 71, wherein in the reflection layer, the white reflection material of 80 to 94 wt% and the red phosphor of 6 to

20 wt% are mixed. [73] The semiconductor package according to claim 69, wherein in the reflection layer, the red phosphor is 100 to 200 wt% with respect to the white reflection material. [74] A manufacturing method of a semiconductor package comprising: preparing a substrate having a cavity; mounting a light-emitting device in a light-emitting device mounting region within a cavity; and forming a white reflection layer that is formed in the cavity and covers a bottom surface and an inner side wall of the cavity around the light-emitting device. [75] The manufacturing method of a semiconductor package according to claim 74, wherein the forming the reflection layer forms the reflection layer so as to have an inwardly rounded shape. [76] The manufacturing method of a semiconductor package according to claim 74, further comprising forming a dam that surrounds the light-emitting device mounting region, prior to the forming the reflection layer. [77] The manufacturing method of a semiconductor package according to claim 74, wherein the preparing the substrate includes forming an electrode whose top surface is the light-emitting device mounting region on the bottom surface of the cavity. [78] The manufacturing method of a semiconductor package according to claim 77, wherein the forming the reflection layer forms the reflection layer prior to mounting the light-emitting device on the electrode. [79] The manufacturing method of a semiconductor package according to claim 77, wherein the forming the reflection layer forms the reflection layer after mounting the light-emitting device on the electrode. [80] A manufacturing method of a semiconductor package comprising: preparing a substrate on which an electrode having a light-emitting device mounted thereon; and forming a white reflection layer in the remaining region other than a region where the light-emitting device is mounted on the top surface of the substrate. [81] The manufacturing method of a semiconductor package according to claim 80, wherein the forming the reflection layer forms the reflection layer to be flat. [82] The manufacturing method of a semiconductor package according to claim 80, wherein the forming the reflection layer forms the reflection layer to expose the top surface of the electrode and contact to an edge of the electrode. [83] A manufacturing method of a semiconductor package according to an exemplary embodiment of the present invention comprising: a first step preparing a lower substrate; a second step forming a white reflector having an inwardly rounded cavity whose center is perforated by injecting white reflection materials into a forming mold by a transfer molding; and a third step bonding the white reflector to the upper surface of the lower substrate. [84] The manufacturing method of a semiconductor package according to claim 83, wherein the first step includes forming an electrode pattern on the top surface of the lower substrate. [85] The manufacturing method of a semiconductor package according to claim 83, wherein in the first step, the materials of the lower substrate is any one of metal, ceramic, varistor, and plastic. [86] The manufacturing method of a semiconductor package according to claim 83, further comprising mounting one or more LED chip on the lower substrate. [87] A manufacturing method of a semiconductor package comprising: forming a laminate where a plurality of sheets having a plurality of unit element regions are stacked; forming a cutting groove having a predetermined depth at the top surface and bottom surface of the laminate based on a border of the unit element regions; forming an insulating layer on the top surface of the laminate; sintering the laminate on which the insulating layer is formed; forming the electrode on the top surface of the sintered laminate; and after forming the electrode, separating the sintered laminate into each unit element by using the cutting groove. [88] The manufacturing method of a semiconductor package according to claim 87, wherein the plurality of sheets includes a varistor material. [89] The manufacturing method of a semiconductor package according to claim 87, wherein the forming the cutting groove forms the cutting groove to have a V- letter shape. [90] The manufacturing method of a semiconductor package according to claim 87, wherein the forming the insulating layer forms the insulating layer for each unit element region. [91] A manufacturing method of a semiconductor package comprising: forming a laminate where a plurality of sheets having a plurality of unit element regions are stacked; forming a cutting groove having a predetermined depth at the top surface and bottom surface of the laminate based on a border of the unit element regions; forming an insulating layer on the top surface of the laminate; sintering the laminate on which the insulating layer is formed; forming the electrode on the top surface of the sintered laminate; forming a white reflection layer in the remaining region other than a portion where the light-emitting device is mounted on the top surface of the laminate after forming the electrode; mounting the light-emitting device on the top surface of the laminate; bonding a substrate having a cavity on the upper portion of the laminate; and separating the laminate into each unit element by using the cutting groove. [92] The manufacturing method of a semiconductor package according to claim 91, wherein the forming the reflection layer forms the reflection layer to be flat. [93] A manufacturing method of a semiconductor package comprising: forming a laminate where a plurality of sheets having a plurality of unit element regions are stacked; forming a cutting groove having a predetermined depth at the top surface and bottom surface of the laminate based on a border of the unit element regions; forming an insulating layer on the top surface of the laminate; sintering the laminate on which the insulating layer is formed; forming the electrode on the top surface of the sintered laminate; mounting the light-emitting device on the top surface of the laminate; bonding a substrate having a cavity on the upper portion of the laminate; forming a white reflection layer in the cavity to cover the inner side wall and bottom surface of the cavity and in a portion other than a region where the light- emitting device is mounted on the top surface of the laminate after forming the electrode; and separating the laminate into each unit element by using the cutting groove. [94] The manufacturing method of a semiconductor package according to claim 93, wherein the forming the reflection layer forms the reflection layer so as to have an inwardly rounded shape.