WO2003081667A1 - Semiconductor device and production method therefor - Google Patents
Semiconductor device and production method therefor Download PDFInfo
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- WO2003081667A1 WO2003081667A1 PCT/JP2003/003493 JP0303493W WO03081667A1 WO 2003081667 A1 WO2003081667 A1 WO 2003081667A1 JP 0303493 W JP0303493 W JP 0303493W WO 03081667 A1 WO03081667 A1 WO 03081667A1
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- gate electrode
- insulating film
- film
- semiconductor device
- forming
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 85
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 239000000758 substrate Substances 0.000 claims abstract description 75
- 238000007667 floating Methods 0.000 claims abstract description 46
- 125000004433 nitrogen atom Chemical group N* 0.000 claims abstract description 31
- 229910000449 hafnium oxide Inorganic materials 0.000 claims abstract description 6
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims abstract description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 101
- 239000007789 gas Substances 0.000 claims description 84
- 229910052757 nitrogen Inorganic materials 0.000 claims description 52
- 238000000034 method Methods 0.000 claims description 43
- 230000015572 biosynthetic process Effects 0.000 claims description 33
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 20
- 238000004544 sputter deposition Methods 0.000 claims description 19
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 17
- 238000000137 annealing Methods 0.000 claims description 15
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims description 11
- 229910001882 dioxygen Inorganic materials 0.000 claims description 11
- 229910052735 hafnium Inorganic materials 0.000 claims description 11
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 11
- 229910052786 argon Inorganic materials 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 10
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 5
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 1
- 150000002902 organometallic compounds Chemical class 0.000 claims 1
- 230000008685 targeting Effects 0.000 claims 1
- 238000009413 insulation Methods 0.000 abstract 3
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 29
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 12
- 238000000231 atomic layer deposition Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 10
- 238000010926 purge Methods 0.000 description 10
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 7
- 230000014759 maintenance of location Effects 0.000 description 7
- 230000010287 polarization Effects 0.000 description 6
- 239000002994 raw material Substances 0.000 description 6
- 230000007246 mechanism Effects 0.000 description 5
- 229910052697 platinum Inorganic materials 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000005086 pumping Methods 0.000 description 4
- SDHZVBFDSMROJJ-UHFFFAOYSA-N CCCCO[Hf] Chemical group CCCCO[Hf] SDHZVBFDSMROJJ-UHFFFAOYSA-N 0.000 description 3
- UAOMVDZJSHZZME-UHFFFAOYSA-N diisopropylamine Chemical compound CC(C)NC(C)C UAOMVDZJSHZZME-UHFFFAOYSA-N 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- PNJKNPLISSQCGM-UHFFFAOYSA-N C(=O)(O)C[Hf] Chemical compound C(=O)(O)C[Hf] PNJKNPLISSQCGM-UHFFFAOYSA-N 0.000 description 2
- 229910004143 HfON Inorganic materials 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- 238000004833 X-ray photoelectron spectroscopy Methods 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 2
- 239000001272 nitrous oxide Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 241000894007 species Species 0.000 description 2
- GETQZCLCWQTVFV-UHFFFAOYSA-N trimethylamine Chemical compound CN(C)C GETQZCLCWQTVFV-UHFFFAOYSA-N 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- JWZZKOKVBUJMES-UHFFFAOYSA-N (+-)-Isoprenaline Chemical compound CC(C)NCC(O)C1=CC=C(O)C(O)=C1 JWZZKOKVBUJMES-UHFFFAOYSA-N 0.000 description 1
- YQTCQNIPQMJNTI-UHFFFAOYSA-N 2,2-dimethylpropan-1-one Chemical group CC(C)(C)[C]=O YQTCQNIPQMJNTI-UHFFFAOYSA-N 0.000 description 1
- VLJQDHDVZJXNQL-UHFFFAOYSA-N 4-methyl-n-(oxomethylidene)benzenesulfonamide Chemical compound CC1=CC=C(S(=O)(=O)N=C=O)C=C1 VLJQDHDVZJXNQL-UHFFFAOYSA-N 0.000 description 1
- YEBLZOWIIQBUEE-UHFFFAOYSA-N C[Hf](C)(C)C Chemical compound C[Hf](C)(C)C YEBLZOWIIQBUEE-UHFFFAOYSA-N 0.000 description 1
- 229910000909 Lead-bismuth eutectic Inorganic materials 0.000 description 1
- BRGOCSWOKBOIOJ-UHFFFAOYSA-N N.[O-2].[Hf+4] Chemical compound N.[O-2].[Hf+4] BRGOCSWOKBOIOJ-UHFFFAOYSA-N 0.000 description 1
- -1 PbBi Chemical class 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 241000219977 Vigna Species 0.000 description 1
- 235000010726 Vigna sinensis Nutrition 0.000 description 1
- UOTBHSCPQOFPDJ-UHFFFAOYSA-N [Hf]=O Chemical compound [Hf]=O UOTBHSCPQOFPDJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229940043279 diisopropylamine Drugs 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- PDPJQWYGJJBYLF-UHFFFAOYSA-J hafnium tetrachloride Chemical compound Cl[Hf](Cl)(Cl)Cl PDPJQWYGJJBYLF-UHFFFAOYSA-J 0.000 description 1
- 150000002429 hydrazines Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 125000003253 isopropoxy group Chemical group [H]C([H])([H])C([H])(O*)C([H])([H])[H] 0.000 description 1
- 229940039009 isoproterenol Drugs 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 239000002052 molecular layer Substances 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 150000002829 nitrogen Chemical class 0.000 description 1
- NOAKQZUXUXSOTC-UHFFFAOYSA-N octaphenylene Chemical group C1=CC=C2C3=CC=CC=C3C3=CC=CC=C3C3=CC=CC=C3C3=CC=CC=C3C3=CC=CC=C3C3=CC=CC=C3C3=CC=CC=C3C2=C1 NOAKQZUXUXSOTC-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021340 platinum monosilicide Inorganic materials 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 125000004079 stearyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/78391—Field effect transistors with field effect produced by an insulated gate the gate comprising a layer which is used for its ferroelectric properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40111—Multistep manufacturing processes for data storage electrodes the electrodes comprising a layer which is used for its ferroelectric properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
Definitions
- the present invention relates to a semiconductor device in which a gate electrode having a floating gate electrode and a dielectric film is stacked on a semiconductor substrate, and a method of manufacturing the same.
- the flash memory is summarized in the first document, "Applied Physics, Vol. 65, No. 11, (1996), pp. 1141-1124: Flash Memory Technology, Hitoshi Kume".
- For the FeRAM refer to the second reference "Journal of the Institute of Electronics, Information and Communication Engineers, Vol. 80, No. 2 (1997), pp. 169-175: Ferroelectric memory as an ideal memory, Elliott M. Ph ilofs ky ”summarizes the outline.
- the current flash memory requires a high operating voltage.
- the internal maximum voltage is 12 V. This is much higher than normal DRAM and LSI operating at 3-4V.
- the current flash memory requires a rewrite time of 1 millisecond to 1 second, When rewriting data, there is a problem that it puts a great stress on the user.
- FeRAM has an internal voltage of 5 V or less, which is lower than that of flash memory. .
- the access time is very short, 250 nanoseconds.
- FeRAM has the problem that the switching characteristics of ferroelectric capacitors are sensitive to temperature.
- the ferroelectric layer contains low-melting-point metals such as PbBi, and these elements diffuse into the substrate. There's a problem.
- MFS transistors non-volatile memory devices
- This device has a ferroelectric material placed at the gate of a normal M ⁇ S transistor.Let's realize nonvolatile memory by changing the channel conductance in the transistor according to the polarization direction of this ferroelectric material. It is assumed that.
- Such an MFS transistor has the following structure. Usually, it is difficult to dispose a ferroelectric directly on a Si substrate due to problems such as diffusion of elements. For this reason, an MF IS structure in which an insulator film (Insulator) also serving as a diffusion suppression layer is inserted between the Si substrate and the ferroelectric film, or a floating gate is further added to this MF IS structure. In many cases, an MFM IS structure with a built-in electrode is adopted. However, there are actually some problems with the transistor having this MFM IS structure. That is, even if the voltage is removed after switching the ferroelectric film by applying a voltage to the gate, there is an anti-electric field due to the polarization in the ferroelectric film.
- the ferroelectric film is always subjected to a force in a direction in which the direction of the stored polarization is canceled, and there is a problem that it is difficult to maintain the polarization stably.
- a current gradually flows from the semiconductor substrate or the upper control gate electrode into the floating gate electrode and the ferroelectric film due to the anti-electric field.
- the flowing current is ferroelectric
- the charge of the floating gate electrode generated by the polarization of the film is gradually compensated, and the stored information is eventually lost. That is, the information is volatilized, and the function as the nonvolatile memory element cannot be exhibited.
- retention time The time during which information is retained as a nonvolatile memory element is referred to as retention time (retention time). If the information volatilizes as described above, this retention time cannot be secured sufficiently.
- the standard retention time guaranteed for flash memory is currently 3 ⁇ 10 8 seconds, which is almost 10 years.
- an MS transistor in order to suppress such a leakage current, conventionally, silicon dioxide, tetranitrogen trioxide, or silicon nitride conventionally provided between a gate electrode and a semiconductor substrate is used.
- silicon dioxide, tetranitrogen trioxide, or silicon nitride conventionally provided between a gate electrode and a semiconductor substrate is used.
- the use of an insulating film material having a higher relative dielectric constant is being studied in place of the insulating film made of such materials.
- Such an insulating film having a high relative dielectric constant is usually called a “high-dielectric-constant film” or a “high-k film”, and the use of this film increases the thickness of the physical insulating film. Thus, leakage current can be suppressed.
- the insulating film material used herein for example, Z r0 2, A 1 2 0 3, La 2 0 3, P R_ ⁇ 3, Gd 2 ⁇ 3, Y 2 0 3 is promising.
- oxides of hafnium represented by hafdium oxide (Hf 0 2 ), silicide (Hf Si x ), silicified aluminum oxide (Hf Si A 1 O x ), nitrided Materials such as oxides (H f ⁇ N) are also promising.
- the high-k film used for the MOS transistor is changed to a In order to suppress the peak current, it is conceivable to introduce it to the MIFIMS transistor.
- the performance of the insulating film required for the MOS transistor and the MIF IMIS transistor will be examined.
- Figure 11 is a performance index that is required in MOS transistors and MFMI S transistors, i.e. S i 0 2 equivalent thickness: shows the relationship between (EOT Equivalent Oxide Thickness) and leakage current density (J). According to the figure, at the MOS transistor evening, the EOT which was 1.6 nm in 2001
- the leakage current density is met 1 X 10- 8 A / cm 2 at 2001 the thing is, 1 at the time of the 2005 X 10 - 1
- the performance required for the insulating film is greatly different between the conventional MOS transistor and the MFMIS transistor. Therefore, the high-k film, which is being considered for introduction at the MOS transistor, is used as it is as the MFMIS transistor.
- the present invention has been made to solve the above-described problems.
- a structure such as MIFIMIS having an insulating film in an MFMIS structure
- a semiconductor device capable of reducing the amount of leakage current of the insulating film and a method of manufacturing the same The purpose is to provide. Disclosure of the invention
- a semiconductor device includes a semiconductor substrate, a source region and a drain region formed on the semiconductor substrate with a channel region interposed therebetween.
- a floating gate electrode formed on the channel region via a gate insulating film, a ferroelectric film formed on the floating gate electrode, and a control gate electrode formed on the ferroelectric film
- An intermediate insulating film is formed between the floating gate electrode and the self-dielectric film, and at least one between the strong dielectric film and the control gate electrode.
- a hafnium oxide containing a nitrogen atom is provided.
- the step of forming a floating gate electrode on a semiconductor substrate via a gate insulating film, and the step of forming a ferroelectric film on the floating gate electrode Forming a control gate electrode on the ferroelectric film; and forming a source region and a drain region on the semiconductor substrate.
- a step of forming a floating gate electrode on a semiconductor substrate via a gate insulating film; and forming a ferroelectric film on the floating gate electrode Forming a control gate electrode on the ferroelectric film; and forming a source region and a drain region on the semiconductor substrate.
- a ferroelectric film, and at least one of between the ferroelectric layer and the floating gate electrode further comprising a step of forming an intermediate insulating film, wherein the intermediate insulating film is an organic metal containing hafnium. It is formed by MOC VD using a compound gas, a gas containing oxygen atoms, and a gas containing nitrogen atoms as source gases.
- the method includes the steps of: forming a floating gate electrode on a semiconductor substrate via a gate insulating film; and forming a strong dielectric film on the floating gate electrode. Forming a control gate electrode on the ferroelectric film; and forming a source region and a drain region on the semiconductor substrate. Forming an intermediate insulating film at least between the gate electrode and the ferroelectric film and between the ferroelectric layer and the floating gate electrode; And further wherein the intermediate insulating film, H f C l 4 gas, H 2 0 gas, and a gas containing nitrogen atoms as the raw material gas, those formed by AL D. BRIEF DESCRIPTION OF THE FIGURES
- FIG. 1 is a sectional view showing one embodiment of a semiconductor device according to the present invention.
- Figure 2 is a schematic diagram of a device for measuring leakage current density.
- FIG. 3 is a diagram showing the relationship between the nitrogen flow ratio and the leakage current density.
- FIG. 4 is a diagram showing the relationship between the nitrogen flow ratio and the relative permittivity.
- FIG. 5 is a diagram showing the relationship between the content of nitrogen atoms and the relative dielectric constant.
- FIG. 6 is a sectional view showing another example of the semiconductor device shown in FIG.
- FIG. 7 is a diagram showing a schematic configuration of a sputtering apparatus for forming a film of the semiconductor device shown in FIG.
- FIG. 8 is a diagram showing the relationship between the nitrogen flow ratio and the nitrogen content in the insulating film.
- FIG. 9 is a diagram showing a schematic configuration of a MOC VD apparatus for forming a film of the semiconductor device shown in FIG.
- FIG. 10 is a timing chart showing the inflow of each gas when the semiconductor device shown in FIG. 1 is formed using the ALD.
- FIG. 11 is a diagram illustrating a relationship between EOT and leakage current density required in the MOS transistor and the MIFIMIS transistor.
- the semiconductor device 1 includes a semiconductor substrate 11 and a source region 12 and a drain region 13 formed on the semiconductor substrate 11.
- a gate electrode body 15 is formed on a channel region 14 between the source region 12 and the drain region 13.
- the semiconductor substrate 11 is a Si semiconductor substrate containing a p-type or n-type impurity, and usually has a resistivity of 0.1 ⁇ cm or more and 50 ⁇ cm or less. Also saw The semiconductor region 11 and the drain region 13 are formed of a conductivity type different from that of the semiconductor substrate 11.
- the gate electrode body 15 is configured as follows. That is, the floating gate electrode 152 is formed on the channel region 14 via the gate insulating film 151, and the ferroelectric film 154 is formed on the floating gate electrode 152 via the first intermediate insulating film 153. . Further, a control gate electrode 156 is formed on the ferroelectric film 154 via a second intermediate insulating film 155.
- the floating gate electrode 152 is an electrode for holding the charge induced by the ferroelectric film 154, and includes platinum (Pt), ruthenium (Ru), indium (Ir), or an oxide thereof. And the like. Note that the floating gate electrode 152 may be formed of a material other than the above, polysilicon may be used as in a normal MOS transistor, or silicide of various metals used as a metal gate, for example, ⁇ WS i, PtSi or the like may be used. Alternatively, a laminated structure of a combination of some of these may be employed.
- the ferroelectric film 154 has small values of ferroelectric parameters such as coercive electric field (Ec) and remanent polarization (Pr) and a small amount of leakage current, and has thermal stability and reduction resistance. It is preferable to use a high material. For example, B i 4 T i 3 ⁇ 12 (B IT), S r B i 2 Ta 2 O g (SBT), Pb (Z r, T i) 0 3 (PZT) or the like can be used.
- the control gate electrode 156 can be made of the same material as that of the MS transistor, for example, polysilicon or aluminum (A1). Alternatively, platinum (Pt), ruthenium (Ru), or silica (Ir), or a conductive oxide thereof can be used.
- Hf_ ⁇ 2: N represents the nitrogen hafnium oxide are contained about doping amount
- HfO N indicates that that compound with nitrogen not hafnium oxygen only.
- the content of nitrogen atoms contained in these insulating films 151, 153, and 155 is determined as follows.
- Hf0: N or HfON as described above as a high-k film has already been studied for use as a gate insulating film in MOS transistors.
- the amount of nitrogen added is not disclosed. This is because the performance required for a gate insulating film in a MOS transistor is based on the following: interface order density, fixed charge in the film, relative dielectric constant (or equivalent film thickness), leakage current, breakdown voltage, reliability This is because the evaluation of each parameter has not been completed yet.
- the gate insulating film used in the MS transistor is very thin, less than a few nm, and the composition of nitrogen cannot be measured precisely enough to be associated with each parameter.
- the electrical characteristics of the transistor structure are mainly evaluated, and the film thickness itself has not been sufficiently studied.
- the physical thickness of the insulating film used is as large as 10 nm or more, and the parameter to be evaluated is mainly the leak current density. It is possible to systematically study the relationship between the leakage current density. Below, the nitrogen content is examined.
- FIG. 2 is a schematic diagram of an apparatus for measuring a leak current density.
- This apparatus 2 forms a Si0 2 layer 22 with a thickness of 30 O nm on a p-type semiconductor substrate 21 and forms an upper electrode 23 / insulating film 24 / lower electrode 25 thereon.
- a MIM structure is formed.
- the MIM structure consists of an insulating film with a thickness of about 300 nm between an upper electrode 23 of platinum with a thickness of about 150 nm and a lower electrode 25 of platinum with a thickness of about 100 nm. It is the one with 24 in between.
- Figure 3 shows the relationship between the measured leakage current density and time.
- the nitrogen flow rate ratio R N is also of the 0% means that the insulating film to which nitrogen is not ⁇ Ka ⁇ those nitrogen flow rate ratio R N is 5% 37., measurement start In some cases, it can be seen that the leak current density is less than half.
- nitrogen flow rate ratio R N is set to less than 1/100 of that of 0%.
- the nitrogen flow ratio 1 ⁇ was increased to 62.5% and 85.4%, the leakage current density gradually increased.
- the addition of nitrogen greatly reduces the leakage current density, but increases when the amount exceeds a certain amount. Therefore, it is not necessary to add a large amount of nitrogen.
- Figure 4 shows the relationship between the relative dielectric constant epsilon r of the nitrogen flow rate ratio R N and the insulating film in the sputtering. According to the figure, with the nitrogen flow rate ratio R N is increased, with the nitrogen supplied Ri That increases, the dielectric constant epsilon r of the insulating film is reduced. Therefore, to determine the nitrogen content, the relative permittivity ⁇ r must also be considered.
- Figure 5 is a graph showing the relationship between the content of nitrogen atoms (atomic%) and the relative dielectric constant epsilon r.
- the content of nitrogen atoms in the insulating film was measured using an XPS measuring device (ESCAA5400MC, manufactured by Physical Electronics) and a SIMS measuring device (SIMS4500, manufactured by ATOMIKA).
- XPS measuring device ESCAA5400MC, manufactured by Physical Electronics
- SIMS4500 manufactured by ATOMIKA
- the measurement was performed with the X-ray anode being an A-line and the output being 14 kV and 200 W.
- the SIMS instrument measured the primary ion species as Cs +, the secondary ion species as negative ions, and the primary ion energy as 2. Ok eV.
- the content of nitrogen atoms is preferably from 0.1 atomic% to 30.0 atomic%, more preferably from 0.5 atomic% to 10.0 atomic%, and more preferably from 1.0 atomic% to 1.0 atomic%. It is considered particularly preferable that the content be 6.0 atomic% or less.
- the intermediate insulating films 153 and 155 according to the present embodiment have a nitrogen-containing hafnium oxide, the leakage current can be significantly suppressed, and the holding time can be reduced. Can be further extended. Moreover, since the intermediate insulating films 153 and 155 have a high relative dielectric constant, the voltage applied to the intermediate insulating film can be reduced. Can be driven.
- an intermediate point is provided between both the floating gate electrode 152 and the ferroelectric film 1554 and between the ferroelectric film 1554 and the control gate electrode 1556.
- the insulating films 153 and 155 are formed, an intermediate insulating film may be provided on only one of them.
- the intermediate insulating layer 155 can be provided only between the ferroelectric film 154 and the control gate electrode 156.
- FIG. 7 is a schematic configuration diagram of the sputter device.
- this sputtering apparatus has an apparatus body 31 in which a semiconductor substrate can be installed, and a load lock chamber connected to the apparatus body 31 via an ultra-high vacuum gate valve (not shown). 3 2
- the apparatus main body 31 is provided with a vacuum pump 33 for depressurizing the inside of the apparatus main body 31 to an ultra-high vacuum state, and the semiconductor substrate S is placed in an ultra-high vacuum state from the atmosphere via a load lock chamber 32. It is transported inside the main body 3 1. As described above, by transporting the semiconductor substrate S through the mouth lock chamber 32, it is possible to form a film on the semiconductor substrate S without directly opening the inside of the apparatus main body 31 to the atmosphere.
- the degree of vacuum inside the apparatus main body S can be maintained for a long time at a high degree of vacuum, for example, IX 10 " 10 Torr or less, thereby preventing contamination of the inside of the apparatus main body 31 and the semiconductor substrate S. Can be.
- a substrate heating mechanism 311 for heating the back surface of the installed semiconductor substrate S, and a shutter 311 for shutting off between the substrate 1 and the substrate S are provided inside the apparatus main body 31 .
- the shutter 312 is removed from between the target T and the substrate S during film formation, but shuts off between the target T and the substrate S except during film formation, and the target material T is deposited on the substrate S.
- Hf metal is used as the target T.
- three cylinders 34, 35, and 36, each of which contains a gas serving as a raw material of the sputter gas, are connected to the apparatus main body 31 via a gas supply line 37. These cylinders 34, 35, and 36 contain oxygen gas, nitrogen gas, and argon gas, respectively.
- the substrate temperature is heated by the substrate heating mechanism 311.
- the substrate temperature is preferably from 200 ° C. to 65 ° C., and more preferably from 250 ° C. to 350 ° C.
- the valve of the gas supply line 37 is opened, and only argon gas is supplied to the inside of the apparatus main body 31 to form a film.
- the supply flow rate during this film formation depends on the volume of the apparatus body 31 and the evacuation speed of the vacuum pump 33, but is preferably 1 sccm or more and 100 sccm or less, more preferably 5 sccm or more and 20 s or less. More preferably, it is not more than ccm.
- the total pressure during film formation depends on the volume of the apparatus main body 31, the pumping speed of the vacuum pump 33, and the performance of a voltage applying apparatus (not shown). It is preferably not more than mT orr, more preferably not less than lT orr and not more than 20 mT orr.
- a plasma is generated inside the apparatus main body 31 using argon gas as a sputtering gas.
- the surface of T is cleaned with argon plasma.
- the target T does not deposit on the Si substrate S.
- the cleaning time depends on the state of the target T, but is usually 3 minutes to 60 minutes, and preferably 5 minutes to 30 minutes.
- the plasma is stopped, oxygen gas and nitrogen gas are introduced into the apparatus body 31 in addition to argon gas. Then, with these three gases mixed, the plasma is turned on again.
- the shutter 312 is opened, and a gate insulating film made of octaphenylene oxide to which nitrogen is added is deposited on the substrate S.
- the shirt 312 is closed to remove the applied power, and the supply of gas is stopped. Note that it is preferable that the time until a desired film thickness is obtained is calculated based on a film formation rate measured in advance.
- the substrate S is taken out of the apparatus main body 31.
- the floating gate electrode 15 2, the first intermediate insulating film 15 3, the ferroelectric film 15 4, the second intermediate insulating film 15 5, and the control gate electrode 15 shown in FIG. 6 is formed in the same manner as the gate insulating film by the sputtering apparatus.
- a resist pattern is formed on the control gate electrode 156 by photolithography, and the gate electrode body 15 is formed by etching.
- the gate electrode body 15 is used as a mask, the source region 12 and the drain region 13 are formed by a known method such as an ion implantation method, and finally an annealing process is performed.
- the annealing process can be performed after each insulating film is formed.
- the formation of the source region 12 and the drain region 13 by ion implantation or the like may be performed during the formation of the gate electrode body 15.
- the annealing temperature is preferably set to 200 ° C. or more and 110 ° C. or less, more preferably 550 ° C. or more and 750 ° C. or less.
- the anneal time depends on the anneal temperature, but is preferably from 5 seconds to 360 seconds.For example, when the anneal temperature is 700 ° C., the anneal time is preferably from 5 minutes to 30 minutes. preferable.
- the anneal atmosphere varies depending on the metal electrode used and other elements mounted on the substrate.
- the nitrogen concentration is preferably 80% or more. More preferably, it is set to 0%.
- the flow rate ratio of the nitrogen gas supplied to the sputtering evening gas i.e. it is necessary to control the nitrogen flow rate ratio R N.
- FIG. 8 shows the relationship between the nitrogen flow rate ratio and the nitrogen content in the insulating film. According to the figure, it can be seen that as the nitrogen flow ratio RN increases, the nitrogen content also increases.
- nitrogen flow rate ratio R N in the sputter-ring is 0.0 5 above 0.9 0 or less, and 0.1 or more on 0.4 It is more preferred that: Note that the argon gas contributes to laminating Hf on the substrate, but does not affect oxygen or nitrogen, so it is not necessary to consider the flow rate of the argon gas.
- the sputtering according to the present invention is not limited to the above, and various modifications are possible.
- the use of the H f metal is targeted, it is also possible to use H f compounds such as H f ⁇ 2.
- the ferroelectric film can be formed by other than spattering, for example, by a sol-gel method or MOCVD.
- FIG. 9 is a schematic configuration diagram of a MOCVD apparatus used in this method.
- this device is equipped with a device body 41 in which a semiconductor substrate can be installed, and the back of the semiconductor substrate S installed in the device body 41 is heated by the substrate. It is configured to be heated by the mechanism 411.
- the apparatus main body 41 is provided with a vacuum pump 42 for depressurizing the inside to an ultra-high vacuum state, and three cylinders 43, 44, and 45 containing a gas serving as a MOCVD raw material.
- Each cylinder 43, 44, 45 is connected to the apparatus main body 41 via the gas supply line 46, the evening over tertiary butoxy hafnium (Hi (0- tC 4 H 9 ) 4) gas, oxygen gas, nitrogen gas Are accommodated respectively. These gases can be stored in the cylinders 43, 44 and 45 in the liquid state. Pumps 431, 441, 451 for supply are provided. When the raw material is in a liquid state, it is supplied to the device main body 41 after being vaporized.
- the inside of the apparatus main body 41 is depressurized over a sufficient time.
- the pressure is preferably below 1 X 10_ 5 To rr.
- the substrate heating mechanism 411 is energized to heat the Si substrate S.
- the heating is preferably performed so that the temperature of the substrate is 200 ° C. or more and 750 ° C. or less, and more preferably 250 ° C. or more and 350 ° C. or less.
- a short butoxy hafnium gas, an oxygen gas, and a nitrogen gas are introduced into the apparatus main body 41 to start film formation.
- the flow rate of the mixed gas during film formation depends on the volume of the apparatus main body 41 and the pumping speed of the vacuum pump 42, but is preferably 1 sccm or more and 100 sccm or less, and more preferably 5 sccm or more and 20 sccm or less. More preferred.
- the total pressure during the film formation depends on the volume of the apparatus main body 41, the evacuation speed of the vacuum pump, and the performance of the voltage application device (not shown), but is usually 0.1 lTo rr or more and 50 OmTo rr or less. It is more preferable that it is not less than lOTorr and not more than 200 mTorr.
- the supply of gas is stopped and the film formation is terminated. It is preferable that the time until the desired film thickness is obtained is calculated based on the film formation rate measured in advance.
- the substrate S is taken out of the apparatus main body 41, and the floating gate electrode 161, the first intermediate insulating film 162, and the ferroelectric film 16 are formed as in the case of sputtering. 3.
- the source region 12 and the drain region 13 are formed.
- Each of the intermediate insulating films 162 and 164 can be formed by a MOCVD apparatus similarly to the gate insulating film 15.
- an annealing treatment is performed as in the case of sputtering.
- the annealing treatment can be performed under the same conditions as the above-described sputtering.
- the flow ratios of the charly butoxy hafnium, oxygen gas, and nitrogen gas are important parameters, and strongly influence the electrical characteristics of the formed insulating film.
- the flow rate ratio of oxygen gas and nitrogen gas i.e. nitrogen flow rate ratio R N is, it means that determines the amount of nitrogen into the formed Sani ⁇ hafnium, especially important.
- a preferred range of the nitrogen flow rate ratio R N is 0.90 or less under 0.05 or more, still more preferably 0.1 or more 0.4 or less.
- the MOCVD according to the present invention is not limited to this, and various modifications are possible.
- evening-sharybutoxy hafnium gas is used to supply hafnium into the insulating film.
- the invention is not limited to this, and any organic metal compound containing hafnium may be used. Good.
- a gas containing an oxygen atom for example, water vapor (H 2 gas) can be used.
- the gas containing nitrogen atoms in addition to nitrogen gas for example nitrous oxide (New 2 ⁇ ), nitric oxide (NO), hydrazine (New 2 Eta 4), diisopropylamine (i_C 3 H 7) 2 NH , Yuichi Sharybutyramine ((t-ChH 9 ) NH 2 ), ammonia (NH 3 ), and trimethylammonium (N (CH 3 ) 3 ) can be used.
- ALD Advanced Deposition
- the equipment for film formation used in ALD is almost the same as that shown in Fig. 9, The description will be made using the apparatus of FIG. 9, and the same components will be denoted by the same reference numerals and detailed description thereof will be omitted.
- the major differences between the ALD method and the M ⁇ C VD method are the type of gas supplied into the apparatus body 41 and the supply sequence. As a result, the film formation rate and the film flatness also differ.
- Raw material used is 4 hafnium tetrachloride (H f C l 4), water (H 2 0), and there (N 2 H 4) with hydrazine, to be supplied to the apparatus main body 4 in 1 of these in a gaseous state.
- These raw materials may be stored in gas cylinders 43, 44, and 45, or may be in a liquid state. However, when a liquid is used, it is supplied into the apparatus body 41 after being heated to a gas state. Further, in addition to these cylinders, a cylinder containing nitrogen gas as a purge gas is connected to the apparatus body.
- the inside of the apparatus main body 41 is depressurized over a sufficient time.
- the pressure at this time is preferably 1 X 10 " 5 Torr or less.
- the substrate heating mechanism 4 11 is energized to heat the Si substrate S.
- the substrate temperature is 20 ° C.
- the heating is preferably performed at a temperature of at least 30 ° C and at most 550 ° C, more preferably at least 30 ° C and at most 300 ° C.
- the gas is sequentially supplied into the apparatus main body 41.
- nitrogen which is a purge gas
- stop the purge gas supplying H f C 1 4 to the apparatus main body 4 in 1 starts deposition (stearyl - di (b)).
- H f C 1 4 to purge the apparatus main body 4 in 1 (stage (c)).
- adsorbed Pas one purge gas is on the substrate surface, the surface coverage is greater than 1 extra H f C 1 4 to desorbed are.
- a purge gas is stopped, and supplies the H 2 0 (stage (d)).
- H f 0 2 is deposited and H f C 1 4 and H 2 0 adsorbed on the substrate surface react.
- HC 1 is desorbed.
- stage (e) the supply of H 20 is stopped, and the purge gas is supplied again to desorb excess H 20 adsorbed on the substrate S.
- supply of the purge gas is stopped, hydrazine gas is supplied into the apparatus main body 41, and hydrazine gas is supplied to the substrate surface.
- Adsorb gin The hydrazine is decomposed by the heat of the substrate S, this nitrogen occurs Te cowpea to is incorporated into the surface of the Hf_ ⁇ 2 (stage (f)).
- the supply of hydrazine gas is stopped, and the purge gas is supplied. Thereby, excess hydrazine adsorbed on the substrate S can be eliminated (stage (g)).
- stage (h) is the beginning of the next cycle and is the same as stage (b), as described later.
- the flow rate of the gas during film formation is preferably 1 sccm or more and 100 sccm or less, and more preferably 5 sccm or more and 20 sccm or less, depending on the volume of the apparatus main body 41 and the pumping speed of the vacuum pump 42. Is more preferable.
- the total pressure during the film formation depends on the volume of the device main body 41, the pumping speed of the vacuum pump 42, and the performance of the voltage application device, but it is usually from 0.1 torr to 50 OmTorr. More preferably, it is not less than 1 OTorr and not more than 200 mTorr.
- the substrate is taken out of the apparatus main body, and a floating gate electrode, a first intermediate insulating film, a ferroelectric film, a second intermediate insulating film, and a control gate electrode are formed in the same manner as in each of the above methods. Subsequently, a source region and a drain region are formed. Each intermediate insulating film is formed by the above-described ALD apparatus, similarly to the gate insulating film. Thereafter, an annealing treatment is performed in the same manner as in the case of sputtering. The annealing treatment can be performed under the same conditions as the sputtering.
- the flow rate of hydrazine gas F H that supplies nitrogen to the insulating film is important, and the flow rate of hydrazine gas relative to the sum of the flow rate of H 20 gas F H2 (3 and the flow rate of hydrazine gas is important.
- preferred of this hydrazine flow ratio R H A preferable range is from 0.05 to 0.90, and a more preferable range is from 0.1 to 0.4.
- the flow rate F H hydrazine the flow rate of hydrazine supplied in stage (f) is the flow rate of H 2 0 gas supplied at stage (d) are a flow F H 20 of H 2 0 gas .
- the ALD method used in the present invention is not limited to this, and various modifications are possible.
- nitrogen gas is used as the purge gas.
- an inert gas may be used.
- argon gas, neon gas, or the like can be used.
- hydrazine is used to supply nitrogen into the insulating film.
- any material containing a nitrogen atom may be used, such as nitrogen gas (N 2 ), nitrous oxide (N 2 ⁇ ), Nitric oxide (NO), ammonia (NH 3 ), and trimethylammonium (N (CH 3 ) 3 ) can be used. These may be used alone or as a mixture of two or more.
- a semiconductor device capable of reducing the amount of leakage current of an insulating film in a structure such as a MIFIMIS having an insulating film in an MFMIS structure, and a method of manufacturing the same.
- a switching element with a reduced amount of leakage current is provided.
Description
Claims
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- 2003-03-24 WO PCT/JP2003/003493 patent/WO2003081667A1/ja active Application Filing
- 2003-03-24 AU AU2003221212A patent/AU2003221212A1/en not_active Abandoned
- 2003-07-11 US US10/616,917 patent/US7135736B2/en not_active Expired - Lifetime
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2009044195A (ja) * | 2002-08-20 | 2009-02-26 | National Institute Of Advanced Industrial & Technology | 半導体強誘電体記憶デバイスの製造方法 |
US7482234B2 (en) | 2003-11-28 | 2009-01-27 | Rohm Co., Ltd. | Method of fabricating a metal oxynitride thin film that includes a first annealing of a metal oxide film in a nitrogen-containing atmosphere to form a metal oxynitride film and a second annealing of the metal oxynitride film in an oxidizing atmosphere |
US7772678B2 (en) | 2003-11-28 | 2010-08-10 | Rohm Co., Ltd. | Metallic compound thin film that contains high-k dielectric metal, nitrogen, and oxygen |
JP2007250565A (ja) * | 2006-03-13 | 2007-09-27 | Toshiba Corp | 不揮発性半導体メモリ装置及びその製造方法 |
JP4719035B2 (ja) * | 2006-03-13 | 2011-07-06 | 株式会社東芝 | 不揮発性半導体メモリ装置及びその製造方法 |
JP2010087089A (ja) * | 2008-09-30 | 2010-04-15 | Toshiba Corp | 半導体記憶素子、半導体記憶素子の製造方法 |
JP2015165523A (ja) * | 2013-03-19 | 2015-09-17 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置、基板処理システムおよびプログラム |
US9831082B2 (en) | 2013-03-19 | 2017-11-28 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus, substrate processing system and non-transitory computer-readable recording medium |
Also Published As
Publication number | Publication date |
---|---|
JP3622055B2 (ja) | 2005-02-23 |
US7135736B2 (en) | 2006-11-14 |
CN1643679A (zh) | 2005-07-20 |
JPWO2003081667A1 (ja) | 2005-07-28 |
US20040036111A1 (en) | 2004-02-26 |
AU2003221212A1 (en) | 2003-10-08 |
CN1306599C (zh) | 2007-03-21 |
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