WO2003063340A3 - Input buffer amplifier with centroidal layout - Google Patents

Input buffer amplifier with centroidal layout Download PDF

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Publication number
WO2003063340A3
WO2003063340A3 PCT/US2003/001909 US0301909W WO03063340A3 WO 2003063340 A3 WO2003063340 A3 WO 2003063340A3 US 0301909 W US0301909 W US 0301909W WO 03063340 A3 WO03063340 A3 WO 03063340A3
Authority
WO
WIPO (PCT)
Prior art keywords
differential
input buffer
buffer amplifier
amplifiers
symmetry
Prior art date
Application number
PCT/US2003/001909
Other languages
French (fr)
Other versions
WO2003063340A2 (en
Inventor
Sumant Ranganathan
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Publication of WO2003063340A2 publication Critical patent/WO2003063340A2/en
Publication of WO2003063340A3 publication Critical patent/WO2003063340A3/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only

Abstract

An input buffer amplifier (200) has a symmetrical centroidal layout. The input buffer amplifier (200) includes two half differential amplifiers (202-1, 202-2) that have substantially identical layouts. Each half amplifier receives the input signal in-parallel, and the outputs of the differential half amplifiers (202-1, 202-2) are wire-ored together. The input buffer amplifier (200) is symmetrical about both horizontal and vertical lines of symmetry. Furthermore, FET devices forming the half amplifiers (202-1, 202-2) are interlaced to create the horizontal line of symmetry. The overall horizontal and vertical symmetry of the input buffer amplifier (200) improves the device matching between differential signal paths. In other words, the devices in the half amplifiers (202-1, 202-2) that process the positive and negative components of the differential signal are more closely matched. This reduces differential offsets and common mode offsets that can occur when devices are not matched properly. The reduction in differential offset and common mode offset improves the linearity and dynamic range of input buffer amplifier. The improved differential matching also reduces signal distortion and the susceptibility to power supply noise.
PCT/US2003/001909 2002-01-24 2003-01-23 Input buffer amplifier with centroidal layout WO2003063340A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35034102P 2002-01-24 2002-01-24
US60/350,341 2002-01-24

Publications (2)

Publication Number Publication Date
WO2003063340A2 WO2003063340A2 (en) 2003-07-31
WO2003063340A3 true WO2003063340A3 (en) 2003-11-13

Family

ID=27613380

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/001909 WO2003063340A2 (en) 2002-01-24 2003-01-23 Input buffer amplifier with centroidal layout

Country Status (2)

Country Link
US (2) US6833756B2 (en)
WO (1) WO2003063340A2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7102932B2 (en) * 2004-08-27 2006-09-05 Micron Technology, Inc. Input and output buffers having symmetrical operating characteristics and immunity from voltage variations
WO2006109013A1 (en) * 2005-04-15 2006-10-19 Sony United Kingdom Limited Analogue to digital conversion
US7571415B2 (en) * 2007-01-23 2009-08-04 United Microelectronics Corp. Layout of power device
US7557651B2 (en) * 2007-02-02 2009-07-07 Texas Instruments Incorporated Dual transconductance amplifiers and differential amplifiers implemented using such dual transconductance amplifiers
US8692608B2 (en) 2011-09-19 2014-04-08 United Microelectronics Corp. Charge pump system capable of stabilizing an output voltage
US9030221B2 (en) 2011-09-20 2015-05-12 United Microelectronics Corporation Circuit structure of test-key and test method thereof
US8395455B1 (en) 2011-10-14 2013-03-12 United Microelectronics Corp. Ring oscillator
US8421509B1 (en) 2011-10-25 2013-04-16 United Microelectronics Corp. Charge pump circuit with low clock feed-through
US8588020B2 (en) 2011-11-16 2013-11-19 United Microelectronics Corporation Sense amplifier and method for determining values of voltages on bit-line pair
US8493806B1 (en) 2012-01-03 2013-07-23 United Microelectronics Corporation Sense-amplifier circuit of memory and calibrating method thereof
US8970197B2 (en) 2012-08-03 2015-03-03 United Microelectronics Corporation Voltage regulating circuit configured to have output voltage thereof modulated digitally
US8724404B2 (en) 2012-10-15 2014-05-13 United Microelectronics Corp. Memory, supply voltage generation circuit, and operation method of a supply voltage generation circuit used for a memory array
US8669897B1 (en) 2012-11-05 2014-03-11 United Microelectronics Corp. Asynchronous successive approximation register analog-to-digital converter and operating method thereof
US8711598B1 (en) 2012-11-21 2014-04-29 United Microelectronics Corp. Memory cell and memory cell array using the same
US8873295B2 (en) 2012-11-27 2014-10-28 United Microelectronics Corporation Memory and operation method thereof
US8643521B1 (en) 2012-11-28 2014-02-04 United Microelectronics Corp. Digital-to-analog converter with greater output resistance
US8953401B2 (en) 2012-12-07 2015-02-10 United Microelectronics Corp. Memory device and method for driving memory array thereof
US9030886B2 (en) 2012-12-07 2015-05-12 United Microelectronics Corp. Memory device and driving method thereof
US8917109B2 (en) 2013-04-03 2014-12-23 United Microelectronics Corporation Method and device for pulse width estimation
US9105355B2 (en) 2013-07-04 2015-08-11 United Microelectronics Corporation Memory cell array operated with multiple operation voltage
US8947911B1 (en) 2013-11-07 2015-02-03 United Microelectronics Corp. Method and circuit for optimizing bit line power consumption
US8866536B1 (en) 2013-11-14 2014-10-21 United Microelectronics Corp. Process monitoring circuit and method
US10044095B2 (en) 2014-01-10 2018-08-07 Microsoft Technology Licensing, Llc Radiating structure with integrated proximity sensing
US9143143B2 (en) 2014-01-13 2015-09-22 United Microelectronics Corp. VCO restart up circuit and method thereof
RU2621291C1 (en) * 2016-04-08 2017-06-01 федеральное государственное бюджетное образовательное учреждение высшего образования "Донской государственный технический университет" (ДГТУ) Differential instrumentation amplifier with paraphase output
US10461406B2 (en) 2017-01-23 2019-10-29 Microsoft Technology Licensing, Llc Loop antenna with integrated proximity sensing
US11211016B2 (en) 2018-07-16 2021-12-28 Novatek Microelectronics Corp. Source driver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5990737A (en) * 1997-04-28 1999-11-23 Kabushiki Kaisha Toshiba Balanced amplifier using single-ended output operational amplifiers

Family Cites Families (3)

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Publication number Priority date Publication date Assignee Title
JP3601890B2 (en) * 1995-10-30 2004-12-15 株式会社東芝 Offset removal circuit
US5999052A (en) * 1998-04-28 1999-12-07 Lucent Technologies Inc. High speed, fine-resolution gain programmable amplifier
US6429735B1 (en) * 2001-08-29 2002-08-06 National Semiconductor Corporation High speed output buffer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5990737A (en) * 1997-04-28 1999-11-23 Kabushiki Kaisha Toshiba Balanced amplifier using single-ended output operational amplifiers

Also Published As

Publication number Publication date
US6833756B2 (en) 2004-12-21
WO2003063340A2 (en) 2003-07-31
US20030137345A1 (en) 2003-07-24
US6943622B2 (en) 2005-09-13
US20050093623A1 (en) 2005-05-05

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