WO1998010874A1 - Amplifying circuit for reading a capacitive input - Google Patents

Amplifying circuit for reading a capacitive input Download PDF

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Publication number
WO1998010874A1
WO1998010874A1 PCT/DE1996/001759 DE9601759W WO9810874A1 WO 1998010874 A1 WO1998010874 A1 WO 1998010874A1 DE 9601759 W DE9601759 W DE 9601759W WO 9810874 A1 WO9810874 A1 WO 9810874A1
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WO
WIPO (PCT)
Prior art keywords
effect transistor
field effect
transistor
source
electrode
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Application number
PCT/DE1996/001759
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German (de)
French (fr)
Inventor
Michael Schmidt
Egbert Spiegel
Original Assignee
Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
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Priority to PCT/DE1996/001759 priority Critical patent/WO1998010874A1/en
Publication of WO1998010874A1 publication Critical patent/WO1998010874A1/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/52Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00
    • G01S7/523Details of pulse systems
    • G01S7/526Receivers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/082Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's

Definitions

  • Amplifier circuit for reading out a capacitive input
  • the present invention relates to an amplifier circuit for reading out a capacitive input, and in particular to such an amplifier circuit which can advantageously be used in a device which can be switched over between transmitting and receiving operation, for example an ultrasound system.
  • an ultrasound element In the field of ultrasound diagnostics, it is common to use an ultrasound element as a transmitter and receiver at the same time. For this purpose it must be ensured that the reflected signals can be selected by switching on the readout electronics after a very short settling time in the range of a few 100 nanoseconds. In many ultrasound systems, the time until the reflected signals arrive at the receiving electronics, i.e. the amplifier circuit for reading out the received signals, large, in the range of a few microseconds, since this time span is extended by a coupling-in link. This coupling section serves to acoustically adapt the ultrasound elements to the medium to be examined.
  • the ultrasound signal source 10 formed by an ultrasound transducer element is in FIG. 3 by a current source I ⁇ j g and a capacitance connected in parallel therewith Modeled C T JS.
  • the ultrasound transducer element thus represents a capacitive source.
  • the output of this ultrasound signal source is connected to the gate electrode of a field effect transistor.
  • a resistor R f which is used to set the operating point of the amplifier, is connected between the gate electrode and the drain electrode of the transistor 12. This resistor, together with the capacitance CTJS, determines a time constant T which determines the settling time of the amplifier.
  • the drain electrode of transistor 12 is also connected to a bias current source, which is modeled by a current source I b i .as .
  • An output node 14 of the ultrasound readout amplifier is also connected to the drain electrode of transistor 12.
  • the settling time can be set by setting the bias current I b ias.
  • a high bias current T.bia ⁇ is required to enable a sufficiently rapid settling.
  • a high bias current results in a negative increase in power loss.
  • the bias current is further switched off in the transmission mode, ie when the ultrasound element is pulsed to generate ultrasound waves, in order to reduce the total power loss.
  • the amplifier is only active in the receive mode, ie when receiving the reflected acoustic waves, with an ultrasonic transducer serving as a sensor.
  • the available power loss is often limited, since the surroundings must not be heated.
  • the object of the present invention is to provide an amplifier circuit for reading out a capacitive input and a method for operating the amplifier circuit, which enable a very short switchover time from transmission to reception mode with a very low power loss.
  • the present invention provides an amplifier circuit for reading out a capacitive input with the following features: a first field effect transistor, the source electrode of which is connected to the capacitive input, a pre-current source which is connected to the drain electrode of the first field effect transistor, an output node, which is connected to the drain electrode of the first field effect transistor, and a regulated current source which is connected to the source electrode of the first field effect transistor, the gate electrode of the first field effect transistor being alternately connected to a reference potential.
  • the entire bias current of the bias current source is available as a charging current for the capacitive input, for example the capacitance of the ultrasound element.
  • the output voltage at the drain electrode of the field effect transistor can be kept at the operating point by regulating the current source, which is connected to the source electrode of the field effect transistor.
  • FIG. 1 shows a schematic diagram of an amplifier circuit according to the invention
  • FIG. 2 shows a more detailed circuit diagram of an amplifier circuit according to the invention.
  • Fig. 3 is a circuit diagram of a known amplifier circuit.
  • the present invention is explained in more detail below with reference to an ultrasound readout amplifier. However, it is obvious that the present invention is not limited to an amplifier for reading out ultrasonic elements, but can be used for reading out any capacitive input.
  • Fig. 1 shows a rough circuit diagram of a first embodiment of the present invention.
  • An ultrasound element 100 is modeled as an ultrasound signal source by a current source I us and a capacitance C us .
  • the output of the ultrasound element 100 ie the capacitive input, is connected to the source electrode of a transistor 102.
  • the drain of field effect transistor 102 is connected to a bias current source Ifc> ias.
  • a controlled current source, Ig is connected between the source electrode of the field effect transistor 102 and a reference potential, for example ground.
  • the gate electrode of the field-effect transistor 102 is connected in terms of AC voltage to a fixed reference potential, for example signal ground. Because of this interconnection of the gate electrode, the circuit can be referred to as a "common gate stage".
  • bias current controller bias controller
  • the bias current controller has connections which are connected to the drain electrode and the gate electrode of the field effect transistor 102, and furthermore a connection which is connected to a fixed reference potential, for example the signal ground.
  • Another connection of the bias current regulator 104 is connected to the regulated current source Ig for controlling the same.
  • Low-frequency voltage changes at the drain electrode of the field-effect transistor 102 can be suppressed by means of the bias current regulator 104 by regulating the current generated by the regulated current source Ig, as a result of which the amplifier can be kept at a desired operating point.
  • FIG. 2 An example of such a control circuit 104 is shown in more detail in FIG. 2.
  • elements corresponding to those in Fig. 1 are given the same reference numerals as those in Fig. 1.
  • the regulated current source Ig is realized in the circuit shown in FIG. 2 by a second field effect transistor 200.
  • the drain electrode of the second transistor 200 is connected to the source electrode of the first transistor 102.
  • the source electrode of the second transistor 200 is connected to a fixed reference potential, for example the signal ground.
  • the bias current regulator 104 has transistors 202, 204 and 206, an active resistor 208 and a capacitance 210.
  • a field effect transistor is used as the active resistor 208, the drain electrode of which is connected to the drain electrode of the first field effect transistor 102, and the source electrode of which is connected to the gate electrode of the field effect transistor 202.
  • the drain electrode of the field effect transistor 202 is connected to a constant potential, in the preferred embodiment preferably to the positive supply voltage.
  • the source electrode of the field effect transistor 202 is connected to the drain electrode of the field effect transistor 204.
  • the drain electrical de and the gate electrode of field effect transistor 204 are connected such that transistor 204 acts as a diode.
  • the source of transistor 204 is connected to the drain of transistor 206.
  • the drain electrode and the gate electrode of transistor 206 are connected such that transistor 206 also acts as a diode.
  • the source electrode of transistor 206 is connected to a fixed reference potential, for example the signal ground.
  • the gate electrode of transistor 206 is also connected to the gate electrode of second field effect transistor 200.
  • the gate electrode of transistor 204 is connected to the gate electrode of first field effect transistor 102.
  • the connection node of the source electrode of the field-effect transistor 208 acting as an active resistor and the gate electrode of the field-effect transistor 202 is connected via the capacitance 210 to the fixed reference potential, for example the signal ground.
  • the gate electrode of transistor 208 which acts as an active resistor, is connected to the fixed reference potential, for example the signal ground.
  • the output of the amplifier stage shown in FIG. 2 is the drain node 220 of the first field effect transistor 102.
  • the drain potential of the amplifying transistor 102 is maintained at the desired operating point by the regulated current source which is formed by the transistor 200 .
  • the regulation takes place by coupling the transistors 202, 204 and 206 via the transistor 208 and the capacitance 210 to the output of the stage.
  • the desired working point is thus set. Low frequency fluctuations at the input, i.e. at the capacitive input are suppressed.
  • high-frequency input signals are amplified by the controller's RC coupling, which is formed by the active resistor 208 and the capacitor 210.
  • the stage shown has a high-pass characteristic, which is determined by the time constant of the controller.
  • bias current regulator 104 The following is the control function of the bias current regulator 104 explained in more detail.
  • a constant voltage is first assumed at the gate of the first field effect transistor 102.
  • the RC coupling which is formed by the active resistor 208 and the capacitor 210, switches this gate to the signal ground between the node 220 and the gate of the transistor 202. Therefore, the control described does not affect high-frequency signals.
  • the present invention thus provides an amplifier circuit for reading out a capacitive input, for example for reading out an ultrasound transducer element, in which the entire bias current I-ßi as of the amplification transistor 102 is used as the charging current for the capacitance of the ultrasound elements is available.
  • the amplifier circuit according to the invention can furthermore have a bias current regulator, which enables the potential of the output of the amplifier circuit to be kept at the operating point regardless of low-frequency potential changes at the input. This also improves the transient response of the amplifier when switching.

Abstract

The invention concerns an amplifying circuit for reading a capacitive input (100), having a first field effect transistor (102), the source electrode of which is connected to the capacitive input (100). A polarization current source IS is connected to the drain electrode of the first field effect transistor (102). The drain electrode of the first field effect transistor (102) forms an output node. The source electrode of the first field effect transistor (102) is connected to a regulated source of electricity. The gate electrode of the first field effect transistor (102) is switched to a reference potential according to a shift signal. In such a circuit the entire polarization current IBias of the transistor is available as charging current for the capacity of the capacitive input.

Description

Verstärkerschaltung zum Auslesen eines kapazitiven Eingangs Amplifier circuit for reading out a capacitive input
Beschreibungdescription
Die vorliegende Erfindung bezieht sich auf eine Verstärkerschaltung zum Auslesen eines kapazitiven Eingangs, und insbesondere auf eine derartige Verstärkerschaltung, die vorteilhaft in einer zwischen einem Sende- und einem Empfangs- Betrieb umschaltbaren Vorrichtung, beispielsweise einem Ultraschallsystem, verwendet werden kann.The present invention relates to an amplifier circuit for reading out a capacitive input, and in particular to such an amplifier circuit which can advantageously be used in a device which can be switched over between transmitting and receiving operation, for example an ultrasound system.
Auf dem Gebiet der Ultraschalldiagnostik ist es üblich, ein Ultraschallelement gleichzeitig als Sender und Empfänger zu benutzen. Hierzu muß gewährleistet sein, daß die reflektierten Signale durch das Zuschalten der Ausleseelektronik nach einer sehr kurzen Einschwingzeit im Bereich einiger 100 Na- nosekunden, der Empfangselektronik selektiert werden können. In vielen Ultraschallsystemen ist die Zeitspanne bis zum Eintreffen der reflektierten Signale an der Empfangselektronik, d.h. der Verstärkerschaltung zum Auslesen der empfangenen Signale, groß, im Bereich einiger Mikrosekunden, da durch eine Einkoppelstrecke diese Zeitspanne verlängert wird. Diese Einkoppelstrecke dient zum akustischen Anpassen der Ultraschallelemente an das zu untersuchende Medium.In the field of ultrasound diagnostics, it is common to use an ultrasound element as a transmitter and receiver at the same time. For this purpose it must be ensured that the reflected signals can be selected by switching on the readout electronics after a very short settling time in the range of a few 100 nanoseconds. In many ultrasound systems, the time until the reflected signals arrive at the receiving electronics, i.e. the amplifier circuit for reading out the received signals, large, in the range of a few microseconds, since this time span is extended by a coupling-in link. This coupling section serves to acoustically adapt the ultrasound elements to the medium to be examined.
Bei diagnostischen Systemen für "in vivo"- Untersuchungen von kleinen Gefäßen oder bei einer direkten Kopplung an ein zu untersuchendes Medium ist es möglich, daß keine Einkoppelstrecke vorliegt. Daher erreichen die ersten Reflexionen von Gefäßwänden den Ultraschallwandler im Submikrosekunden- bereich.With diagnostic systems for "in vivo" examinations of small vessels or with a direct coupling to a medium to be examined, it is possible that there is no coupling path. Therefore, the first reflections from vessel walls reach the ultrasonic transducer in the submicrosecond range.
Stand der Technik für integrierte miniaturisierte Ultraschallausleseverstärker ist der in Fig. 3 dargestellte CMOS-Verstärker. Die durch ein Ultraschallwandlerelement gebildete Ultraschallsignalquelle 10 ist in Fig. 3 durch eine Stromquelle Iτjg und eine parallel dazu geschaltete Kapazität CTJS modelliert. Das Ultraschallwandlerelement stellt somit eine kapazitive Quelle dar. Der Ausgang dieser Ultraschallsignalquelle ist mit der Gate-Elektrode eines Feldeffekt- Transistors verbunden. Ein Widerstand Rf, der zur Einstellung des Arbeitspunkts des Verstärkers dient, ist zwischen die Gate-Elektrode und die Drain-Elektrode des Transistors 12 geschaltet. Dieser Widerstand bestimmt zusammen mit der Kapazität CTJS eine Zeitkonstante T, die die Einschwingzeit des Verstärkers bestimmt. Die Drain-Elektrode des Transistors 12 ist ferner mit einer Vorstromquelle, die durch eine Stromquelle Ibi.as modelliert ist, verbunden. Ein Ausgangsknoten 14 des Ultraschallausleseverstärkers ist ebenfalls mit der Drain-Elektrode des Transistors 12 verbunden.State of the art for integrated miniaturized ultrasound readout amplifiers is the CMOS amplifier shown in FIG. 3. The ultrasound signal source 10 formed by an ultrasound transducer element is in FIG. 3 by a current source Iτ j g and a capacitance connected in parallel therewith Modeled C T JS. The ultrasound transducer element thus represents a capacitive source. The output of this ultrasound signal source is connected to the gate electrode of a field effect transistor. A resistor R f , which is used to set the operating point of the amplifier, is connected between the gate electrode and the drain electrode of the transistor 12. This resistor, together with the capacitance CTJS, determines a time constant T which determines the settling time of the amplifier. The drain electrode of transistor 12 is also connected to a bias current source, which is modeled by a current source I b i .as . An output node 14 of the ultrasound readout amplifier is also connected to the drain electrode of transistor 12.
Bei Ultraschallausleseverstärkern der in Fig. 3 gezeigten Art kann die Einschwingzeit durch ein Einstellen des Vorstroms Ibias eingestellt werden. Um ein ausreichend schnelles Einschwingen zu ermöglichen, ist ein hoher Vorstrom T.biaε erforderlich. Ein hoher Vorstrom hat jedoch eine negative Erhöhung der Verlustleistung zur Folge. Bei dem bekannten Ultraschallausleseverstärker wird der Vorstrom des weiteren im Sendemodus, d.h. beim Pulsen des Ultraschallelements zur Erzeugung von Ultraschallwellen, ausgeschaltet, um die Gesamtverlustleistung zu reduzieren. Der Verstärker ist nur im Empfangsmodus, d.h. beim Empfangen der reflektierten akustischen Wellen, wobei ein Ultraschallwandler als Sensor dient, aktiv. Beispielsweise bei "in vivo"- Systemen ist die verfügbare Verlustleistung oftmals begrenzt, da eine Erwärmung der Umgebung nicht erfolgen darf. Dieses Problem der begrenzten verfügbaren Verlustleistung tritt verstärkt auf, wenn zur Fokussierung eines Ultraschallεtrahls gleichzeitig mehrere Ultraschallgeräte parallel angeregt und ausgelesen werden. In diesem Fall steht pro Verstärker nur eine begrenzte Verlustleistung zur Verfügung. Daher kann bei bekannten Ultraschallausleseverstärkern der Vorstrom nicht beliebig erhöht werden, da dann die erlaubte Verlustleistung überschritten werden würde. Die Aufgabe der vorliegenden Erfindung besteht darin, eine Verstärkerschaltung zum Auslesen eines kapazitiven Eingangs sowie ein Verfahren zum Betreiben der Verstarkerschaltung zu schaffen, die eine sehr kurze Umschaltzeit von einem Sendein einen Empfangs-Modus bei einer sehr geringen Verlustleistung ermöglichen.In the case of ultrasonic read-out amplifiers of the type shown in FIG. 3, the settling time can be set by setting the bias current I b ias. A high bias current T.biaε is required to enable a sufficiently rapid settling. However, a high bias current results in a negative increase in power loss. In the known ultrasound readout amplifier, the bias current is further switched off in the transmission mode, ie when the ultrasound element is pulsed to generate ultrasound waves, in order to reduce the total power loss. The amplifier is only active in the receive mode, ie when receiving the reflected acoustic waves, with an ultrasonic transducer serving as a sensor. For example, in the case of "in vivo" systems, the available power loss is often limited, since the surroundings must not be heated. This problem of the limited available power loss arises more and more when a plurality of ultrasound devices are simultaneously excited and read out to focus an ultrasound beam. In this case there is only a limited power loss available per amplifier. Therefore, the bias current cannot be increased arbitrarily in known ultrasonic readout amplifiers, since the permitted power loss would then be exceeded. The object of the present invention is to provide an amplifier circuit for reading out a capacitive input and a method for operating the amplifier circuit, which enable a very short switchover time from transmission to reception mode with a very low power loss.
Diese Aufgabe wird durch eine Verstärkerschaltung gemäß Anspruch 1 gelöst.This object is achieved by an amplifier circuit according to claim 1.
Die vorliegende Erfindung schafft eine Verstärkerschaltung zum Auslesen eines kapazitiven Eingangs mit folgenden Merkmalen: einem ersten Feldeffekttransistor, dessen Source- Elektrode mit dem kapazitiven Eingang verbunden ist, einer VorStromquelle, die mit der Drain-Elektrode des ersten Feldeffekt-Transistors verbunden ist, einem Ausgangsknoten, der mit der Drain-Elektrode des ersten Feldeffekt-Transistors verbunden ist, und einer geregelten Stromquelle, die mit der Source-Elektrode des ersten Feldeffekt-Transistors verbunden ist, wobei die Gate-Elektrode des ersten Feldeffekt-Transistors wechselsignalmäßig gegen ein Bezugspotential geschaltet ist.The present invention provides an amplifier circuit for reading out a capacitive input with the following features: a first field effect transistor, the source electrode of which is connected to the capacitive input, a pre-current source which is connected to the drain electrode of the first field effect transistor, an output node, which is connected to the drain electrode of the first field effect transistor, and a regulated current source which is connected to the source electrode of the first field effect transistor, the gate electrode of the first field effect transistor being alternately connected to a reference potential.
Durch die erfindungsgemäße Ankopplung des kapazitiven Elements, beispielsweise des Ultraschallwandlers, an den Source-Anschluß des Transistors steht der gesamte Vorstrom der Vorstromquelle als Ladestrom für den kapazitiven Eingang, beispielsweise die Kapazität des Ultraschallelements, zur Verfügung. Gemäß einem Vorteil der vorliegenden Erfindung kann die Ausgangsspannung an der Drain-Elektrode des Feldeffekt-Transistors durch die Regelung der Stromquelle, die mit der Source-Elektrode des Feldeffekt-Transistors verbunden ist, im Arbeitspunkt gehalten werden.By coupling the capacitive element, for example the ultrasound transducer, to the source terminal of the transistor, the entire bias current of the bias current source is available as a charging current for the capacitive input, for example the capacitance of the ultrasound element. According to an advantage of the present invention, the output voltage at the drain electrode of the field effect transistor can be kept at the operating point by regulating the current source, which is connected to the source electrode of the field effect transistor.
Weiterbildungen der vorliegenden Erfindung sind in den abhängigen Ansprüchen definiert.Further developments of the present invention are defined in the dependent claims.
Bevorzugte Ausführungsbeispiele der vorliegenden Erfindung werden nachfolgend bezugnehmend auf die beiliegenden Zeichnungen näher erläutert. Es zeigen:Preferred embodiments of the present invention are explained in more detail below with reference to the accompanying drawings. Show it:
Fig. 1 ein schematisches Diagramm einer erfindungsgemäßen Verstärkerscha1tung;1 shows a schematic diagram of an amplifier circuit according to the invention;
Fig. 2 ein detaillierteres Schaltungsdiagramm einer erfindungsgemäßen Verstärkerschaltung; und2 shows a more detailed circuit diagram of an amplifier circuit according to the invention; and
Fig. 3 ein Schaltungsdiagramm einer bekannten Verstärkerschaltung.Fig. 3 is a circuit diagram of a known amplifier circuit.
Die vorliegende Erfindung wird nachfolgend bezugnehmend auf einen Ultraschallauslese-Verstärker näher erläutert. Es ist jedoch offensichtlich, daß die vorliegende Erfindung nicht auf einen Verstärker zum Auslesen von Ultraschallelementen beschränkt ist, sondern zum Auslesen eines beliebigen kapazitiven Eingangs verwendet werden kann.The present invention is explained in more detail below with reference to an ultrasound readout amplifier. However, it is obvious that the present invention is not limited to an amplifier for reading out ultrasonic elements, but can be used for reading out any capacitive input.
Fig. 1 zeigt ein grobes Schaltungsdiagramm eines ersten Ausführungsbeispiels der vorliegenden Erfindung. Ein Ultraschallelement 100 ist als Ultraschallsignalquelle durch eine Stromquelle Ius und eine Kapazität Cus modelliert. Der Ausgang des Ultraschallelements 100, d.h. des kapazitiven Eingangs, ist mit der Source-Elektrode eines Transistors 102 verbunden. Die Drain-Elektrode des Feldeffekt-Transistors 102 ist mit einer Vorstromquelle Ifc>ias verbunden. Zwischen die Source-Elektrode des Feldeffekt-Transistors 102 und ein Bezugspotential, beispielsweise Masse, ist eine gesteuerte Stromquelle, Ig geschaltet.Fig. 1 shows a rough circuit diagram of a first embodiment of the present invention. An ultrasound element 100 is modeled as an ultrasound signal source by a current source I us and a capacitance C us . The output of the ultrasound element 100, ie the capacitive input, is connected to the source electrode of a transistor 102. The drain of field effect transistor 102 is connected to a bias current source Ifc> ias. A controlled current source, Ig, is connected between the source electrode of the field effect transistor 102 and a reference potential, for example ground.
Die Gate-Elektrode des Feldeffekt-Transistors 102 ist wech- selspannungsmäßig mit einem festen Bezugspotential, beispielsweise Signalmasse, verbunden. Aufgrund dieser Ver- schaltung der Gate-Elektrode kann die Schaltung als "Com- mon-Gate-Stufe" bezeichnet werden.The gate electrode of the field-effect transistor 102 is connected in terms of AC voltage to a fixed reference potential, for example signal ground. Because of this interconnection of the gate electrode, the circuit can be referred to as a "common gate stage".
In Fig. 1 ist bereits eine Weiterbildung der vorliegenden Erfindung dargestellt, die ferner einen Vorstromregler (Bias-Regler) 104 aufweist. Der Vorstromregler weist Anschlüsse auf, die mit der Drain-Elektrode und der Gate-Elektrode des Feldeffekt-Transistors 102 verbunden sind, und ferner einen Anschluß, der mit einem festen Bezugspotential, beispielsweise der Signalmasse, verbunden ist. Ein weiterer Anschluß des Vorstromreglers 104 ist mit der geregelten Stromquelle Ig zum Steuern derselben verbunden. Mittels des Vorstromreglers 104 können niederfrequente Spannungsänderungen an der Drain-Elektrode des Feldeffekt-Transistorε 102 durch das Regeln des von der geregelten Stromquelle Ig erzeugten Stroms unterdrückt werden, wodurch der Verstärker auf einem gewünschten Arbeitspunkt gehalten werden kann.1 is a further development of the present Shown invention, which further comprises a bias current controller (bias controller) 104. The bias current controller has connections which are connected to the drain electrode and the gate electrode of the field effect transistor 102, and furthermore a connection which is connected to a fixed reference potential, for example the signal ground. Another connection of the bias current regulator 104 is connected to the regulated current source Ig for controlling the same. Low-frequency voltage changes at the drain electrode of the field-effect transistor 102 can be suppressed by means of the bias current regulator 104 by regulating the current generated by the regulated current source Ig, as a result of which the amplifier can be kept at a desired operating point.
Ein Beispiel einer solchen Regelungsschaltung 104 ist detaillierter in Fig. 2 dargestellt. In Fig. 2 sind Elemente, die denen in Fig. 1 entsprechen, mit gleichen Bezugszeichen wie die in Fig. 1 bezeichnet. Die geregelte Stromquelle Ig ist bei der in Fig. 2 dargestellten Schaltung durch einen zweiten Feldeffekt-Transistor 200 realisiert. Die Drain- Elektrode des zweiten Transistors 200 ist mit der Source- Elektrode des ersten Transistors 102 verbunden. Die Source- Elektrode des zweiten Transistors 200 ist mit einem festen Bezugspotential, beispielsweise der Signalmasse, verbunden.An example of such a control circuit 104 is shown in more detail in FIG. 2. In Fig. 2, elements corresponding to those in Fig. 1 are given the same reference numerals as those in Fig. 1. The regulated current source Ig is realized in the circuit shown in FIG. 2 by a second field effect transistor 200. The drain electrode of the second transistor 200 is connected to the source electrode of the first transistor 102. The source electrode of the second transistor 200 is connected to a fixed reference potential, for example the signal ground.
Der Vorstromregler 104 weist Transistoren 202, 204 und 206, einen aktiven Widerstand 208 und eine Kapazität 210 auf.The bias current regulator 104 has transistors 202, 204 and 206, an active resistor 208 and a capacitance 210.
Als aktiver Widerstand 208 dient ein Feldeffekt-Transistor, dessen Drain-Elektrode mit der Drain-Elektrode des ersten Feldeffekt-Transistors 102 verbunden ist, und dessen Source-Elektrode mit der Gate-Elektrode des Feldeffekt-Transistors 202 verbunden ist. Die Drain-Elektrode des Feldeffekt-Transistors 202 ist mit einem konstanten Potential, bei dem bevorzugten Ausführungsbeispiel vorzugsweise mit der positiven Versorgungsspannung, verbunden. Die Source-Elektrode des Feldeffekt-Transistors 202 ist mit der Drain-Elektrode des Feldeffekt-Transistors 204 verbunden. Die Drain-Elektro- de und die Gate-Elektrode des Feldeffekt-Transistors 204 sind verbunden, derart, daß der Transistor 204 als Diode wirkt. Die Source-Elektrode des Transistors 204 ist mit der Drain-Elektrode des Transistors 206 verbunden. Die Drain- Elektrode und die Gate-Elektrode des Transistors 206 sind verbunden, derart, daß der Transistor 206 ebenfalls als Diode wirkt. Die Source-Elektrode des Transistors 206 ist mit einem festen Bezugspotential, bei-spielsweise der Signalmasse, verbunden. Die Gate-Elektrode des Transistors 206 ist ferner mit der Gate-Elektrode des zweiten Feldeffekt-Transistors 200 verbunden. Ferner ist die Gate-Elektrode des Transistors 204 mit der Gate-Elektrode des ersten Feldeffekt- Transistors 102 verbunden. Der Verbindungsknoten der Source-Elektrode des als aktiver Widerstand wirkenden Feldeffekt-Transistors 208 und der Gate-Elektrode des Feldeffekt-Transistors 202 ist über die Kapazität 210 mit dem festen Bezugspotential, beispielsweise der Signalmasse, verbunden. Ferner ist die Gate-Elektrode des als aktiver Widerstand wirkenden Transistors 208 mit dem festen Bezugspotential, beispielsweise der Signalmasse, verbunden.A field effect transistor is used as the active resistor 208, the drain electrode of which is connected to the drain electrode of the first field effect transistor 102, and the source electrode of which is connected to the gate electrode of the field effect transistor 202. The drain electrode of the field effect transistor 202 is connected to a constant potential, in the preferred embodiment preferably to the positive supply voltage. The source electrode of the field effect transistor 202 is connected to the drain electrode of the field effect transistor 204. The drain electrical de and the gate electrode of field effect transistor 204 are connected such that transistor 204 acts as a diode. The source of transistor 204 is connected to the drain of transistor 206. The drain electrode and the gate electrode of transistor 206 are connected such that transistor 206 also acts as a diode. The source electrode of transistor 206 is connected to a fixed reference potential, for example the signal ground. The gate electrode of transistor 206 is also connected to the gate electrode of second field effect transistor 200. Furthermore, the gate electrode of transistor 204 is connected to the gate electrode of first field effect transistor 102. The connection node of the source electrode of the field-effect transistor 208 acting as an active resistor and the gate electrode of the field-effect transistor 202 is connected via the capacitance 210 to the fixed reference potential, for example the signal ground. Furthermore, the gate electrode of transistor 208, which acts as an active resistor, is connected to the fixed reference potential, for example the signal ground.
Der Ausgang der in Fig. 2 dargestellten Verstärkerstufe ist der Drain-Knoten 220 des ersten Feldeffekt-Transistors 102. Das Drain-Potential des verstärkenden Transistors 102 wird durch die geregelte Stromquelle, die durch den Transistor 200 gebildet ist, in dem gewünschten Arbeitspunkt- gehalten. Die Regelung erfolgt durch die Kopplung der Transistoren 202, 204 und 206 über den Transistor 208 und die Kapazität 210 an den Ausgang der Stufe. Somit wird der gewünschte Arbeitspunkt eingestellt. Niederfrequente Schwankungen am Eingang, d.h. an dem kapazitiven Eingang, werden unterdrückt. Hochfrequente Eingangssignale werden dagegen durch die RC- Kopplung, die durch den aktiven Widerstand 208 und die Kapazität 210 gebildet ist, des Reglers verstärkt. Insgesamt weist die dargestellte Stufe eine Hochpaßcharakteristik auf, die durch die Zeitkonstante des Reglers bestimmt wird.The output of the amplifier stage shown in FIG. 2 is the drain node 220 of the first field effect transistor 102. The drain potential of the amplifying transistor 102 is maintained at the desired operating point by the regulated current source which is formed by the transistor 200 . The regulation takes place by coupling the transistors 202, 204 and 206 via the transistor 208 and the capacitance 210 to the output of the stage. The desired working point is thus set. Low frequency fluctuations at the input, i.e. at the capacitive input are suppressed. In contrast, high-frequency input signals are amplified by the controller's RC coupling, which is formed by the active resistor 208 and the capacitor 210. Overall, the stage shown has a high-pass characteristic, which is determined by the time constant of the controller.
Im folgenden wird die Regelungsfunktion des Vorstromreglers 104 näher erläutert. Am Gate des ersten Feldeffekt-Transistors 102 sei zunächst eine konstante Spannung angenommen. Eine Spannungserhöhung am Eingang, d.h. an der Source-Elektrode des Transistors 102, erscheint verstärkt an der Drain-Elektrode des Transistors 102. Ist diese Spannungsänderung am Eingang niederfrequent, so stellt dieselbe eine unerwünschte Arbeitspunktverschiebung dar. Diese soll durch den Vorstromregler 104 unterdrückt werden.The following is the control function of the bias current regulator 104 explained in more detail. A constant voltage is first assumed at the gate of the first field effect transistor 102. A voltage increase at the input, ie at the source electrode of transistor 102, appears increasingly at the drain electrode of transistor 102. If this voltage change at the input is low-frequency, this represents an undesirable shift in the operating point. This should be suppressed by the bias current regulator 104.
Wenn das Potential an der Source-Elektrode des ersten Feldeffekttransistors 102 ansteigt, sinkt der Strom, der durch den Transistor 102 fließt, woraufhin das Potential am Knoten 220 ansteigt, da die Vorstromquelle Ißias weiterhin in Betrieb ist. Durch das erhöhte Potential am Knoten 220 erhöht sich das über den aktiven Widerstand 208 an der Gate-Elektrode des Transistors 202 anliegende Potential. Dies führt zu einem Stromfluß durch den Transistor 202 und ferner durch die als Dioden verschalteten Transistoren 204 und 206. Dadurch steigt das Potential am Gate des Transistor 200. Dies führt dazu, daß der Transistor 200 einen höheren Strom leitet, woraufhin das Potential an der Drain-Elektrode des Transistors 200 und somit an der Source-Elektrode des ersten Feldeffekt-Transistors 102 abfällt. Dadurch wird das Potential am Punkt 220 mittels des Vorstromreglers 104 und der geregelten Stromquelle 200 auf dem Arbeitspunkt des Verstärkers gehalten.When the potential at the source of first field effect transistor 102 increases, the current flowing through transistor 102 decreases, whereupon the potential at node 220 increases because the bias current source Ißias continues to operate. Due to the increased potential at node 220, the potential present via active resistor 208 at the gate electrode of transistor 202 increases. This leads to a current flow through transistor 202 and further through transistors 204 and 206 connected as diodes. This increases the potential at the gate of transistor 200. This causes transistor 200 to conduct a higher current, whereupon the potential at the drain -Electrode of transistor 200 and thus at the source electrode of the first field-effect transistor 102 drops. As a result, the potential at point 220 is kept at the operating point of the amplifier by means of the bias current regulator 104 and the regulated current source 200.
Für Hochfrequenzsignale schaltet die RC-Kopplung, die durch den aktiven Widerstand 208 und die Kapazität 210 gebildet ist, zwischen dem Knoten 220 und dem Gate des Transistors 202 dieses Gate auf die Signalmasse. Daher beeinflußt die beschriebene Regelung Hochfrequenzsignale nicht.For high-frequency signals, the RC coupling, which is formed by the active resistor 208 and the capacitor 210, switches this gate to the signal ground between the node 220 and the gate of the transistor 202. Therefore, the control described does not affect high-frequency signals.
Die vorliegende Erfindung schafft somit eine Verstärkerschaltung zum Auslesen eines kapazitiven Eingangs, beispielsweise zum Auslesen eines Ultraschallwandlerelements, bei der der gesamte Vorstrom I-ßias des Verstärkungstransistors 102 als Ladestrom für die Kapazität des Ultraschall- elements zur Verfügung steht. Dadurch ist das Einschwingverhalten des Verstärkers beim Umschalten zwischen einem Sende- und einem Empfangs-Betrieb beispielsweise in einem Ultraschallsystem verbessert. Optional kann die erfindungsgemäße Verstärkerschaltung ferner einen Vorstromregler aufweisen, der ermöglicht, daß das Potential des Ausgangs der Verstärkerschaltung ungeachtet von niederfrequenten Potentialänderungen am Eingang im Arbeitspunkt gehalten wird. Dies verbessert ebenfalls das Einschwingverhalten des Verstärkers beim Umschalten. The present invention thus provides an amplifier circuit for reading out a capacitive input, for example for reading out an ultrasound transducer element, in which the entire bias current I-ßi as of the amplification transistor 102 is used as the charging current for the capacitance of the ultrasound elements is available. This improves the transient response of the amplifier when switching between transmit and receive operations, for example in an ultrasound system. Optionally, the amplifier circuit according to the invention can furthermore have a bias current regulator, which enables the potential of the output of the amplifier circuit to be kept at the operating point regardless of low-frequency potential changes at the input. This also improves the transient response of the amplifier when switching.

Claims

Patentansprüche claims
1. Verstärkerschaltung zum Auslesen eines kapazitiven Eingangs (100) mit folgenden Merkmalen:1. Amplifier circuit for reading out a capacitive input (100) with the following features:
einem ersten Feldeffekt-Transistor (102) , dessen Source-Elektrode mit dem kapazitiven Eingang (100) verbunden ist;a first field effect transistor (102), the source electrode of which is connected to the capacitive input (100);
einer VorStromquelle (Ißias) ' "^^e m^ αer Drain-Elektrode des ersten Feldeffekt-Transistors (102) verbunden ist;a pre-current source (I ß ias) '" ^^ em ^ αer drain electrode of the first field effect transistor (102) is connected;
einem Ausgangsknoten (220) , der mit der Drain-Elektrode des ersten Feldeffekt-Transistors (102) verbunden ist; undan output node (220) connected to the drain of the first field effect transistor (102); and
einer geregelten Stromquelle (Ig; 200) , die mit der Source-Elektrode des ersten Feldeffekt-Transistors verbunden ist,a regulated current source (Ig; 200), which is connected to the source electrode of the first field effect transistor,
wobei die Gate-Elektrode des ersten Feldeffekt-Transistors (102) wechselsignalmäßig gegen ein Bezugspotential geschaltet ist.wherein the gate electrode of the first field effect transistor (102) is alternately connected to a reference potential.
2. Verstärkerschaltung gemäß Anspruch 1, die ferner eine- Vorstromregelungsschaltung (104) aufweist, um die geregelte Stromquelle (Is; 200) derart zu regeln, daß das Potential der Drain-Elektrode des ersten Feldeffekt- Transistors (102) ungeachtet niederfrequenter Spannungsänderungen an der Source-Elektrode des ersten Feldeffekt-Transistors (102) konstant bleibt.2. The amplifier circuit of claim 1, further comprising a bias current control circuit (104) to control the regulated current source (I s ; 200) such that the potential of the drain of the first field effect transistor (102) is applied regardless of low frequency voltage changes the source electrode of the first field effect transistor (102) remains constant.
3. Verstärkerschaltung gemäß Anspruch 2, bei der die geregelte Stromquelle ein zweiter Feldeffekt-Transistor (200) ist, dessen Gate-Elektrode mit der Vorstromrege- lungsschaltung (104) verbunden ist, dessen Drain-Elek- trode mit der Source-Elektrode des ersten Feldeffekt- Transistors (102) verbunden ist, und dessen Source- Elektrode gegen ein Bezugspotential geschaltet ist. 3. The amplifier circuit according to claim 2, wherein the regulated current source is a second field effect transistor (200), the gate electrode of which is connected to the bias current control circuit (104), the drain elec- trode is connected to the source electrode of the first field effect transistor (102), and the source electrode of which is connected to a reference potential.
PCT/DE1996/001759 1996-09-12 1996-09-12 Amplifying circuit for reading a capacitive input WO1998010874A1 (en)

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CN113899802A (en) * 2021-09-29 2022-01-07 上海天马微电子有限公司 Reading circuit of field effect sensor, reading method of reading circuit and control circuit of field effect sensor

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JPH02185238A (en) * 1989-01-11 1990-07-19 Aloka Co Ltd Ultrasonic diagnostic device
US5115814A (en) * 1989-08-18 1992-05-26 Intertherapy, Inc. Intravascular ultrasonic imaging probe and methods of using same
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JPH02185238A (en) * 1989-01-11 1990-07-19 Aloka Co Ltd Ultrasonic diagnostic device
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CN113899802A (en) * 2021-09-29 2022-01-07 上海天马微电子有限公司 Reading circuit of field effect sensor, reading method of reading circuit and control circuit of field effect sensor

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