US20080106291A1 - High density integrated circuit apparatus, test probe and methods of use thereof - Google Patents

High density integrated circuit apparatus, test probe and methods of use thereof Download PDF

Info

Publication number
US20080106291A1
US20080106291A1 US11/930,638 US93063807A US2008106291A1 US 20080106291 A1 US20080106291 A1 US 20080106291A1 US 93063807 A US93063807 A US 93063807A US 2008106291 A1 US2008106291 A1 US 2008106291A1
Authority
US
United States
Prior art keywords
substrate
flexible
electronic component
contact elements
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/930,638
Inventor
Brian Beaman
Keith Fogel
Paul Lauro
Maurice Norcott
Da-Yuan Shih
George Walker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US11/930,638 priority Critical patent/US20080106291A1/en
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION reassignment INTERNATIONAL BUSINESS MACHINES CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BEAMAN, BRIAN S., FOGEL, KEITH E., LAURO, PAUL A., NORCOTT, MAURICE H., SHIH, DA-YUAN, WALKER, GEORGE F.
Publication of US20080106291A1 publication Critical patent/US20080106291A1/en
Assigned to GLOBALFOUNDRIES U.S. 2 LLC reassignment GLOBALFOUNDRIES U.S. 2 LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: INTERNATIONAL BUSINESS MACHINES CORPORATION
Assigned to GLOBALFOUNDRIES INC. reassignment GLOBALFOUNDRIES INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GLOBALFOUNDRIES U.S. 2 LLC, GLOBALFOUNDRIES U.S. INC.
Abandoned legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07371Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate card or back card with apertures through which the probes pass
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07314Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07342Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06733Geometry aspects
    • G01R1/0675Needle-like
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45155Nickel (Ni) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/45164Palladium (Pd) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/8521Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/85214Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/1627Disposition stacked type assemblies, e.g. stacked multi-cavities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S29/00Metal working
    • Y10S29/029Molding with other step
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49004Electrical device making including measuring or testing of device or component part
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147Assembling terminal to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147Assembling terminal to base
    • Y10T29/49149Assembling terminal to base by metal fusion bonding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49158Manufacturing circuit on or in base with molding of insulated base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49162Manufacturing circuit on or in base by using wire as conductive path
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49174Assembling terminal to elongated conductor
    • Y10T29/49181Assembling terminal to elongated conductor by deforming
    • Y10T29/49185Assembling terminal to elongated conductor by deforming of terminal
    • Y10T29/49192Assembling terminal to elongated conductor by deforming of terminal with insulation removal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/53Means to assemble or disassemble
    • Y10T29/5313Means to assemble electrical device
    • Y10T29/53174Means to fasten electrical component to wiring board, base, or substrate

Definitions

  • This invention related to an apparatus and test probe for integrated circuit devices and methods of use thereof.
  • Testing is an expensive part of the fabrication process of contemporary computing systems.
  • the functionality of ever I/O for contemporary integrated circuit must be tested since a failure to achieve the design specification at a single I/O can render an integrated circuit unusable for a specific application.
  • the testing is commonly done both at room temperature and at elevated temperatures to test functionality and at elevated temperatures with forced voltages and currents to burn the chips in and to test the reliability of the integrated circuit to screen out early failures.
  • Contemporary probes for integrated circuits are expensive to fabricate and are easily damaged.
  • Contemporary test probes are typically fabricated on a support substrate from groups of elongated metal conductors which fan inwardly towards a central location where each conductor has an end which corresponds to a contact location on the integrated circuit to be tested.
  • the metal conductors generally cantilever over an aperture in the support substrate.
  • the wires are generally fragile and easily damage and are easily displaceable from the predetermined positions corresponding to the design positions of the contact locations on the integrated circuit being tested.
  • FIG. 1 shows a side cross-sectional view of a prior art probe assembly 2 for probing integrated circuit chip 4 which is disposed on surface 6 of support member 8 for integrated circuit chip 4 .
  • Probe assembly 2 consists of a dielectric substrate 10 having a central aperture 12 therethrough. On surface 14 of substrate 10 there are disposed a plurality of electrically conducting beams which extend towards edge 18 of aperture 12 .
  • Conductors 16 have ends 20 which bend downwardly in a direction generally perpendicular to the plane of surface 14 of substrate 10 . Tips 22 of downwardly projecting electrically conducting ends 20 are disposed in electrical contact with contact locations 24 on surface 25 of integrated circuit chip 4 .
  • Coaxial cables 26 bring electrical signals, power and ground through electrical connectors 28 at periphery 30 of substrate 10 . Structure 2 of FIG.
  • Conductors 16 were generally made of a high strength metal such as tungsten to resist damage from use. Tungsten has an undesirably high resistivity.
  • a broad aspect of the present invention is a test probe having a plurality lf electrically conducting elongated members embedded in a material. One end of each conductor is arranged for alignment with contact locations on a workpiece to be tested.
  • the other end of the elongated conductors are electrically connected to contact locations on the surface of a fan-out substrate.
  • the fan-out substrate provides space transformation of the closely spaced electrical contacts on the first side of the fan-out substrate. Contact locations having a larger spacing are on a second side of the fan out substrate.
  • pins are electrically connected to the contact location on the second surface of the fan out substrate.
  • the plurality of pins on the second surface of the fan-out substrate are inserted into a socket on a second fan-out substrate.
  • the first and second space transformation substrates provide fan out from the line pitch of the integrated circuit I/O to a larger pitch of electrical contacts for providing signal, power and ground to the workpiece to be tested.
  • the pin and socket assembly is replaced by an interposer containing a plurality of elongated electrical connectors embedded in a layer of material which is squeezed between contact locations on the first fan-out substrate and contact locations on the second fan-out substrate.
  • the test probe is part of a test apparatus and test tool.
  • Another broad aspect of the present invention is a method of fabricating the probe tip of the probe according to the present invention wherein a plurality of elongated conductors are bonded to contact locations on a substrate surface and project away therefrom.
  • the elongated conductors are wire bonded to contact locations on the substrate surface.
  • the wires project preferable at a nonorthogonal angle from the contact locations.
  • the wires are bonded to the contact locations on the substrate are embedded in a elastomeric material to form a probe tip for the structure of the present invention.
  • the elongated conductors are embedded in an elastomeric material.
  • FIG. 1 is a schematic cross-section of a conventional test probe for an integrated circuit device.
  • FIG. 2 is a schematic diagram of one embodiment of the probe structure of the present invention.
  • FIG. 3 is a schematic diagram of another embodiment of the probe structure of the present invention.
  • FIG. 4 is an enlarged view of an elastomeric connector electrically interconnecting two space transformation substrates of the structure of FIG. 2 .
  • FIG. 5 is an enlarged view of the probe tip within dashed circle 100 of FIGS. 2 or 3 .
  • FIG. 6 shows the probe tip of the structure of FIG. 5 probing an integrated circuit device.
  • FIGS. 7-13 shows the process for making the structure of FIG. 5 .
  • FIG. 14 shows a probe tip structure without a fan-out substrate.
  • FIG. 15 shows the elongated conductors of the probe tip fixed by solder protuberances to contact locations on a space transformation substrate.
  • FIG. 16 shows the elongated conductors of the probe tip fixed by laser weld protuberances to contact locations on a space transformation substrate.
  • FIG. 17 shows both interposer 76 and probe tip 40 rigidly bonded to space transformer 60 .
  • FIGS. 2 and 3 show two embodiments of the test assembly according to the present invention. Numerals common between FIGS. 2 and 3 represent the same thing.
  • Probe head 40 is formed from a plurality of elongated electrically conducting members 42 embedded in a material 44 which is preferably an elastomeric material 44 .
  • the elongated conducting members 42 have ends 46 for probing contact locations on integrated circuit devices 48 of wafer 50 .
  • the workpiece is an integrated circuit such as a semiconductor chip or a semiconductor wafer having a plurality of chips.
  • the workpiece can be any other electronic device.
  • the opposite ends 52 of elongated electrical conductors 42 are in electrical contact with space transformer (or fan-out substrate) 54 .
  • space transformer 54 is a multilevel metal/ceramic substrate, a multilevel metal/polymer substrate of a printed circuit board which are typically used as packaging substrates for integrated circuit chips.
  • Space transformer 54 has, in the preferred embodiment, a surface layer 56 comprising a plurality of thin dielectric films, preferably polymer films such as polyimide, and a plurality of layers of electrical conductors, for example, copper conductors.
  • a process for fabricating multilayer structure 56 for disposing it on surface 58 of substrate 60 to form a space transformer 54 is described in U.S. patent application Ser. No.
  • Pins 64 are standard pins used on integrated circuit chip packaging substrates. Pins 64 are inserted into socket 66 or plated through-holes in the substrate 68 which is disposed on surface 70 of second space transformer 68 .
  • socket 66 is a type of pin grid array (PGA) socket such as commonly disposed on a printed circuit board of an electronic computer for receiving pins from a packaging substrate.
  • Second space transformer 68 can be any second level integrated circuit packaging substrate, for example, a standard printed circuit board.
  • Socket 68 is disposed on surface 70 of substrate 68 . On opposite surface 70 of substrate 68 there are disposed a plurality of electrical connectors to which coaxial cables 72 are electrically connected.
  • socket 68 can be a zero insertion force (ZIF) connector or the socket 68 can be replaced by through-holes in the substrate 68 wherein the through-holes have electrically conductive material surrounding the sidewalls such as a plated through-hole.
  • ZIF zero insertion force
  • elastomeric connector 76 In the embodiment of FIG. 3 , the pin 64 and socket 66 combination of the embodiment of FIG. 2 is replaced by an interposer, such as, elastomeric connector 76 .
  • interposer such as, elastomeric connector 76 .
  • the structure of elastomeric connector 76 and the process for fabricating elastomeric connector 76 is described in copending U.S. patent application Ser. No. 07/963,364 to B. Beaman et al., filed Oct. 19, 1991, entitled “THREE DIMENSIONAL HIGH PERFORMANCE INTERCONNECTION MEANS”, which is assigned to the assignee of the present invention, the teaching of which is incorporated herein by reference and of which the present application is a continuation-in-part thereof, the priority date of the filing thereof being claimed herein.
  • the elastomeric connector can be opted to have one end permanently bonded to the substrate, thus forming a FRU (field replacement unit) together with the probe/sub
  • FIG. 4 shows a cross-sectional view of structure of the elastomeric connector 76 of FIG. 3 .
  • Connector 76 is fabricated of preferably elastomeric material 78 having opposing, substantially parallel and planar surfaces 80 and 82 .
  • Through elastomeric material 78 extending from surface 81 to 83 there are a plurality of elongated electrical conductors 85 .
  • Elongated electrical conductors 84 are preferably at a nonorthogonal angle to surfaces 81 and 83 .
  • Elongated conductors 85 are preferably wires which have protuberances 86 at surface 81 of elastomeric material layer 78 and flattened protuberances 88 at surface 83 of elastomeric material layer 78 .
  • Flattened protuberances 88 preferably have a projection on the flattened surface as shown for the structure of FIG. 14 .
  • Protuberance 86 is preferably spherical and flattened protuberance 88 is preferably a flattened sphere.
  • Connector 76 is squeezed between surface 62 of substrate 54 and surface 73 of substrate 68 to provided electrical connection between end 88 of wires 85 and contact location 75 on surface 73 of substrate 68 and between end 88 or wires 85 and contact location 64 on surface 62 of substrate 54 .
  • connector 76 can be rigidly attached to substrate 54 by solder bonding ends 88 of wires 85 to pads 64 on substrate 54 or by wire bonding ends 86 of wires 85 to pads 64 on substrate 54 in the same manner that wires 42 are bonded to pads 106 as described herein below with respect to FIG. 5 .
  • Wires 85 can be encased in an elastomeric material in the same manner as wires 42 of FIG. 5 .
  • Space transformer 54 is held in place with respect to second space transformer 68 by clamping arrangement 80 which is comprised of member 82 which is perpendicularly disposed with respect to surface 70 of second space transformer 68 and member 84 which is preferable parallely disposed with respect to surface 86 of the first space transformer 54 .
  • Member 84 presses against surface 87 of space transformer 54 to hold space transformer 54 in place with respect surface 70 of space transformer 64 .
  • Member 82 of clamping arrangement 80 can be held in place with respect to surface 70 by a screw which is inserted through member 84 at location 90 extending through the center of member 82 and screw into surface 70 .
  • second space transformer 68 and first space transformer with probe head 40 is held in place with respect wafer 50 by assembly holder 94 which is part of an integrated circuit test tool or apparatus.
  • Assembly holder 94 which is part of an integrated circuit test tool or apparatus.
  • Members 82 , 84 and 90 can be made from materials such as aluminum.
  • FIG. 5 is a enlarged view of the region of FIGS. 2 or 3 closed in dashed circle 100 which shows the attachment of probe head 40 to substrate 60 of space transformer 54 .
  • elongated conductors 42 are preferably wires which are at a non-orthogonal angle with respect to surface 87 of substrate 60 .
  • a flattened protuberance 104 which is bonded (by wire bonding, solder bonding or any other known bonding technique) to electrically conducting pad 106 on surface 87 of substrate 60 .
  • Elastomeric material 44 is substantially flush against surface 87 .
  • elongated electrically conducting members 42 have an end 110 . In the vicinity of end 110 , there is optimally a cavity 112 surrounding end 110 . The cavity is at surface 108 in the elastomeric material 44 .
  • FIG. 6 shows the structure of FIG. 5 used to probe integrated circuit chip 114 which has a plurality of contact locations 116 shown as spheres such as a C4 solder balls.
  • the ends 110 of conductors 42 are pressed in contact with contact locations 116 for the purpose of electrically probing integrated circuit 114 .
  • Cavity 112 provides an opening in elastomeric material 44 to permit ends 110 to be pressed towards and into solder mounds 116 .
  • Cavity 112 provides a means for solder mounds 116 to self align to ends 110 and provides a means containing solder mounds which may melt, seep or be less viscous when the probe is operated at an elevated temperature. When the probe is used to test or burn-in workpieces have flat pads as contact locations the cavities 112 can remain or be eliminated.
  • FIGS. 7-13 show the process for fabricating the structure of FIG. 5 .
  • Substrate 60 with contact locations 106 thereon is disposed by a wire bond tool.
  • the top surface 122 of pad 106 is coated by a method such as evaporation, sputtering or plating with soft gold or Ni/Au to provide a suitable surface for thermosonic ball bonding.
  • Other bonding techniques can be used such as thermal compression bonding, ultrasonic bonding, laser bonding and the like.
  • a commonly used automatic wire bonder is modified to ball bond gold, gold alloy, copper, copper alloy, aluminum, Pt, nickel or palladium wires 120 to the pad 106 on surface 122 as shown in FIG. 7 .
  • the wire preferably has a diameter of 0.001 to 0.05 inches.
  • Structure 124 of FIG. 7 is the ball bonding head which has a wire 126 being fed from a reservoir of wire as in a conventional wire bonding apparatus.
  • FIG. 7 shows the ball bond head 124 in contact at location 126 with surface 122 of pad 106 .
  • FIG. 8 shows the ball bonding head 124 withdrawn in the direction indicated by arrow 128 from the pad 106 and the wire 126 drawn out to leave disposed on the pad 106 surface 122 wire 130 .
  • the bond head 124 is stationary and the substrate 60 is advanced as indicated by arrow 132 .
  • the bond wire is positioned at an angle preferably between 5 to 60° from vertical and then mechanically notched (or nicked) by knife edge 134 as shown in FIG. 9 .
  • the knife edge 134 is actuated, the wire 126 is clamped and the bond head 124 is raised. The wire is pulled up and breaks at the notch or nick.
  • each wire is ball bonded to adjacent contact locations which can be spaced less than 5 mils apart.
  • the wire is held tight and knife edge 134 notches the wire leaving upstanding or flying leads 120 bonded to contact locations 106 in a dense array.
  • FIG. 10 shows the wire 126 notched (or nicked) to leave wire 120 disposed on surface 122 of pad 106 .
  • the wire bond head 124 is retracted upwardly as indicated by arrow 136 .
  • the wire bond head 124 has a mechanism to grip and release wire 126 so that wire 126 can be tensioned against the shear blade to sever the wire.
  • a casting mold 140 as shown in FIG. 11 is disposed on surface 142 of substrate 60 .
  • the mold is a tubular member of any cross-sectional shape, such as circular and polygonal.
  • the mold is preferably made of metal or organic materials.
  • the length of the mold is preferably the height of 144 of the wires 120 .
  • a controlled volume of liquid elastomer 146 is disposed into the casting 140 mold and allowed to settle out (flow between the wires until the surface is level) before curing as shown in FIG. 13 .
  • the mold is removed to provide the structure shown in FIG. 5 except for cavities 112 .
  • the cured elastomer is represented by reference numeral 44 .
  • a mold enclosing the wires 120 can be used so that the liquid elastomer can be injection molded to encase the wires 120 .
  • the top surface of the composite polymer/wire block can be mechanically planarized to provided a uniform wire height and smooth polymer surface.
  • a moly mask with holes located over the ends of the wire contacts is used to selectively ablate (or reactive ion etch) a cup shaped recess in the top surface of the polymer around each of the wires.
  • the probe contacts can be reworked by repeating the last two process steps.
  • a high compliance, high thermal stability siloxane elastomer material is preferable for this application.
  • the compliance of the cured elastomer is selected for the probe application. Where solder mounds are probed a more rigid elastomeric is used so that the probe tips are pushed into the solder mounds where a gold coated aluminum pad is being probed a more compliant elastomeric material is used to permit the wire to flex under pressure so that the probe ends in contact with the pad will move to wipe over the pad so that good electrical contact is made therewith.
  • the high temperature siloxane material is cast or injected and cured similar to other elastomeric materials. To minimize the shrinkage, the elastomer is preferable cured at lower temperature (T ⁇ 60°) followed by complete cure at higher temperatures (T ⁇ 80°)
  • the use of polydimethylsiloxane based rubbers best satisfy both the material and processing requirements.
  • the thermal stability of such elastomers is limited at temperatures below 200° C. and significant outgassing is observed above 100° C.
  • the thermal stability can be significantly enhanced by the incorporation of 25 wt % or more diphenylsiloxane.
  • enhancement in the thermal stability has been demonstrated by increasing the molecular weight of the resins (oligomers) or minimizing the cross-link junction. The outgassing of the elastomers can be minimized at temperatures below 300° C.
  • the high density test probe provides a means for testing high density and high performance integrated circuits in wafer form or as discrete chips.
  • the probe contacts can be designed for high performance functional testing or high temperature burn-in applications.
  • the probe contacts can also be reworked several times by resurfacing the rigid polymer material that encases the wires exposing the ends of the contacts.
  • the high density probe contacts described in this disclosure are designed to be used for testing semiconductor devices in either wafer form or as discrete chips.
  • the high density probes uses metal wires that are bonded to a rigid substrate.
  • the wires are imbedded in a rigid polymer that has a cup shaped recess around each to the wire ends.
  • the cup shaped recess 112 shown in FIG. 5 provides a positive self-aligning function for chips with solder ball contacts.
  • a plurality of probe heads 40 can be mounted onto a space transformation substrate 60 so that a plurality of chips can be probed an burned-in simultaneously.
  • an alternate embodiment of this invention would include straight wires instead of angled wires.
  • Another alternate embodiment could use a suspended alignment mask for aligning the chip in the wire contacts instead of the cup shaped recesses in the top surface of the rigid polymer.
  • the suspended alignment mask is made by ablating holes in a thin sheet of polymide using an excimer laser and a metal mask with the correct hole pattern.
  • Another alternate embodiment of this design would include a interposer probe assembly that could be made separately from the test substrate as described in U.S. patent application Ser. No. 07/963,364, incorporated by reference herein above.
  • This design could be fabricated by using a copper substrate that would be etched away after the probe assembly is completed and the polymer is cured. This approach could be further modified by using an adhesion de-promoter on the wires to allow them to slide freely (along the axis of the wires) in the polymer material.
  • FIG. 14 shows an alternate embodiment of probe tip 40 of FIGS. 2 and 3 .
  • probe tip 40 is fabricated to be originally fixed to the surface of a first level space transformer 54 .
  • Each wire 120 is wire bonded directly to a pad 106 on substrate 60 so that the probe assembly 40 is rigidly fixed to the substrate 60 .
  • the probe head assembly 40 can be fabricated via a discrete stand alone element. This can be fabricated following the process of U.S. patent application Ser. No. 07/963,348 filed Oct. 19, 1992, which has been incorporated herein by reference above. Following this fabrication process as described herein above, wires 42 of FIG. 14 are wire bonded to a surface.
  • wire 42 is wire bonded to a sacrificial substrate as described in the application incorporated herein.
  • the sacrificial substrate is removed to leave the structure of FIG. 14 .
  • the sacrificial substrate to which the wires are bonded have an array of pits which result in a protrusion 150 which can have any predetermined shape such as a hemisphere or a pyramid.
  • Protrusion 150 provides a raised contact for providing good electrical connection to a contact location against which it is pressed.
  • probe tip assembly 40 can be pressed towards surface 58 of substrate 60 so that ends 104 of FIG. 14 can be pressed against contact locations such as 106 of FIG. 5 in a manner similar to how the conductor ends 86 and 88 of the connector in FIG. 4 are aligned to pads 75 and 64 respectively.
  • wire 126 is ball bonded to pad 106 on substrate 60 .
  • An alternative process is to start with a substrate 160 as shown in FIG. 15 having contact locations 162 having an electrically conductive material 164 disposed on surface 166 of contact location 162 .
  • Electrically conductive material 164 can be solder.
  • a bond lead such as 124 of FIG. 7 can be used to dispose end 168 of wire 170 against solder mound 164 which can be heated to melting. End 168 of wire 170 is pressed into the molten solder mound to form wire 172 embedded into a solidified solder mound 174 .
  • Using this process a structure similar to that of FIG. 5 can be fabricated.
  • FIG. 16 shows another alternative embodiment of a method to fabricate the structure of FIG. 5 .
  • End 180 elongated electrical conductor 182 is held against top surface 163 of pad 162 on substrate 160 .
  • a beam of light 184 from laser 186 is directed at end 180 of elongated conductor 182 at the location of contact with surface 163 of pad 162 .
  • the end 180 is laser welded to surface 163 to form protuberance 186 .
  • the present invention is directed to high density test probe for testing high density and high performance integrated circuits in wafer form or as discrete chips.
  • the probe contacts are designed for high performance functional testing and for high temperature burn in applications.
  • the probe is formed from an elastomeric probe tip having a highly dense array of elongated electrical conductors embedded in an elastomeric material which is in electrical contact with a space transformer.

Abstract

The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer forms or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer. The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

Description

    FIELD OF THE INVENTION
  • This invention related to an apparatus and test probe for integrated circuit devices and methods of use thereof.
  • BACKGROUND OF THE INVENTION
  • In the microelectronics industry, before integrated circuit (IC) chips are packaged in an electronic component, such as a computer, they are tested. Testing is essential to determine whether the integrated circuit's electrical characteristics conform to the specifications to which they were designed to ensure that electronic component performs the function for which it was designed.
  • Testing is an expensive part of the fabrication process of contemporary computing systems. The functionality of ever I/O for contemporary integrated circuit must be tested since a failure to achieve the design specification at a single I/O can render an integrated circuit unusable for a specific application. The testing is commonly done both at room temperature and at elevated temperatures to test functionality and at elevated temperatures with forced voltages and currents to burn the chips in and to test the reliability of the integrated circuit to screen out early failures.
  • Contemporary probes for integrated circuits are expensive to fabricate and are easily damaged. Contemporary test probes are typically fabricated on a support substrate from groups of elongated metal conductors which fan inwardly towards a central location where each conductor has an end which corresponds to a contact location on the integrated circuit to be tested. The metal conductors generally cantilever over an aperture in the support substrate. The wires are generally fragile and easily damage and are easily displaceable from the predetermined positions corresponding to the design positions of the contact locations on the integrated circuit being tested. These probes last only a certain number of testing operations, after which they must be replaced by an expensive replacement or reworked to recondition the probes.
  • FIG. 1 shows a side cross-sectional view of a prior art probe assembly 2 for probing integrated circuit chip 4 which is disposed on surface 6 of support member 8 for integrated circuit chip 4. Probe assembly 2 consists of a dielectric substrate 10 having a central aperture 12 therethrough. On surface 14 of substrate 10 there are disposed a plurality of electrically conducting beams which extend towards edge 18 of aperture 12. Conductors 16 have ends 20 which bend downwardly in a direction generally perpendicular to the plane of surface 14 of substrate 10. Tips 22 of downwardly projecting electrically conducting ends 20 are disposed in electrical contact with contact locations 24 on surface 25 of integrated circuit chip 4. Coaxial cables 26 bring electrical signals, power and ground through electrical connectors 28 at periphery 30 of substrate 10. Structure 2 of FIG. 1 has the disadvantage of being expensive to fabricate and of having fragile inner ends 20 of electrical conductors 16. Ends 20 are easily damaged through use in probing electronic devices. Since the probe 2 is expensive to fabricate, replacement adds a substantial cost to the testing of integrated circuit devices. Conductors 16 were generally made of a high strength metal such as tungsten to resist damage from use. Tungsten has an undesirably high resistivity.
  • SUMMARY OF THE INVENTION
  • It is an object of the present invention to provide an improved high density test probe, test apparatus and method of use thereof.
  • It is another object of the present invention to provided an improved test probe for testing and burning-in integrated circuits.
  • It is another object of the present invention to provide an improved test probe and apparatus for testing integrated circuits in wafer form and as discrete integrated circuit chips.
  • It is an additional object of the present invention to provide probes having contacts which can be designed for high performance functional testing and for high temperature burn in applications.
  • It is yet another object of the present invention to provide probes having contacts which can be reworked several times by resurfacing some of the materials used to fabricate the probe of the present invention.
  • It is a further object of the present invention to provide an improved test probe having a probe tip member containing a plurality of elongated conductors each ball bonded to electrical contact locations on space transformation substrate.
  • A broad aspect of the present invention is a test probe having a plurality lf electrically conducting elongated members embedded in a material. One end of each conductor is arranged for alignment with contact locations on a workpiece to be tested.
  • In a more particular aspect of the invention, the other end of the elongated conductors are electrically connected to contact locations on the surface of a fan-out substrate. The fan-out substrate provides space transformation of the closely spaced electrical contacts on the first side of the fan-out substrate. Contact locations having a larger spacing are on a second side of the fan out substrate.
  • In yet another more particular aspect of the present invention, pins are electrically connected to the contact location on the second surface of the fan out substrate.
  • In another more particular aspect of the present invention, the plurality of pins on the second surface of the fan-out substrate are inserted into a socket on a second fan-out substrate. The first and second space transformation substrates provide fan out from the line pitch of the integrated circuit I/O to a larger pitch of electrical contacts for providing signal, power and ground to the workpiece to be tested.
  • In another more particularly aspect of the present invention, the pin and socket assembly is replaced by an interposer containing a plurality of elongated electrical connectors embedded in a layer of material which is squeezed between contact locations on the first fan-out substrate and contact locations on the second fan-out substrate.
  • In another more particular aspect of the present invention, the test probe is part of a test apparatus and test tool.
  • Another broad aspect of the present invention is a method of fabricating the probe tip of the probe according to the present invention wherein a plurality of elongated conductors are bonded to contact locations on a substrate surface and project away therefrom.
  • In a more particular aspect of the method according to the present invention, the elongated conductors are wire bonded to contact locations on the substrate surface. The wires project preferable at a nonorthogonal angle from the contact locations.
  • In another more particular aspect of the method of the present invention, the wires are bonded to the contact locations on the substrate are embedded in a elastomeric material to form a probe tip for the structure of the present invention.
  • In another more particular aspect of the present invention, the elongated conductors are embedded in an elastomeric material.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a schematic cross-section of a conventional test probe for an integrated circuit device.
  • FIG. 2 is a schematic diagram of one embodiment of the probe structure of the present invention.
  • FIG. 3 is a schematic diagram of another embodiment of the probe structure of the present invention.
  • FIG. 4 is an enlarged view of an elastomeric connector electrically interconnecting two space transformation substrates of the structure of FIG. 2.
  • FIG. 5 is an enlarged view of the probe tip within dashed circle 100 of FIGS. 2 or 3.
  • FIG. 6 shows the probe tip of the structure of FIG. 5 probing an integrated circuit device.
  • FIGS. 7-13 shows the process for making the structure of FIG. 5.
  • FIG. 14 shows a probe tip structure without a fan-out substrate.
  • FIG. 15 shows the elongated conductors of the probe tip fixed by solder protuberances to contact locations on a space transformation substrate.
  • FIG. 16 shows the elongated conductors of the probe tip fixed by laser weld protuberances to contact locations on a space transformation substrate.
  • FIG. 17 shows both interposer 76 and probe tip 40 rigidly bonded to space transformer 60.
  • DETAILED DESCRIPTION
  • Turning now to the figures, FIGS. 2 and 3 show two embodiments of the test assembly according to the present invention. Numerals common between FIGS. 2 and 3 represent the same thing. Probe head 40 is formed from a plurality of elongated electrically conducting members 42 embedded in a material 44 which is preferably an elastomeric material 44. The elongated conducting members 42 have ends 46 for probing contact locations on integrated circuit devices 48 of wafer 50. In the preferred embodiment, the workpiece is an integrated circuit such as a semiconductor chip or a semiconductor wafer having a plurality of chips. The workpiece can be any other electronic device. The opposite ends 52 of elongated electrical conductors 42 are in electrical contact with space transformer (or fan-out substrate) 54. In the preferred embodiment, space transformer 54 is a multilevel metal/ceramic substrate, a multilevel metal/polymer substrate of a printed circuit board which are typically used as packaging substrates for integrated circuit chips. Space transformer 54 has, in the preferred embodiment, a surface layer 56 comprising a plurality of thin dielectric films, preferably polymer films such as polyimide, and a plurality of layers of electrical conductors, for example, copper conductors. A process for fabricating multilayer structure 56 for disposing it on surface 58 of substrate 60 to form a space transformer 54 is described in U.S. patent application Ser. No. 07/695,368, filed on May 3, 1991, entitled “MULTI-LAYER THIN FILM STRUCTURE AND PARALLEL PROCESSING METHOD FOR FABRICATING SAME” which is assigned to the assignee of the present invention, the teaching of which is incorporated herein by reference. Details of the fabrication of probe head 40 and of the assembly of probe head 40 and 54 will be described herein below.
  • As shown in FIG. 2, on surface 62 of substrate 60, there are, a plurality of pins 64. Surface 62 is opposite the surface 57 on which probe head 40 is disposed.
  • Pins 64 are standard pins used on integrated circuit chip packaging substrates. Pins 64 are inserted into socket 66 or plated through-holes in the substrate 68 which is disposed on surface 70 of second space transformer 68. socket 66 is a type of pin grid array (PGA) socket such as commonly disposed on a printed circuit board of an electronic computer for receiving pins from a packaging substrate. Second space transformer 68 can be any second level integrated circuit packaging substrate, for example, a standard printed circuit board. Socket 68 is disposed on surface 70 of substrate 68. On opposite surface 70 of substrate 68 there are disposed a plurality of electrical connectors to which coaxial cables 72 are electrically connected. Alternatively, socket 68 can be a zero insertion force (ZIF) connector or the socket 68 can be replaced by through-holes in the substrate 68 wherein the through-holes have electrically conductive material surrounding the sidewalls such as a plated through-hole.
  • In the embodiment of FIG. 3, the pin 64 and socket 66 combination of the embodiment of FIG. 2 is replaced by an interposer, such as, elastomeric connector 76. The structure of elastomeric connector 76 and the process for fabricating elastomeric connector 76 is described in copending U.S. patent application Ser. No. 07/963,364 to B. Beaman et al., filed Oct. 19, 1991, entitled “THREE DIMENSIONAL HIGH PERFORMANCE INTERCONNECTION MEANS”, which is assigned to the assignee of the present invention, the teaching of which is incorporated herein by reference and of which the present application is a continuation-in-part thereof, the priority date of the filing thereof being claimed herein. The elastomeric connector can be opted to have one end permanently bonded to the substrate, thus forming a FRU (field replacement unit) together with the probe/substrate/connector assembly.
  • FIG. 4 shows a cross-sectional view of structure of the elastomeric connector 76 of FIG. 3. Connector 76 is fabricated of preferably elastomeric material 78 having opposing, substantially parallel and planar surfaces 80 and 82. Through elastomeric material 78, extending from surface 81 to 83 there are a plurality of elongated electrical conductors 85. Elongated electrical conductors 84 are preferably at a nonorthogonal angle to surfaces 81 and 83. Elongated conductors 85 are preferably wires which have protuberances 86 at surface 81 of elastomeric material layer 78 and flattened protuberances 88 at surface 83 of elastomeric material layer 78. Flattened protuberances 88 preferably have a projection on the flattened surface as shown for the structure of FIG. 14. Protuberance 86 is preferably spherical and flattened protuberance 88 is preferably a flattened sphere. Connector 76 is squeezed between surface 62 of substrate 54 and surface 73 of substrate 68 to provided electrical connection between end 88 of wires 85 and contact location 75 on surface 73 of substrate 68 and between end 88 or wires 85 and contact location 64 on surface 62 of substrate 54.
  • Alternatively, as shown in FIG. 17, connector 76 can be rigidly attached to substrate 54 by solder bonding ends 88 of wires 85 to pads 64 on substrate 54 or by wire bonding ends 86 of wires 85 to pads 64 on substrate 54 in the same manner that wires 42 are bonded to pads 106 as described herein below with respect to FIG. 5. Wires 85 can be encased in an elastomeric material in the same manner as wires 42 of FIG. 5.
  • Space transformer 54 is held in place with respect to second space transformer 68 by clamping arrangement 80 which is comprised of member 82 which is perpendicularly disposed with respect to surface 70 of second space transformer 68 and member 84 which is preferable parallely disposed with respect to surface 86 of the first space transformer 54. Member 84 presses against surface 87 of space transformer 54 to hold space transformer 54 in place with respect surface 70 of space transformer 64. Member 82 of clamping arrangement 80 can be held in place with respect to surface 70 by a screw which is inserted through member 84 at location 90 extending through the center of member 82 and screw into surface 70.
  • The entire assembly of second space transformer 68 and first space transformer with probe head 40 is held in place with respect wafer 50 by assembly holder 94 which is part of an integrated circuit test tool or apparatus. Members 82, 84 and 90 can be made from materials such as aluminum.
  • FIG. 5 is a enlarged view of the region of FIGS. 2 or 3 closed in dashed circle 100 which shows the attachment of probe head 40 to substrate 60 of space transformer 54. In the preferred embodiment, elongated conductors 42 are preferably wires which are at a non-orthogonal angle with respect to surface 87 of substrate 60. At end 102 of wire 42 there is preferable a flattened protuberance 104 which is bonded (by wire bonding, solder bonding or any other known bonding technique) to electrically conducting pad 106 on surface 87 of substrate 60. Elastomeric material 44 is substantially flush against surface 87. At substantially oppositely disposed planar surface 108 elongated electrically conducting members 42 have an end 110. In the vicinity of end 110, there is optimally a cavity 112 surrounding end 110. The cavity is at surface 108 in the elastomeric material 44.
  • FIG. 6 shows the structure of FIG. 5 used to probe integrated circuit chip 114 which has a plurality of contact locations 116 shown as spheres such as a C4 solder balls. The ends 110 of conductors 42 are pressed in contact with contact locations 116 for the purpose of electrically probing integrated circuit 114. Cavity 112 provides an opening in elastomeric material 44 to permit ends 110 to be pressed towards and into solder mounds 116. Cavity 112 provides a means for solder mounds 116 to self align to ends 110 and provides a means containing solder mounds which may melt, seep or be less viscous when the probe is operated at an elevated temperature. When the probe is used to test or burn-in workpieces have flat pads as contact locations the cavities 112 can remain or be eliminated.
  • FIGS. 7-13 show the process for fabricating the structure of FIG. 5. Substrate 60 with contact locations 106 thereon is disposed by a wire bond tool. The top surface 122 of pad 106 is coated by a method such as evaporation, sputtering or plating with soft gold or Ni/Au to provide a suitable surface for thermosonic ball bonding. Other bonding techniques can be used such as thermal compression bonding, ultrasonic bonding, laser bonding and the like. A commonly used automatic wire bonder is modified to ball bond gold, gold alloy, copper, copper alloy, aluminum, Pt, nickel or palladium wires 120 to the pad 106 on surface 122 as shown in FIG. 7. The wire preferably has a diameter of 0.001 to 0.05 inches. If a metal other than Au is used, a thin passivation metal such as Au, Cr, Co, Ni or Pd can be coated over the wire by means of electroplating, or electroless plating, sputtering, e-beam evaporation or any other coating techniques known in the industry. Structure 124 of FIG. 7 is the ball bonding head which has a wire 126 being fed from a reservoir of wire as in a conventional wire bonding apparatus. FIG. 7 shows the ball bond head 124 in contact at location 126 with surface 122 of pad 106.
  • FIG. 8 shows the ball bonding head 124 withdrawn in the direction indicated by arrow 128 from the pad 106 and the wire 126 drawn out to leave disposed on the pad 106 surface 122 wire 130. In the preferred embodiment, the bond head 124 is stationary and the substrate 60 is advanced as indicated by arrow 132. The bond wire is positioned at an angle preferably between 5 to 60° from vertical and then mechanically notched (or nicked) by knife edge 134 as shown in FIG. 9. The knife edge 134 is actuated, the wire 126 is clamped and the bond head 124 is raised. The wire is pulled up and breaks at the notch or nick.
  • Cutting the wire 130 while it is suspended is not done in conventional wire bonding. In conventional wire boding, such as that used to fabricate the electrical connector of U.S. Pat. No. 4,998,885, where, as shown in FIG. 8 thereof, one end a wire is ball bonded using a wire bonded to a contact location on a substrate bent over a loop post and the other of the wire is wedge bonded to an adjacent contact location on the substrate. The loop is severed by a laser as shown in FIG. 6 and the ends melted to form balls. This process results in adjacent contact locations having different types of bonds, one a ball bond the other a wedge bond. The spacing of the adjacent pads cannot be less than about ˜20 mils because of the need to bond the wire. This spacing is unacceptable to fabricate a high density probe tip since dense integrated circuits have pad spacing less than this amount. In contradistinction, according to the present invention, each wire is ball bonded to adjacent contact locations which can be spaced less than 5 mils apart. The wire is held tight and knife edge 134 notches the wire leaving upstanding or flying leads 120 bonded to contact locations 106 in a dense array.
  • When the wire 130 is severed there is left on the surface 122 of pad 106 an angled flying lead 120 which is bonded to surface 122 at one end and the other end projects outwardly away from the surface. A ball can be formed on the end of the wire 130 which is not bonded to surface 122 using a laser or electrical discharge to melt the end of the wire. Techniques for this are described in co-pending U.S. patent application Ser. No. 07/963,346, file Oct. 19, 1992, which is incorporated herein by reference above.
  • FIG. 10 shows the wire 126 notched (or nicked) to leave wire 120 disposed on surface 122 of pad 106. The wire bond head 124 is retracted upwardly as indicated by arrow 136. The wire bond head 124 has a mechanism to grip and release wire 126 so that wire 126 can be tensioned against the shear blade to sever the wire.
  • After the wire bonding process is completed, a casting mold 140 as shown in FIG. 11 is disposed on surface 142 of substrate 60. The mold is a tubular member of any cross-sectional shape, such as circular and polygonal. The mold is preferably made of metal or organic materials. The length of the mold is preferably the height of 144 of the wires 120. A controlled volume of liquid elastomer 146 is disposed into the casting 140 mold and allowed to settle out (flow between the wires until the surface is level) before curing as shown in FIG. 13. Once the elastomer has cured, the mold is removed to provide the structure shown in FIG. 5 except for cavities 112. The cured elastomer is represented by reference numeral 44. A mold enclosing the wires 120 can be used so that the liquid elastomer can be injection molded to encase the wires 120.
  • The top surface of the composite polymer/wire block can be mechanically planarized to provided a uniform wire height and smooth polymer surface. A moly mask with holes located over the ends of the wire contacts is used to selectively ablate (or reactive ion etch) a cup shaped recess in the top surface of the polymer around each of the wires. The probe contacts can be reworked by repeating the last two process steps.
  • A high compliance, high thermal stability siloxane elastomer material is preferable for this application. The compliance of the cured elastomer is selected for the probe application. Where solder mounds are probed a more rigid elastomeric is used so that the probe tips are pushed into the solder mounds where a gold coated aluminum pad is being probed a more compliant elastomeric material is used to permit the wire to flex under pressure so that the probe ends in contact with the pad will move to wipe over the pad so that good electrical contact is made therewith. The high temperature siloxane material is cast or injected and cured similar to other elastomeric materials. To minimize the shrinkage, the elastomer is preferable cured at lower temperature (T≦60°) followed by complete cure at higher temperatures (T≧80°)
  • Among the many commercially available elastomers, such as ECCOSIL and STLGARD, the use of polydimethylsiloxane based rubbers best satisfy both the material and processing requirements. However, the thermal stability of such elastomers is limited at temperatures below 200° C. and significant outgassing is observed above 100° C. We have found that the thermal stability can be significantly enhanced by the incorporation of 25 wt % or more diphenylsiloxane. Further, enhancement in the thermal stability has been demonstrated by increasing the molecular weight of the resins (oligomers) or minimizing the cross-link junction. The outgassing of the elastomers can be minimized at temperatures below 300° C. by first using a thermally transient catalyst in the resin synthesis and secondly subjecting the resin to a thin film distillation to remove low molecular with side-products. For our experiments, we have found that 25 wt % diphenylsiloxane is optimal, balancing the desired thermal stability with the increased viscosity associated with diphenylsiloxane incorporation. The optimum number average molecular weight of the resin for maximum thermal stability was found to be between 18,000 and 35,000 g/mol. Higher molecular weights were difficult to cure and too viscous, once filled, to process. Network formation was achieved by a standard hydrosilylation polymerization using a hindered platinum catalyst in a reactive silicon oil carrier.
  • In FIG. 10 when bond head 124 bonds the wire 126 to the surface 122 of pad 106 there is formed a flattened spherical end shown as 104 in FIG. 6.
  • The high density test probe provides a means for testing high density and high performance integrated circuits in wafer form or as discrete chips. The probe contacts can be designed for high performance functional testing or high temperature burn-in applications. The probe contacts can also be reworked several times by resurfacing the rigid polymer material that encases the wires exposing the ends of the contacts.
  • The high density probe contacts described in this disclosure are designed to be used for testing semiconductor devices in either wafer form or as discrete chips. The high density probes uses metal wires that are bonded to a rigid substrate. The wires are imbedded in a rigid polymer that has a cup shaped recess around each to the wire ends. The cup shaped recess 112 shown in FIG. 5 provides a positive self-aligning function for chips with solder ball contacts. A plurality of probe heads 40 can be mounted onto a space transformation substrate 60 so that a plurality of chips can be probed an burned-in simultaneously.
  • an alternate embodiment of this invention would include straight wires instead of angled wires. Another alternate embodiment could use a suspended alignment mask for aligning the chip in the wire contacts instead of the cup shaped recesses in the top surface of the rigid polymer. The suspended alignment mask is made by ablating holes in a thin sheet of polymide using an excimer laser and a metal mask with the correct hole pattern. Another alternate embodiment of this design would include a interposer probe assembly that could be made separately from the test substrate as described in U.S. patent application Ser. No. 07/963,364, incorporated by reference herein above. This design could be fabricated by using a copper substrate that would be etched away after the probe assembly is completed and the polymer is cured. This approach could be further modified by using an adhesion de-promoter on the wires to allow them to slide freely (along the axis of the wires) in the polymer material.
  • FIG. 14 shows an alternate embodiment of probe tip 40 of FIGS. 2 and 3. As described herein above, probe tip 40 is fabricated to be originally fixed to the surface of a first level space transformer 54. Each wire 120 is wire bonded directly to a pad 106 on substrate 60 so that the probe assembly 40 is rigidly fixed to the substrate 60. The embodiment of FIG. 14, the probe head assembly 40 can be fabricated via a discrete stand alone element. This can be fabricated following the process of U.S. patent application Ser. No. 07/963,348 filed Oct. 19, 1992, which has been incorporated herein by reference above. Following this fabrication process as described herein above, wires 42 of FIG. 14 are wire bonded to a surface. Rather than being wire bonded directly to a pad on a space transformation substrate, wire 42 is wire bonded to a sacrificial substrate as described in the application incorporated herein. The sacrificial substrate is removed to leave the structure of FIG. 14. At ends 102 of wires 44 there is a flattened ball 104 caused by the wire bond operation. In a preferred embodiment the sacrificial substrate to which the wires are bonded have an array of pits which result in a protrusion 150 which can have any predetermined shape such as a hemisphere or a pyramid. Protrusion 150 provides a raised contact for providing good electrical connection to a contact location against which it is pressed. The clamp assembly 80 of FIGS. 2 and 3 can be modified so that probe tip assembly 40 can be pressed towards surface 58 of substrate 60 so that ends 104 of FIG. 14 can be pressed against contact locations such as 106 of FIG. 5 in a manner similar to how the conductor ends 86 and 88 of the connector in FIG. 4 are aligned to pads 75 and 64 respectively.
  • As shown in the process of FIGS. 7 to 9, wire 126 is ball bonded to pad 106 on substrate 60. An alternative process is to start with a substrate 160 as shown in FIG. 15 having contact locations 162 having an electrically conductive material 164 disposed on surface 166 of contact location 162. Electrically conductive material 164 can be solder. A bond lead such as 124 of FIG. 7 can be used to dispose end 168 of wire 170 against solder mound 164 which can be heated to melting. End 168 of wire 170 is pressed into the molten solder mound to form wire 172 embedded into a solidified solder mound 174. Using this process a structure similar to that of FIG. 5 can be fabricated.
  • FIG. 16 shows another alternative embodiment of a method to fabricate the structure of FIG. 5.
  • Numerals common between FIGS. 15 and 16 represent the same thing. End 180 elongated electrical conductor 182 is held against top surface 163 of pad 162 on substrate 160. A beam of light 184 from laser 186 is directed at end 180 of elongated conductor 182 at the location of contact with surface 163 of pad 162. The end 180 is laser welded to surface 163 to form protuberance 186.
  • In summary, the present invention is directed to high density test probe for testing high density and high performance integrated circuits in wafer form or as discrete chips. The probe contacts are designed for high performance functional testing and for high temperature burn in applications. The probe is formed from an elastomeric probe tip having a highly dense array of elongated electrical conductors embedded in an elastomeric material which is in electrical contact with a space transformer.
  • While the present invention has been described with respect to preferred embodiments, numerous modifications, changes and improvements will occur to those skilled in the art without departing from the spirit and scope of the invention.

Claims (27)

1-28. (canceled)
29. A method of probing an electronic component by contacting the electronic component with a plurality of flexible contact elements, the method comprising the steps of:
providing a first substrate corresponding to an area of the electronic component to be probed, said substrate having a front surface;
mounting and connecting a second substrate to the front surface of the first substrate, said second substrate having a plurality of flexible contact elements bonded to and extending from a surface thereof;
urging the first substrate and the electronic component towards one another so that the flexible contact elements make contact with a surface of the electronic component shape;
the flexible contact elements flex and wipe the surface of the electronic component when the flexible contacts contact the electronic components;
the flexible contact elements substantially compliantly respond when the flexible contact elements are withdrawn from contacting the electronic component; and
aligning the second substrate to the first substrate to align the flexible contact elements to the electronic component.
30. A method according to claim 29, wherein the electronic component is a semiconductor wafer.
31. A method according to claim 30, wherein the area is a plurality of integrated circuits on the semiconductor wafer; and the flexible contacts make contact with the plurality of die sites all at once.
32. A method according to claim 29, wherein the area of the electronic component is a portion of a surface area of the electronic component.
33. A method according to claim 29, wherein the flexible elements are probe elements.
34. A method according to claim 29, wherein there are electrical connections between the second substrates and the first substrate.
35. A method according to claim 29, wherein the first substrate is a space transformer.
36. A method according to claim 29, wherein the electronic component is a semiconductor wafer; and the flexible contact elements of the second substrate contact individual semiconductor dies on the semiconductor wafer.
37. A method according to claim 29, wherein the electronic component is a semiconductor wafer; and the flexible contact elements of the second substrate contacts at least one integrated circuit on the semiconductor wafer.
38. A method of probing an electronic device according to claim 29 wherein:
urging the first substrate and the electronic device towards one another so that the flexible contact elements make contact with the surface of the electronic component comprising a free end of the flexible contact elements laterally move when pressed against the area of the electronic device, and the first substrate with the second substrate mounted thereto is mounted to an electrical testing apparatus; and
39. A method according to claim 29, wherein the first substrate with the second substrate mounted thereto is mounted to an electrical testing apparatus by a plurality of electrical connections.
40. A probe structure comprising an assembly comprising:
a first substrate having a top surface, a bottom surface, a first plurality of terminals disposed on the top surface, and a second plurality of terminals disposed on the bottom surface;
at least one second substrate having a top surface and a bottom surface;
means for effecting electrical connections between the at least one second substrate and the first substrate;
a plurality of probe elements disposed on the top surface of the at least one second substrate;
the probe elements are free-standing flexible conductors shaped so that a free end thereof laterally movers when pressed against a surface; and
means for aligning the second substrate to the first substrate to align the flexible contact elements to the electronic component.
41. A structure according to claim 40, wherein the probe elements are free-standing flexible conductors.
42. A structure according to claim 40, wherein protuberances are deposed at ends of the plurality of free-standing flexible conductors.
43. A structure according to claim 40, wherein the free-standing flexible conductor further includes a protuberance at an end thereof.
44. A method according to claim 29, further including plurality of groups of said plurality of the flexible electrical contact elements.
45. A method according to claim 29, wherein there is a least one of said second substrates mounted to said first substrate.
46. A method according to claim 29, wherein there are a plurality of said second substrates mounted to said first substrate.
47. A method according to claim 33 where each of said plurality of flexible contact elements flex and wipe the area of the electronic device when said flexible contacts contact the electronic component; the flexible contact element substantially compliantly respond when the flexible contact element are withdrawn from contacting the electronic component.
48. A method according to claim 29, wherein the flexible contact elements can be repeatably assembled and disassembled so that said flexible contact element can recontact, reflex and rewipe the area of the electronic device.
49. A method according to claim 47, wherein the rewiped area is an area selected from the group consisting of an area of the same or a different electronic device.
50. A structure according to claim 49, wherein the flexible contact elements are said free standing flexible conductors comprise a coating.
51. A structure according to claim 50 wherein said coating is selected from the group consisting of Au, Cr, Co, Ni and Pd.
52. A structure according to claim 51 wherein said free standing flexible conductor comprises gold, gold alloy, copper, copper alloy, aluminum, nickel, palladium and platinum.
53. A method of probing according to claim 29 wherein said aligning is by a screw mechanism to adjust the orientation of the second substrate to the first substrate.
54. A method of probing according to claim 53 wherein the aligned first substrate and second substrate are held together with the plurality of flexible contact elements disposed in electrical contact with the electronic component.
US11/930,638 1992-10-19 2007-10-31 High density integrated circuit apparatus, test probe and methods of use thereof Abandoned US20080106291A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/930,638 US20080106291A1 (en) 1992-10-19 2007-10-31 High density integrated circuit apparatus, test probe and methods of use thereof

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US07/963,346 US5371654A (en) 1992-10-19 1992-10-19 Three dimensional high performance interconnection package
US08/055,485 US5635846A (en) 1992-10-19 1993-04-30 Test probe having elongated conductor embedded in an elostomeric material which is mounted on a space transformer
US08/754,869 US5821763A (en) 1992-10-19 1996-11-22 Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof
US08/872,519 US6334247B1 (en) 1992-10-19 1997-06-11 High density integrated circuit apparatus, test probe and methods of use thereof
US09/382,834 US7538565B1 (en) 1992-10-19 1999-08-25 High density integrated circuit apparatus, test probe and methods of use thereof
US11/930,638 US20080106291A1 (en) 1992-10-19 2007-10-31 High density integrated circuit apparatus, test probe and methods of use thereof

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US09/382,834 Continuation US7538565B1 (en) 1992-10-19 1999-08-25 High density integrated circuit apparatus, test probe and methods of use thereof

Publications (1)

Publication Number Publication Date
US20080106291A1 true US20080106291A1 (en) 2008-05-08

Family

ID=25507113

Family Applications (11)

Application Number Title Priority Date Filing Date
US07/963,346 Expired - Lifetime US5371654A (en) 1992-10-19 1992-10-19 Three dimensional high performance interconnection package
US08/055,485 Expired - Lifetime US5635846A (en) 1992-10-19 1993-04-30 Test probe having elongated conductor embedded in an elostomeric material which is mounted on a space transformer
US08/300,620 Expired - Lifetime US5531022A (en) 1992-10-19 1994-09-02 Method of forming a three dimensional high performance interconnection package
US08/754,869 Expired - Lifetime US5821763A (en) 1992-10-19 1996-11-22 Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof
US08/872,519 Expired - Lifetime US6334247B1 (en) 1992-10-19 1997-06-11 High density integrated circuit apparatus, test probe and methods of use thereof
US09/088,394 Expired - Lifetime US6300780B1 (en) 1992-10-19 1998-06-01 High density integrated circuit apparatus, test probe and methods of use thereof
US09/382,834 Expired - Fee Related US7538565B1 (en) 1992-10-19 1999-08-25 High density integrated circuit apparatus, test probe and methods of use thereof
US09/921,867 Abandoned US20070271781A9 (en) 1992-10-19 2001-08-03 High density integrated circuit apparatus, test probe and methods of use thereof
US11/930,654 Abandoned US20080121879A1 (en) 1992-10-19 2007-10-31 High density integrated circuit apparatus, test probe and methods of use thereof
US11/930,638 Abandoned US20080106291A1 (en) 1992-10-19 2007-10-31 High density integrated circuit apparatus, test probe and methods of use thereof
US12/357,686 Abandoned US20090128176A1 (en) 1992-10-19 2009-01-22 High density integrated circuit apparatus, test probe and methods of use thereof

Family Applications Before (9)

Application Number Title Priority Date Filing Date
US07/963,346 Expired - Lifetime US5371654A (en) 1992-10-19 1992-10-19 Three dimensional high performance interconnection package
US08/055,485 Expired - Lifetime US5635846A (en) 1992-10-19 1993-04-30 Test probe having elongated conductor embedded in an elostomeric material which is mounted on a space transformer
US08/300,620 Expired - Lifetime US5531022A (en) 1992-10-19 1994-09-02 Method of forming a three dimensional high performance interconnection package
US08/754,869 Expired - Lifetime US5821763A (en) 1992-10-19 1996-11-22 Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof
US08/872,519 Expired - Lifetime US6334247B1 (en) 1992-10-19 1997-06-11 High density integrated circuit apparatus, test probe and methods of use thereof
US09/088,394 Expired - Lifetime US6300780B1 (en) 1992-10-19 1998-06-01 High density integrated circuit apparatus, test probe and methods of use thereof
US09/382,834 Expired - Fee Related US7538565B1 (en) 1992-10-19 1999-08-25 High density integrated circuit apparatus, test probe and methods of use thereof
US09/921,867 Abandoned US20070271781A9 (en) 1992-10-19 2001-08-03 High density integrated circuit apparatus, test probe and methods of use thereof
US11/930,654 Abandoned US20080121879A1 (en) 1992-10-19 2007-10-31 High density integrated circuit apparatus, test probe and methods of use thereof

Family Applications After (1)

Application Number Title Priority Date Filing Date
US12/357,686 Abandoned US20090128176A1 (en) 1992-10-19 2009-01-22 High density integrated circuit apparatus, test probe and methods of use thereof

Country Status (4)

Country Link
US (11) US5371654A (en)
EP (1) EP0593966B1 (en)
JP (1) JP2514305B2 (en)
DE (1) DE69322832T2 (en)

Cited By (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8372741B1 (en) * 2012-02-24 2013-02-12 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
CN103091622A (en) * 2013-01-18 2013-05-08 宁波三星电气股份有限公司 Final circular test (FCT) multi-station test device
US8482111B2 (en) 2010-07-19 2013-07-09 Tessera, Inc. Stackable molded microelectronic packages
US8525314B2 (en) 2004-11-03 2013-09-03 Tessera, Inc. Stacked packaging improvements
US8618659B2 (en) 2011-05-03 2013-12-31 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US8623706B2 (en) 2010-11-15 2014-01-07 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US8728865B2 (en) 2005-12-23 2014-05-20 Tessera, Inc. Microelectronic packages and methods therefor
US8835228B2 (en) 2012-05-22 2014-09-16 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US8836136B2 (en) 2011-10-17 2014-09-16 Invensas Corporation Package-on-package assembly with wire bond vias
US8878353B2 (en) 2012-12-20 2014-11-04 Invensas Corporation Structure for microelectronic packaging with bond elements to encapsulation surface
US8883563B1 (en) 2013-07-15 2014-11-11 Invensas Corporation Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation
US8975738B2 (en) 2012-11-12 2015-03-10 Invensas Corporation Structure for microelectronic packaging with terminals on dielectric mass
US9023691B2 (en) 2013-07-15 2015-05-05 Invensas Corporation Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation
US9034696B2 (en) 2013-07-15 2015-05-19 Invensas Corporation Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation
US9082753B2 (en) 2013-11-12 2015-07-14 Invensas Corporation Severing bond wire by kinking and twisting
US9087815B2 (en) 2013-11-12 2015-07-21 Invensas Corporation Off substrate kinking of bond wire
US9214454B2 (en) 2014-03-31 2015-12-15 Invensas Corporation Batch process fabrication of package-on-package microelectronic assemblies
US9224717B2 (en) 2011-05-03 2015-12-29 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9324681B2 (en) 2010-12-13 2016-04-26 Tessera, Inc. Pin attachment
US9349706B2 (en) 2012-02-24 2016-05-24 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US9391008B2 (en) 2012-07-31 2016-07-12 Invensas Corporation Reconstituted wafer-level package DRAM
US9412714B2 (en) 2014-05-30 2016-08-09 Invensas Corporation Wire bond support structure and microelectronic package including wire bonds therefrom
US9502390B2 (en) 2012-08-03 2016-11-22 Invensas Corporation BVA interposer
US9530749B2 (en) 2015-04-28 2016-12-27 Invensas Corporation Coupling of side surface contacts to a circuit platform
US9553076B2 (en) 2010-07-19 2017-01-24 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
US9583411B2 (en) 2014-01-17 2017-02-28 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US9601454B2 (en) 2013-02-01 2017-03-21 Invensas Corporation Method of forming a component having wire bonds and a stiffening layer
US9646917B2 (en) 2014-05-29 2017-05-09 Invensas Corporation Low CTE component with wire bond interconnects
US9659848B1 (en) 2015-11-18 2017-05-23 Invensas Corporation Stiffened wires for offset BVA
US9685365B2 (en) 2013-08-08 2017-06-20 Invensas Corporation Method of forming a wire bond having a free end
US9728527B2 (en) 2013-11-22 2017-08-08 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9735084B2 (en) 2014-12-11 2017-08-15 Invensas Corporation Bond via array for thermal conductivity
US9761554B2 (en) 2015-05-07 2017-09-12 Invensas Corporation Ball bonding metal wire bond wires to metal pads
US9812402B2 (en) 2015-10-12 2017-11-07 Invensas Corporation Wire bond wires for interference shielding
US9842745B2 (en) 2012-02-17 2017-12-12 Invensas Corporation Heat spreading substrate with embedded interconnects
US9852969B2 (en) 2013-11-22 2017-12-26 Invensas Corporation Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
US9888579B2 (en) 2015-03-05 2018-02-06 Invensas Corporation Pressing of wire bond wire tips to provide bent-over tips
US9911718B2 (en) 2015-11-17 2018-03-06 Invensas Corporation ‘RDL-First’ packaged microelectronic device for a package-on-package device
US9935075B2 (en) 2016-07-29 2018-04-03 Invensas Corporation Wire bonding method and apparatus for electromagnetic interference shielding
US9984992B2 (en) 2015-12-30 2018-05-29 Invensas Corporation Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
US10008477B2 (en) 2013-09-16 2018-06-26 Invensas Corporation Microelectronic element with bond elements to encapsulation surface
US10008469B2 (en) 2015-04-30 2018-06-26 Invensas Corporation Wafer-level packaging using wire bond wires in place of a redistribution layer
US10026717B2 (en) 2013-11-22 2018-07-17 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US10120020B2 (en) 2016-06-16 2018-11-06 Formfactor Beaverton, Inc. Probe head assemblies and probe systems for testing integrated circuit devices
US10181457B2 (en) 2015-10-26 2019-01-15 Invensas Corporation Microelectronic package for wafer-level chip scale packaging with fan-out
US10299368B2 (en) 2016-12-21 2019-05-21 Invensas Corporation Surface integrated waveguides and circuit structures therefor
US10332854B2 (en) 2015-10-23 2019-06-25 Invensas Corporation Anchoring structure of fine pitch bva
US10381326B2 (en) 2014-05-28 2019-08-13 Invensas Corporation Structure and method for integrated circuits packaging with increased density
US10460958B2 (en) 2013-08-07 2019-10-29 Invensas Corporation Method of manufacturing embedded packaging with preformed vias
US10490528B2 (en) 2015-10-12 2019-11-26 Invensas Corporation Embedded wire bond wires

Families Citing this family (386)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5917707A (en) 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US6330164B1 (en) * 1985-10-18 2001-12-11 Formfactor, Inc. Interconnect assemblies and methods including ancillary electronic component connected in immediate proximity of semiconductor device
US5476211A (en) 1993-11-16 1995-12-19 Form Factor, Inc. Method of manufacturing electrical contacts, using a sacrificial member
JP2767670B2 (en) * 1992-09-03 1998-06-18 株式会社村田製作所 Electronic component chip holder and electronic component chip electrode forming method using the same
US20050062492A1 (en) * 2001-08-03 2005-03-24 Beaman Brian Samuel High density integrated circuit apparatus, test probe and methods of use thereof
US6295729B1 (en) * 1992-10-19 2001-10-02 International Business Machines Corporation Angled flying lead wire bonding process
US5371654A (en) * 1992-10-19 1994-12-06 International Business Machines Corporation Three dimensional high performance interconnection package
JPH0828580B2 (en) * 1993-04-21 1996-03-21 日本電気株式会社 Wiring board structure and manufacturing method thereof
US5810607A (en) * 1995-09-13 1998-09-22 International Business Machines Corporation Interconnector with contact pads having enhanced durability
US7368924B2 (en) * 1993-04-30 2008-05-06 International Business Machines Corporation Probe structure having a plurality of discrete insulated probe tips projecting from a support surface, apparatus for use thereof and methods of fabrication thereof
US20030048108A1 (en) * 1993-04-30 2003-03-13 Beaman Brian Samuel Structural design and processes to control probe position accuracy in a wafer test probe assembly
US6741085B1 (en) 1993-11-16 2004-05-25 Formfactor, Inc. Contact carriers (tiles) for populating larger substrates with spring contacts
US6624648B2 (en) 1993-11-16 2003-09-23 Formfactor, Inc. Probe card assembly
US20020053734A1 (en) 1993-11-16 2002-05-09 Formfactor, Inc. Probe card assembly and kit, and methods of making same
US20070228110A1 (en) * 1993-11-16 2007-10-04 Formfactor, Inc. Method Of Wirebonding That Utilizes A Gas Flow Within A Capillary From Which A Wire Is Played Out
US5772451A (en) 1993-11-16 1998-06-30 Form Factor, Inc. Sockets for electronic components and methods of connecting to electronic components
US6525555B1 (en) 1993-11-16 2003-02-25 Formfactor, Inc. Wafer-level burn-in and test
US7073254B2 (en) * 1993-11-16 2006-07-11 Formfactor, Inc. Method for mounting a plurality of spring contact elements
US6246247B1 (en) 1994-11-15 2001-06-12 Formfactor, Inc. Probe card assembly and kit, and methods of using same
US7064566B2 (en) * 1993-11-16 2006-06-20 Formfactor, Inc. Probe card assembly and kit
US6336269B1 (en) 1993-11-16 2002-01-08 Benjamin N. Eldridge Method of fabricating an interconnection element
US6835898B2 (en) 1993-11-16 2004-12-28 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
US5455390A (en) * 1994-02-01 1995-10-03 Tessera, Inc. Microelectronics unit mounting with multiple lead bonding
US5706174A (en) * 1994-07-07 1998-01-06 Tessera, Inc. Compliant microelectrionic mounting device
US5579207A (en) * 1994-10-20 1996-11-26 Hughes Electronics Three-dimensional integrated circuit stacking
EP0792517B1 (en) * 1994-11-15 2003-10-22 Formfactor, Inc. Electrical contact structures from flexible wire
US6727579B1 (en) 1994-11-16 2004-04-27 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
US5495394A (en) * 1994-12-19 1996-02-27 At&T Global Information Solutions Company Three dimensional die packaging in multi-chip modules
MY112945A (en) * 1994-12-20 2001-10-31 Ibm Electronic devices comprising dielectric foamed polymers
EP0722198A3 (en) * 1995-01-10 1996-10-23 Texas Instruments Inc Bonding wire with integral connection
US6232789B1 (en) * 1997-05-28 2001-05-15 Cascade Microtech, Inc. Probe holder for low current measurements
US7276919B1 (en) * 1995-04-20 2007-10-02 International Business Machines Corporation High density integral test probe
US6033935A (en) * 1997-06-30 2000-03-07 Formfactor, Inc. Sockets for "springed" semiconductor devices
US20100065963A1 (en) 1995-05-26 2010-03-18 Formfactor, Inc. Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out
AU6377796A (en) * 1995-05-26 1996-12-11 Formfactor, Inc. Fabricating interconnects and tips using sacrificial substra tes
US6483328B1 (en) * 1995-11-09 2002-11-19 Formfactor, Inc. Probe card for probing wafers with raised contact elements
US5785538A (en) * 1995-11-27 1998-07-28 International Business Machines Corporation High density test probe with rigid surface structure
US5729150A (en) 1995-12-01 1998-03-17 Cascade Microtech, Inc. Low-current probe card with reduced triboelectric current generating cables
US8033838B2 (en) 1996-02-21 2011-10-11 Formfactor, Inc. Microelectronic contact structure
US5726211A (en) * 1996-03-21 1998-03-10 International Business Machines Corporation Process for making a foamed elastometric polymer
US5804607A (en) * 1996-03-21 1998-09-08 International Business Machines Corporation Process for making a foamed elastomeric polymer
US6000126A (en) * 1996-03-29 1999-12-14 General Dynamics Information Systems, Inc. Method and apparatus for connecting area grid arrays to printed wire board
US5700844A (en) * 1996-04-09 1997-12-23 International Business Machines Corporation Process for making a foamed polymer
US6403226B1 (en) 1996-05-17 2002-06-11 3M Innovative Properties Company Electronic assemblies with elastomeric members made from cured, room temperature curable silicone compositions having improved stress relaxation resistance
US5890915A (en) * 1996-05-17 1999-04-06 Minnesota Mining And Manufacturing Company Electrical and thermal conducting structure with resilient conducting paths
US5709336A (en) * 1996-05-31 1998-01-20 International Business Machines Corporation Method of forming a solderless electrical connection with a wirebond chip
US5914613A (en) 1996-08-08 1999-06-22 Cascade Microtech, Inc. Membrane probing system with local contact scrub
JPH1062489A (en) * 1996-08-23 1998-03-06 Ando Electric Co Ltd Test head for ic tester
US5757201A (en) * 1996-09-11 1998-05-26 Micron Electronics, Inc. Universal testing device for electronic modules with different configurations and operating parameters
US7282945B1 (en) * 1996-09-13 2007-10-16 International Business Machines Corporation Wafer scale high density probe assembly, apparatus for use thereof and methods of fabrication thereof
WO1998011446A1 (en) 1996-09-13 1998-03-19 International Business Machines Corporation Integrated compliant probe for wafer level test and burn-in
JP3206922B2 (en) * 1996-09-13 2001-09-10 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Wafer-scale high-density probe assembly, apparatus using the same, and manufacturing method
JP2000502810A (en) 1996-09-13 2000-03-07 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Probe structure having a plurality of individual insulated probe tips protruding from a support surface, apparatus and method for using the same
US6133072A (en) * 1996-12-13 2000-10-17 Tessera, Inc. Microelectronic connector with planar elastomer sockets
US5929646A (en) * 1996-12-13 1999-07-27 International Business Machines Corporation Interposer and module test card assembly
SE511425C2 (en) * 1996-12-19 1999-09-27 Ericsson Telefon Ab L M Packing device for integrated circuits
US6690185B1 (en) * 1997-01-15 2004-02-10 Formfactor, Inc. Large contactor with multiple, aligned contactor units
WO1998044564A1 (en) 1997-04-02 1998-10-08 Tessera, Inc. Chip with internal signal routing in external element
US5976964A (en) * 1997-04-22 1999-11-02 Micron Technology, Inc. Method of improving interconnect of semiconductor device by utilizing a flattened ball bond
US6525551B1 (en) * 1997-05-22 2003-02-25 International Business Machines Corporation Probe structures for testing electrical interconnections to integrated circuit electronic devices
US6034533A (en) 1997-06-10 2000-03-07 Tervo; Paul A. Low-current pogo probe card
FR2764721B1 (en) * 1997-06-13 1999-07-09 Bull Cp8 DEVICE FOR COMMUNICATING WITH A PORTABLE DATA MEDIUM
US5977642A (en) 1997-08-25 1999-11-02 International Business Machines Corporation Dendrite interconnect for planarization and method for producing same
US6300575B1 (en) * 1997-08-25 2001-10-09 International Business Machines Corporation Conductor interconnect with dendrites through film
US6040700A (en) * 1997-09-15 2000-03-21 Credence Systems Corporation Semiconductor tester system including test head supported by wafer prober frame
EP0922960A1 (en) * 1997-12-12 1999-06-16 Padar Tecnologie di Riccioni Roberto S.a.s. Microcircuit testing device
JP2004506309A (en) * 1997-12-31 2004-02-26 エルパック(ユーエスエー)、インコーポレイテッド Molded electronic package, manufacturing method and shielding method
US6160714A (en) * 1997-12-31 2000-12-12 Elpac (Usa), Inc. Molded electronic package and method of preparation
US6097199A (en) * 1998-01-22 2000-08-01 Lsi Logic Corporation Universal decoder test board
US6211463B1 (en) * 1998-01-26 2001-04-03 Saint-Gobain Industrial Ceramics, Inc. Electronic circuit package with diamond film heat conductor
US6016005A (en) 1998-02-09 2000-01-18 Cellarosi; Mario J. Multilayer, high density micro circuit module and method of manufacturing same
US6600215B1 (en) 1998-04-02 2003-07-29 Micron Technology, Inc. Method and apparatus for coupling a semiconductor die to die terminals
US5971771A (en) * 1998-04-03 1999-10-26 Faragi; Eric Joseph Component to substrate connection and display assembly using same
US6720501B1 (en) 1998-04-14 2004-04-13 Formfactor, Inc. PC board having clustered blind vias
US6078500A (en) * 1998-05-12 2000-06-20 International Business Machines Inc. Pluggable chip scale package
US6107119A (en) * 1998-07-06 2000-08-22 Micron Technology, Inc. Method for fabricating semiconductor components
US6664628B2 (en) 1998-07-13 2003-12-16 Formfactor, Inc. Electronic component overlapping dice of unsingulated semiconductor wafer
US6256882B1 (en) 1998-07-14 2001-07-10 Cascade Microtech, Inc. Membrane probing system
US6259260B1 (en) * 1998-07-30 2001-07-10 Intest Ip Corporation Apparatus for coupling a test head and probe card in a wafer testing system
EP1105942B1 (en) 1998-08-17 2002-06-05 Infineon Technologies AG Contact device mainly intended for contact between electric components and circuit supports and method for producing said device
US6169331B1 (en) 1998-08-28 2001-01-02 Micron Technology, Inc. Apparatus for electrically coupling bond pads of a microelectronic device
US6586835B1 (en) * 1998-08-31 2003-07-01 Micron Technology, Inc. Compact system module with built-in thermoelectric cooling
US6239980B1 (en) * 1998-08-31 2001-05-29 General Electric Company Multimodule interconnect structure and process
US6618267B1 (en) * 1998-09-22 2003-09-09 International Business Machines Corporation Multi-level electronic package and method for making same
US6295220B1 (en) 1998-11-03 2001-09-25 Zomaya Group, Inc. Memory bar and related circuits and methods
US6190425B1 (en) 1998-11-03 2001-02-20 Zomaya Group, Inc. Memory bar and related circuits and methods
US6160412A (en) * 1998-11-05 2000-12-12 Wentworth Laboratories, Inc. Impedance-matched interconnection device for connecting a vertical-pin integrated circuit probing device to integrated circuit test equipment
US6854985B1 (en) * 1998-12-16 2005-02-15 Paricon Technologies Corporation Elastomeric interconnection device and methods for making same
US6185107B1 (en) * 1998-12-23 2001-02-06 Raytheon Company MEMS based tile assemblies and methods of fabrication
US6293804B2 (en) * 1999-02-08 2001-09-25 Ericsson Inc. Self-aligning LCD connector assembly
US6419500B1 (en) 1999-03-08 2002-07-16 Kulicke & Soffa Investment, Inc. Probe assembly having floatable buckling beam probes and apparatus for abrading the same
DE19912240A1 (en) * 1999-03-18 2000-09-28 Siemens Ag Component and method for producing the component
US6174175B1 (en) * 1999-04-29 2001-01-16 International Business Machines Corporation High density Z-axis connector
US6376769B1 (en) 1999-05-18 2002-04-23 Amerasia International Technology, Inc. High-density electronic package, and method for making same
US6812718B1 (en) * 1999-05-27 2004-11-02 Nanonexus, Inc. Massively parallel interface for electronic circuits
US6799976B1 (en) 1999-07-28 2004-10-05 Nanonexus, Inc. Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
US7382142B2 (en) 2000-05-23 2008-06-03 Nanonexus, Inc. High density interconnect system having rapid fabrication cycle
US7247035B2 (en) 2000-06-20 2007-07-24 Nanonexus, Inc. Enhanced stress metal spring contactor
WO2000074110A2 (en) * 1999-05-27 2000-12-07 Nanonexus, Inc. Integrated circuit wafer probe card assembly
JP4041619B2 (en) * 1999-05-28 2008-01-30 東京エレクトロン株式会社 Interconnector manufacturing method
US6717819B1 (en) * 1999-06-01 2004-04-06 Amerasia International Technology, Inc. Solderable flexible adhesive interposer as for an electronic package, and method for making same
US6578264B1 (en) 1999-06-04 2003-06-17 Cascade Microtech, Inc. Method for constructing a membrane probe using a depression
US7215131B1 (en) 1999-06-07 2007-05-08 Formfactor, Inc. Segmented contactor
US6544880B1 (en) 1999-06-14 2003-04-08 Micron Technology, Inc. Method of improving copper interconnects of semiconductor devices for bonding
US6617681B1 (en) * 1999-06-28 2003-09-09 Intel Corporation Interposer and method of making same
US6434726B1 (en) 1999-06-29 2002-08-13 Lucent Technologies Inc. System and method of transmission using coplanar bond wires
US6939474B2 (en) * 1999-07-30 2005-09-06 Formfactor, Inc. Method for forming microelectronic spring structures on a substrate
US6888362B2 (en) * 2000-11-09 2005-05-03 Formfactor, Inc. Test head assembly for electronic components with plurality of contoured microelectronic spring contacts
US6780001B2 (en) * 1999-07-30 2004-08-24 Formfactor, Inc. Forming tool for forming a contoured microelectronic spring mold
US7189077B1 (en) 1999-07-30 2007-03-13 Formfactor, Inc. Lithographic type microelectronic spring structures with improved contours
US6468098B1 (en) * 1999-08-17 2002-10-22 Formfactor, Inc. Electrical contactor especially wafer level contactor using fluid pressure
JP2001091540A (en) * 1999-09-27 2001-04-06 Hitachi Ltd Probe structure
US6441476B1 (en) 2000-10-18 2002-08-27 Seiko Epson Corporation Flexible tape carrier with external terminals formed on interposers
JP2001116791A (en) * 1999-10-20 2001-04-27 Fujitsu Ltd Electronic component tester and electric connector
US6759858B2 (en) * 1999-10-20 2004-07-06 Intel Corporation Integrated circuit test probe having ridge contact
JP3721893B2 (en) 1999-10-20 2005-11-30 セイコーエプソン株式会社 Semiconductor devices and electronic devices
US6437587B1 (en) * 1999-11-04 2002-08-20 Agilent Technologies, Inc. ICT test fixture for fine pitch testing
US6392428B1 (en) * 1999-11-16 2002-05-21 Eaglestone Partners I, Llc Wafer level interposer
JP3681155B2 (en) * 1999-12-22 2005-08-10 新光電気工業株式会社 Electronic component mounting structure, electronic component device, electronic component mounting method, and electronic component device manufacturing method
US6848942B1 (en) 2000-01-12 2005-02-01 Molex Incorporated Connectors having supportive barrier components
US6838890B2 (en) 2000-02-25 2005-01-04 Cascade Microtech, Inc. Membrane probing system
US6580031B2 (en) 2000-03-14 2003-06-17 Amerasia International Technology, Inc. Method for making a flexible circuit interposer having high-aspect ratio conductors
US7262611B2 (en) * 2000-03-17 2007-08-28 Formfactor, Inc. Apparatuses and methods for planarizing a semiconductor contactor
JP3515479B2 (en) * 2000-04-05 2004-04-05 北川工業株式会社 Conductive member and method of manufacturing the same
TW518733B (en) * 2000-04-08 2003-01-21 Advanced Semiconductor Eng Attaching method of heat sink for chip package
US6426638B1 (en) * 2000-05-02 2002-07-30 Decision Track Llc Compliant probe apparatus
US6734688B1 (en) 2000-05-15 2004-05-11 Teradyne, Inc. Low compliance tester interface
US7952373B2 (en) 2000-05-23 2011-05-31 Verigy (Singapore) Pte. Ltd. Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
US6774315B1 (en) * 2000-05-24 2004-08-10 International Business Machines Corporation Floating interposer
US6467138B1 (en) * 2000-05-24 2002-10-22 Vermon Integrated connector backings for matrix array transducers, matrix array transducers employing such backings and methods of making the same
US6420887B1 (en) * 2000-06-13 2002-07-16 Kulicke & Soffa Investment, Inc. Modulated space transformer for high density buckling beam probe and method for making the same
US6459039B1 (en) 2000-06-19 2002-10-01 International Business Machines Corporation Method and apparatus to manufacture an electronic package with direct wiring pattern
US6332782B1 (en) 2000-06-19 2001-12-25 International Business Machines Corporation Spatial transformation interposer for electronic packaging
US7104804B2 (en) * 2000-07-03 2006-09-12 Advanced Interconnect Solutions Method and apparatus for memory module circuit interconnection
US20020064931A1 (en) * 2000-07-03 2002-05-30 E. C. Ong Method and apparatus for applying a protective over-coating to a ball-grid-array (BGA) structure
US6812048B1 (en) 2000-07-31 2004-11-02 Eaglestone Partners I, Llc Method for manufacturing a wafer-interposer assembly
US6537831B1 (en) * 2000-07-31 2003-03-25 Eaglestone Partners I, Llc Method for selecting components for a matched set using a multi wafer interposer
US6515499B1 (en) * 2000-09-28 2003-02-04 Teradyne, Inc. Modular semiconductor tester interface assembly for high performance coaxial connections
US6815712B1 (en) 2000-10-02 2004-11-09 Eaglestone Partners I, Llc Method for selecting components for a matched set from a wafer-interposer assembly
US6527563B2 (en) * 2000-10-04 2003-03-04 Gary A. Clayton Grid interposer
US6686657B1 (en) 2000-11-07 2004-02-03 Eaglestone Partners I, Llc Interposer for improved handling of semiconductor wafers and method of use of same
DE10143173A1 (en) 2000-12-04 2002-06-06 Cascade Microtech Inc Wafer probe has contact finger array with impedance matching network suitable for wide band
US6529022B2 (en) 2000-12-15 2003-03-04 Eaglestone Pareners I, Llc Wafer testing interposer for a conventional package
US20020076854A1 (en) * 2000-12-15 2002-06-20 Pierce John L. System, method and apparatus for constructing a semiconductor wafer-interposer using B-Stage laminates
US20020078401A1 (en) * 2000-12-15 2002-06-20 Fry Michael Andrew Test coverage analysis system
US6524885B2 (en) * 2000-12-15 2003-02-25 Eaglestone Partners I, Llc Method, apparatus and system for building an interposer onto a semiconductor wafer using laser techniques
US6515373B2 (en) * 2000-12-28 2003-02-04 Infineon Technologies Ag Cu-pad/bonded/Cu-wire with self-passivating Cu-alloys
JP2002231399A (en) * 2001-02-02 2002-08-16 Fujitsu Ltd Semiconductor device testing contact and manufacturing method therefor
US6673653B2 (en) * 2001-02-23 2004-01-06 Eaglestone Partners I, Llc Wafer-interposer using a ceramic substrate
US6552528B2 (en) * 2001-03-15 2003-04-22 Advantest Corporation Modular interface between a device under test and a test head
US7396236B2 (en) 2001-03-16 2008-07-08 Formfactor, Inc. Wafer level interposer
US6910268B2 (en) 2001-03-27 2005-06-28 Formfactor, Inc. Method for fabricating an IC interconnect system including an in-street integrated circuit wafer via
US6856150B2 (en) 2001-04-10 2005-02-15 Formfactor, Inc. Probe card with coplanar daughter card
US6627980B2 (en) 2001-04-12 2003-09-30 Formfactor, Inc. Stacked semiconductor device assembly with microelectronic spring contacts
US6595784B2 (en) 2001-05-15 2003-07-22 International Business Machines Corporation Interposer member having apertures for relieving stress and increasing contact compliancy
JP4667652B2 (en) * 2001-06-12 2011-04-13 ローム株式会社 Battery pack and manufacturing method thereof
US6784376B1 (en) * 2001-08-16 2004-08-31 Amkor Technology, Inc. Solderable injection-molded integrated circuit substrate and method therefor
US6930256B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
US7334326B1 (en) 2001-06-19 2008-02-26 Amkor Technology, Inc. Method for making an integrated circuit substrate having embedded passive components
WO2003007003A1 (en) * 2001-07-11 2003-01-23 Formfactor, Inc. Method of manufacturing a probe card
US6729019B2 (en) * 2001-07-11 2004-05-04 Formfactor, Inc. Method of manufacturing a probe card
US6627984B2 (en) * 2001-07-24 2003-09-30 Dense-Pac Microsystems, Inc. Chip stack with differing chip package types
WO2003052435A1 (en) 2001-08-21 2003-06-26 Cascade Microtech, Inc. Membrane probing system
US6784656B2 (en) * 2001-08-30 2004-08-31 Teradyne, Inc. Hybrid conductor-board for multi-conductor routing
US6821625B2 (en) * 2001-09-27 2004-11-23 International Business Machines Corporation Thermal spreader using thermal conduits
US6908320B2 (en) * 2001-11-13 2005-06-21 International Business Machines Corporation Connector assembly for attaching perpendicularly to an adapter card
CN1615444A (en) * 2001-12-14 2005-05-11 因泰斯特Ip公司 Flexible test head interface
US6590278B1 (en) * 2002-01-08 2003-07-08 International Business Machines Corporation Electronic package
US20030150640A1 (en) * 2002-02-14 2003-08-14 Crippen Warren Stuart Silicon space transformer and method of manufacturing same
US7249954B2 (en) 2002-02-26 2007-07-31 Paricon Technologies Corporation Separable electrical interconnect with anisotropic conductive elastomer for translating footprint
US7021946B2 (en) * 2002-04-19 2006-04-04 Citizens Electronics Co., Ltd. Connector integrated with a LED element
US7633765B1 (en) 2004-03-23 2009-12-15 Amkor Technology, Inc. Semiconductor package including a top-surface metal layer for implementing circuit features
US7399661B2 (en) 2002-05-01 2008-07-15 Amkor Technology, Inc. Method for making an integrated circuit substrate having embedded back-side access conductors and vias
US7548430B1 (en) 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
US7670962B2 (en) 2002-05-01 2010-03-02 Amkor Technology, Inc. Substrate having stiffener fabrication method
US9691635B1 (en) 2002-05-01 2017-06-27 Amkor Technology, Inc. Buildup dielectric layer having metallization pattern semiconductor package fabrication method
US6930257B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laminated laser-embedded circuit layers
KR100864916B1 (en) * 2002-05-23 2008-10-22 캐스케이드 마이크로테크 인코포레이티드 Probe for testing a device under test
US7412639B2 (en) * 2002-05-24 2008-08-12 Verigy (Singapore) Pte. Ltd. System and method for testing circuitry on a wafer
US6813804B2 (en) * 2002-06-06 2004-11-09 Samsung Electronics Co., Ltd. Apparatus and method for cleaning probe card contacts
US6974330B2 (en) * 2002-08-08 2005-12-13 Micron Technology, Inc. Electronic devices incorporating electrical interconnections with improved reliability and methods of fabricating same
US6846735B1 (en) 2002-09-05 2005-01-25 Bridge Semiconductor Corporation Compliant test probe with jagged contact surface
DE10242646A1 (en) * 2002-09-13 2004-03-25 Magcode Ag Electrical connection device between current or data source device and current or data reception device, uses elastically mounted contact elements acted on by pressure bridge
US6877992B2 (en) * 2002-11-01 2005-04-12 Airborn, Inc. Area array connector having stacked contacts for improved current carrying capacity
US6724205B1 (en) * 2002-11-13 2004-04-20 Cascade Microtech, Inc. Probe for combined signals
US7122760B2 (en) * 2002-11-25 2006-10-17 Formfactor, Inc. Using electric discharge machining to manufacture probes
US6945827B2 (en) * 2002-12-23 2005-09-20 Formfactor, Inc. Microelectronic contact structure
JP2004206914A (en) * 2002-12-24 2004-07-22 Hitachi Ltd Land grid array connector and connected structure
US6839965B2 (en) * 2003-02-06 2005-01-11 R-Tec Corporation Method of manufacturing a resistor connector
US20040160742A1 (en) * 2003-02-14 2004-08-19 Weiss Roger E. Three-dimensional electrical device packaging employing low profile elastomeric interconnection
US7057404B2 (en) 2003-05-23 2006-06-06 Sharp Laboratories Of America, Inc. Shielded probe for testing a device under test
US20040249825A1 (en) * 2003-06-05 2004-12-09 International Business Machines Corporation Administering devices with dynamic action lists
JP2005010052A (en) * 2003-06-19 2005-01-13 Japan Electronic Materials Corp Probe card
US6967556B2 (en) * 2003-06-30 2005-11-22 International Business Machines Corporation High power space transformer
WO2005013427A1 (en) * 2003-07-02 2005-02-10 Paricon Technologies Corporation Pin-array, separable, compliant electrical contact member
JP2005061851A (en) * 2003-08-12 2005-03-10 Japan Electronic Materials Corp Substrate for probe card
US6859054B1 (en) * 2003-08-13 2005-02-22 Advantest Corp. Probe contact system using flexible printed circuit board
WO2005018001A1 (en) * 2003-08-18 2005-02-24 Sanken Electric Co., Ltd. Semiconductor device
WO2005029584A1 (en) * 2003-09-22 2005-03-31 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit
GB2406722A (en) * 2003-10-02 2005-04-06 Agilent Technologies Inc High frequency electrical module
US6814589B1 (en) 2003-10-22 2004-11-09 International Business Machines Corporation Electrical connector with elastomeric element and restrainer member to offset relaxation of the elastomer
JP2005150263A (en) * 2003-11-13 2005-06-09 Nitto Denko Corp Double-sided wiring circuit board
JP2007517231A (en) * 2003-12-24 2007-06-28 カスケード マイクロテック インコーポレイテッド Active wafer probe
KR20050065038A (en) * 2003-12-24 2005-06-29 삼성전기주식회사 Printed circuit board and package having oblique via
US6832917B1 (en) 2004-01-16 2004-12-21 Intercon Systems, Inc. Interposer assembly
US6945791B2 (en) * 2004-02-10 2005-09-20 International Business Machines Corporation Integrated circuit redistribution package
US7504038B2 (en) * 2004-02-26 2009-03-17 Hitachi Global Storage Technologies Netherlands B.V. System, method, and apparatus for mechanically releasable slider processing including lapping, air bearing patterning, and debonding
US20050190810A1 (en) * 2004-02-27 2005-09-01 Stuart Butterworth Contact-bonded optically pumped semiconductor laser structure
US7282932B2 (en) 2004-03-02 2007-10-16 Micron Technology, Inc. Compliant contact pin assembly, card system and methods thereof
JP2005259475A (en) * 2004-03-10 2005-09-22 Jst Mfg Co Ltd Anisotropic conductive sheet
US10811277B2 (en) 2004-03-23 2020-10-20 Amkor Technology, Inc. Encapsulated semiconductor package
US11081370B2 (en) 2004-03-23 2021-08-03 Amkor Technology Singapore Holding Pte. Ltd. Methods of manufacturing an encapsulated semiconductor device
JP4509835B2 (en) * 2004-03-29 2010-07-21 パナソニック株式会社 Cell, package device, and method for manufacturing package device
US7145238B1 (en) 2004-05-05 2006-12-05 Amkor Technology, Inc. Semiconductor package and substrate having multi-level vias
USRE43503E1 (en) 2006-06-29 2012-07-10 Microprobe, Inc. Probe skates for electrical testing of convex pad topologies
US9097740B2 (en) * 2004-05-21 2015-08-04 Formfactor, Inc. Layered probes with core
US7759949B2 (en) 2004-05-21 2010-07-20 Microprobe, Inc. Probes with self-cleaning blunt skates for contacting conductive pads
US8988091B2 (en) 2004-05-21 2015-03-24 Microprobe, Inc. Multiple contact probes
US9476911B2 (en) 2004-05-21 2016-10-25 Microprobe, Inc. Probes with high current carrying capability and laser machining methods
US7659739B2 (en) * 2006-09-14 2010-02-09 Micro Porbe, Inc. Knee probe having reduced thickness section for control of scrub motion
US7733101B2 (en) * 2004-05-21 2010-06-08 Microprobe, Inc. Knee probe having increased scrub motion
DE102004027788A1 (en) * 2004-06-08 2006-01-05 Infineon Technologies Ag Semiconductor base component for semiconductor component pile, has boundary regions of substrate surrounding chip, with elastic contact unit which is electrically connected with regions of distribution plate
US7180315B2 (en) * 2004-06-28 2007-02-20 Sv Probe, Ltd. Substrate with patterned conductive layer
JP4980903B2 (en) * 2004-07-07 2012-07-18 カスケード マイクロテック インコーポレイテッド Probe head with membrane suspension probe
KR20070083499A (en) * 2004-07-21 2007-08-24 에스브이 프로브 피티이 엘티디 Reinforced probes for testing semiconductor devices
US20090174423A1 (en) * 2004-07-21 2009-07-09 Klaerner Peter J Bond Reinforcement Layer for Probe Test Cards
US7105918B2 (en) * 2004-07-29 2006-09-12 Micron Technology, Inc. Interposer with flexible solder pad elements and methods of manufacturing the same
US7262368B2 (en) 2004-08-13 2007-08-28 Tessera, Inc. Connection structures for microelectronic devices and methods for forming such structures
US7083425B2 (en) * 2004-08-27 2006-08-01 Micron Technology, Inc. Slanted vias for electrical circuits on circuit boards and other substrates
US7172431B2 (en) * 2004-08-27 2007-02-06 International Business Machines Corporation Electrical connector design and contact geometry and method of use thereof and methods of fabrication thereof
JP2008512680A (en) 2004-09-13 2008-04-24 カスケード マイクロテック インコーポレイテッド Double-sided probing structure
EP2014406A3 (en) 2004-11-02 2010-06-02 HID Global GmbH Relocation device, contacting device, delivery system, relocation and contacting unit production facility and a transponder unit
JP4948417B2 (en) * 2004-11-02 2012-06-06 カスケード マイクロテック インコーポレイテッド Optically enhanced digital imaging system
US6991473B1 (en) 2004-11-30 2006-01-31 International Business Machines Corporation Electrical connector with elastomeric pad having compressor fingers each including a filler member to mitigate relaxation of the elastomer
KR100706228B1 (en) * 2004-12-07 2007-04-11 삼성전자주식회사 Apparatus and method for testing electrical characterization of semiconductor workpiece
WO2006137896A2 (en) 2004-12-16 2006-12-28 International Business Machines Corporation Metalized elastomeric probe structure
US7771208B2 (en) 2004-12-16 2010-08-10 International Business Machines Corporation Metalized elastomeric electrical contacts
US7404513B2 (en) * 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls
US7535247B2 (en) * 2005-01-31 2009-05-19 Cascade Microtech, Inc. Interface for testing semiconductors
US7656172B2 (en) 2005-01-31 2010-02-02 Cascade Microtech, Inc. System for testing semiconductors
US20070187844A1 (en) 2006-02-10 2007-08-16 Wintec Industries, Inc. Electronic assembly with detachable components
US7928591B2 (en) * 2005-02-11 2011-04-19 Wintec Industries, Inc. Apparatus and method for predetermined component placement to a target platform
US7271602B2 (en) * 2005-02-16 2007-09-18 Sv Probe Pte. Ltd. Probe card assembly and method of attaching probes to the probe card assembly
US8826531B1 (en) 2005-04-05 2014-09-09 Amkor Technology, Inc. Method for making an integrated circuit substrate having laminated laser-embedded circuit layers
DE102005024133B4 (en) * 2005-05-23 2007-10-31 Msc Microcomputers Systems Components Vertriebs Gmbh Elastomeric connector
US7449899B2 (en) * 2005-06-08 2008-11-11 Cascade Microtech, Inc. Probe for high frequency signals
US7262134B2 (en) * 2005-09-01 2007-08-28 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US20070075717A1 (en) * 2005-09-14 2007-04-05 Touchdown Technologies, Inc. Lateral interposer contact design and probe card assembly
US20070057685A1 (en) * 2005-09-14 2007-03-15 Touchdown Technologies, Inc. Lateral interposer contact design and probe card assembly
US7877866B1 (en) 2005-10-26 2011-02-01 Second Sight Medical Products, Inc. Flexible circuit electrode array and method of manufacturing the same
US7307348B2 (en) * 2005-12-07 2007-12-11 Micron Technology, Inc. Semiconductor components having through wire interconnects (TWI)
US7649367B2 (en) 2005-12-07 2010-01-19 Microprobe, Inc. Low profile probe having improved mechanical scrub and reduced contact inductance
US7843202B2 (en) * 2005-12-21 2010-11-30 Formfactor, Inc. Apparatus for testing devices
US20070152685A1 (en) * 2006-01-03 2007-07-05 Formfactor, Inc. A probe array structure and a method of making a probe array structure
TWI336608B (en) * 2006-01-31 2011-01-21 Sony Corp Printed circuit board assembly and method of manufacturing the same
US7312617B2 (en) 2006-03-20 2007-12-25 Microprobe, Inc. Space transformers employing wire bonds for interconnections with fine pitch contacts
US7898272B2 (en) * 2006-06-08 2011-03-01 Nhk Spring Co., Ltd. Probe card
JP2008021637A (en) * 2006-06-12 2008-01-31 Fujikura Ltd Socket, its manufacturing method, and semiconductor device
US7403028B2 (en) 2006-06-12 2008-07-22 Cascade Microtech, Inc. Test structure and probe for differential signals
US7723999B2 (en) 2006-06-12 2010-05-25 Cascade Microtech, Inc. Calibration structures for differential signal probing
US7443186B2 (en) * 2006-06-12 2008-10-28 Cascade Microtech, Inc. On-wafer test structures for differential signals
US7764072B2 (en) 2006-06-12 2010-07-27 Cascade Microtech, Inc. Differential signal probing system
US8286332B2 (en) 2006-09-26 2012-10-16 Hid Global Gmbh Method and apparatus for making a radio frequency inlay
US7971339B2 (en) 2006-09-26 2011-07-05 Hid Global Gmbh Method and apparatus for making a radio frequency inlay
US7589398B1 (en) 2006-10-04 2009-09-15 Amkor Technology, Inc. Embedded metal features structure
US7786740B2 (en) * 2006-10-11 2010-08-31 Astria Semiconductor Holdings, Inc. Probe cards employing probes having retaining portions for potting in a potting region
US8907689B2 (en) * 2006-10-11 2014-12-09 Microprobe, Inc. Probe retention arrangement
US20080106292A1 (en) * 2006-11-02 2008-05-08 Corad Technology, Inc. Probe card having cantilever probes
US7550857B1 (en) 2006-11-16 2009-06-23 Amkor Technology, Inc. Stacked redistribution layer (RDL) die assembly package
US8021931B2 (en) * 2006-12-11 2011-09-20 Stats Chippac, Inc. Direct via wire bonding and method of assembling the same
US7535239B1 (en) * 2006-12-14 2009-05-19 Xilinx, Inc. Probe card configured for interchangeable heads
US7750250B1 (en) 2006-12-22 2010-07-06 Amkor Technology, Inc. Blind via capture pad structure
US7752752B1 (en) 2007-01-09 2010-07-13 Amkor Technology, Inc. Method of fabricating an embedded circuit pattern
US7514948B2 (en) * 2007-04-10 2009-04-07 Microprobe, Inc. Vertical probe array arranged to provide space transformation
KR100882512B1 (en) * 2007-04-25 2009-02-10 윌테크놀러지(주) Probe card
US8832936B2 (en) * 2007-04-30 2014-09-16 International Business Machines Corporation Method of forming metallized elastomeric electrical contacts
JP2009010358A (en) * 2007-05-28 2009-01-15 Panasonic Corp Module with built-in electronic component and its manufacturing method
US7759951B2 (en) * 2007-05-29 2010-07-20 Touchdown Technologies, Inc. Semiconductor testing device with elastomer interposer
US7876114B2 (en) 2007-08-08 2011-01-25 Cascade Microtech, Inc. Differential waveguide probe
US8323771B1 (en) 2007-08-15 2012-12-04 Amkor Technology, Inc. Straight conductor blind via capture pad structure and fabrication method
US8536665B2 (en) * 2007-08-22 2013-09-17 The Hong Kong Polytechnic University Fabrication of piezoelectric single crystalline thin layer on silicon wafer
US8057330B2 (en) * 2007-09-14 2011-11-15 Bear Archery, Inc. Adaptors for mounting arrowheads to arrow shafts
DE602007010634D1 (en) 2007-09-18 2010-12-30 Baile Na Habhann Co Galway Method for contacting a wire conductor laid on a substrate
US7888955B2 (en) 2007-09-25 2011-02-15 Formfactor, Inc. Method and apparatus for testing devices using serially controlled resources
US7977959B2 (en) 2007-09-27 2011-07-12 Formfactor, Inc. Method and apparatus for testing devices using serially controlled intelligent switches
JP2010541275A (en) * 2007-10-08 2010-12-24 アムスト カンパニー, リミテッド Wafer test method and probe card therefor
CN101316014B (en) * 2007-10-17 2012-02-01 番禺得意精密电子工业有限公司 Electric connection device and assembly method thereof
US8723546B2 (en) * 2007-10-19 2014-05-13 Microprobe, Inc. Vertical guided layered probe
US7671610B2 (en) * 2007-10-19 2010-03-02 Microprobe, Inc. Vertical guided probe array providing sideways scrub motion
US7791361B2 (en) * 2007-12-10 2010-09-07 Touchdown Technologies, Inc. Planarizing probe card
US7755375B2 (en) * 2008-01-08 2010-07-13 Advantest Corporation Test apparatus, probe card, and test method
KR101174007B1 (en) * 2008-02-01 2012-08-16 니혼 하츠쵸 가부시키가이샤 probe unit
JP2009239261A (en) * 2008-03-07 2009-10-15 Panasonic Corp Electronic unit and electronic apparatus
US20090224793A1 (en) * 2008-03-07 2009-09-10 Formfactor, Inc. Method And Apparatus For Designing A Custom Test System
US8122309B2 (en) * 2008-03-11 2012-02-21 Formfactor, Inc. Method and apparatus for processing failures during semiconductor device testing
US8230593B2 (en) * 2008-05-29 2012-07-31 Microprobe, Inc. Probe bonding method having improved control of bonding material
US8095841B2 (en) 2008-08-19 2012-01-10 Formfactor, Inc. Method and apparatus for testing semiconductor devices with autonomous expected value generation
US7944225B2 (en) * 2008-09-26 2011-05-17 Formfactor, Inc. Method and apparatus for providing a tester integrated circuit for testing a semiconductor device under test
US7888957B2 (en) 2008-10-06 2011-02-15 Cascade Microtech, Inc. Probing apparatus with impedance optimized interface
US7982305B1 (en) * 2008-10-20 2011-07-19 Maxim Integrated Products, Inc. Integrated circuit package including a three-dimensional fan-out / fan-in signal routing
WO2010059247A2 (en) 2008-11-21 2010-05-27 Cascade Microtech, Inc. Replaceable coupon for a probing apparatus
US8872329B1 (en) 2009-01-09 2014-10-28 Amkor Technology, Inc. Extended landing pad substrate package structure and method
WO2010096714A2 (en) * 2009-02-19 2010-08-26 Touchdown Technologies, Inc. Probe head for a microelectronic contactor assembly, the probe head having smt electronic components thereon
US8073019B2 (en) * 2009-03-02 2011-12-06 Jian Liu 810 nm ultra-short pulsed fiber laser
SG174288A1 (en) * 2009-03-10 2011-10-28 Johnstech Int Corp Electrically conductive pins for microcircuit tester
US8222912B2 (en) * 2009-03-12 2012-07-17 Sv Probe Pte. Ltd. Probe head structure for probe test cards
US7960827B1 (en) 2009-04-09 2011-06-14 Amkor Technology, Inc. Thermal via heat spreader package and method
US8623753B1 (en) 2009-05-28 2014-01-07 Amkor Technology, Inc. Stackable protruding via package and method
US8222538B1 (en) 2009-06-12 2012-07-17 Amkor Technology, Inc. Stackable via package and method
US9355962B2 (en) * 2009-06-12 2016-05-31 Stats Chippac Ltd. Integrated circuit package stacking system with redistribution and method of manufacture thereof
US8471154B1 (en) 2009-08-06 2013-06-25 Amkor Technology, Inc. Stackable variable height via package and method
US8796561B1 (en) 2009-10-05 2014-08-05 Amkor Technology, Inc. Fan out build up substrate stackable package and method
KR20110041179A (en) * 2009-10-15 2011-04-21 한국전자통신연구원 Structure for packaging
US8937381B1 (en) 2009-12-03 2015-01-20 Amkor Technology, Inc. Thin stackable package and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US8278752B2 (en) * 2009-12-23 2012-10-02 Intel Corporation Microelectronic package and method for a compression-based mid-level interconnect
US8536462B1 (en) 2010-01-22 2013-09-17 Amkor Technology, Inc. Flex circuit package and method
US8476538B2 (en) * 2010-03-08 2013-07-02 Formfactor, Inc. Wiring substrate with customization layers
US9496152B2 (en) * 2010-03-12 2016-11-15 STATS ChipPAC Pte. Ltd. Carrier system with multi-tier conductive posts and method of manufacture thereof
US7928552B1 (en) 2010-03-12 2011-04-19 Stats Chippac Ltd. Integrated circuit packaging system with multi-tier conductive interconnects and method of manufacture thereof
US8643394B2 (en) * 2010-04-16 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Non-reflow probe card structure
US8407888B2 (en) * 2010-05-07 2013-04-02 Oracle International Corporation Method of assembling a circuit board assembly
US8300423B1 (en) 2010-05-25 2012-10-30 Amkor Technology, Inc. Stackable treated via package and method
US8294276B1 (en) 2010-05-27 2012-10-23 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8411459B2 (en) 2010-06-10 2013-04-02 Taiwan Semiconductor Manufacturing Company, Ltd Interposer-on-glass package structures
US8999179B2 (en) 2010-07-13 2015-04-07 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive vias in a substrate
US8338229B1 (en) 2010-07-30 2012-12-25 Amkor Technology, Inc. Stackable plasma cleaned via package and method
US8717775B1 (en) 2010-08-02 2014-05-06 Amkor Technology, Inc. Fingerprint sensor package and method
US8337657B1 (en) 2010-10-27 2012-12-25 Amkor Technology, Inc. Mechanical tape separation package and method
US8482134B1 (en) 2010-11-01 2013-07-09 Amkor Technology, Inc. Stackable package and method
US9748154B1 (en) 2010-11-04 2017-08-29 Amkor Technology, Inc. Wafer level fan out semiconductor device and manufacturing method thereof
US8970240B2 (en) * 2010-11-04 2015-03-03 Cascade Microtech, Inc. Resilient electrical interposers, systems that include the interposers, and methods for using and forming the same
US8525318B1 (en) 2010-11-10 2013-09-03 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8557629B1 (en) 2010-12-03 2013-10-15 Amkor Technology, Inc. Semiconductor device having overlapped via apertures
US8535961B1 (en) 2010-12-09 2013-09-17 Amkor Technology, Inc. Light emitting diode (LED) package and method
US9721872B1 (en) 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
US9013011B1 (en) 2011-03-11 2015-04-21 Amkor Technology, Inc. Stacked and staggered die MEMS package and method
KR101140113B1 (en) 2011-04-26 2012-04-30 앰코 테크놀로지 코리아 주식회사 Semiconductor device
US8653674B1 (en) 2011-09-15 2014-02-18 Amkor Technology, Inc. Electronic component package fabrication method and structure
US8633598B1 (en) 2011-09-20 2014-01-21 Amkor Technology, Inc. Underfill contacting stacking balls package fabrication method and structure
US9029962B1 (en) 2011-10-12 2015-05-12 Amkor Technology, Inc. Molded cavity substrate MEMS package fabrication method and structure
JP2013098451A (en) * 2011-11-04 2013-05-20 Sumitomo Electric Ind Ltd Semiconductor device and wiring board
US8680684B2 (en) 2012-01-09 2014-03-25 Invensas Corporation Stackable microelectronic package structures
US20130215586A1 (en) * 2012-02-16 2013-08-22 Ibiden Co., Ltd. Wiring substrate
US9390998B2 (en) * 2012-02-17 2016-07-12 Invensas Corporation Heat spreading substrate
US9069014B2 (en) * 2012-06-30 2015-06-30 Intel Corporation Wire probe assembly and forming process for die testing
US8540136B1 (en) 2012-09-06 2013-09-24 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for stud bump formation and apparatus for performing the same
US9818734B2 (en) 2012-09-14 2017-11-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming build-up interconnect structures over a temporary substrate
US9443797B2 (en) 2012-09-14 2016-09-13 STATS ChipPAC Pte. Ltd. Semiconductor device having wire studs as vertical interconnect in FO-WLP
US9978654B2 (en) 2012-09-14 2018-05-22 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming dual-sided interconnect structures in Fo-WLCSP
US10266402B2 (en) 2012-11-20 2019-04-23 Formfactor, Inc. Contactor devices with carbon nanotube probes embedded in a flexible film and processes of making such
KR101366461B1 (en) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 Semiconductor device and manufacturing method thereof
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
US9494618B2 (en) * 2012-12-26 2016-11-15 Translarity, Inc. Designed asperity contactors, including nanospikes, for semiconductor test using a package, and associated systems and methods
KR101488590B1 (en) 2013-03-29 2015-01-30 앰코 테크놀로지 코리아 주식회사 Semiconductor device and manufacturing method thereof
US9297971B2 (en) * 2013-04-26 2016-03-29 Oracle International Corporation Hybrid-integrated photonic chip package with an interposer
US9459285B2 (en) 2013-07-10 2016-10-04 Globalfoundries Inc. Test probe coated with conductive elastomer for testing of backdrilled plated through holes in printed circuit board assembly
US9365947B2 (en) 2013-10-04 2016-06-14 Invensas Corporation Method for preparing low cost substrates
KR101607981B1 (en) 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 Interposer and method for manufacturing the same, and semiconductor package using the same
US9209110B2 (en) 2014-05-07 2015-12-08 Qualcomm Incorporated Integrated device comprising wires as vias in an encapsulation layer
TWI587412B (en) * 2014-05-08 2017-06-11 矽品精密工業股份有限公司 Package structures and methods for fabricating the same
JP6271463B2 (en) * 2015-03-11 2018-01-31 東芝メモリ株式会社 Semiconductor device
US9893017B2 (en) 2015-04-09 2018-02-13 STATS ChipPAC Pte. Ltd. Double-sided semiconductor package and dual-mold method of making same
US9702906B2 (en) 2015-06-26 2017-07-11 International Business Machines Corporation Non-permanent termination structure for microprobe measurements
TWI716476B (en) * 2015-10-23 2021-01-21 新加坡商海特根微光學公司 Electrical-contact assemblies
US9831155B2 (en) * 2016-03-11 2017-11-28 Nanya Technology Corporation Chip package having tilted through silicon via
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof
US9922951B1 (en) 2016-11-12 2018-03-20 Sierra Circuits, Inc. Integrated circuit wafer integration with catalytic laminate or adhesive
WO2018089798A1 (en) * 2016-11-12 2018-05-17 Sierra Circuits, Inc. Integrated circuit wafer integration with catalytic laminate or adhesive
US10302694B2 (en) * 2016-12-27 2019-05-28 Texas Instruments Incorporated Interposer based test program evaluation
JP7101457B2 (en) * 2017-04-13 2022-07-15 株式会社日本マイクロニクス Electrical connection device
US10600739B1 (en) * 2017-09-28 2020-03-24 Hrl Laboratories, Llc Interposer with interconnects and methods of manufacturing the same
TWI626453B (en) * 2017-09-29 2018-06-11 中華精測科技股份有限公司 Probe assembly and capacitive space transformer thereof
US10658331B2 (en) * 2018-08-28 2020-05-19 Ferric Inc. Processor module with integrated packaged power converter
US10367415B1 (en) * 2018-08-28 2019-07-30 Ferric Inc. Processor module with integrated packaged power converter
KR102538704B1 (en) * 2018-12-04 2023-06-01 에스케이하이닉스 주식회사 Stack package including flexible bridge die
KR20210029422A (en) * 2019-09-06 2021-03-16 에스케이하이닉스 주식회사 Semiconductor package including electromagnetic interference shielding layer
US11561243B2 (en) * 2019-09-12 2023-01-24 International Business Machines Corporation Compliant organic substrate assembly for rigid probes
CN111403307B (en) * 2020-03-26 2023-09-29 环鸿电子(昆山)有限公司 Integrated circuit test module and preparation method thereof
CN111766416B (en) * 2020-08-14 2020-12-08 强一半导体(苏州)有限公司 Docking method of guide plate MEMS (micro-electromechanical systems) probe structure and switching layer
CN111968961B (en) * 2020-08-24 2022-08-12 浙江集迈科微电子有限公司 Sidewall interconnection plate and manufacturing process thereof
KR102466911B1 (en) * 2020-09-28 2022-11-14 주식회사 디아이티 Multilayer ceramic substrate having connecting means with frame and method of manufacturing the same
US11885830B2 (en) 2021-01-15 2024-01-30 Lumentum Operations Llc Probe tip assembly for testing optical components
JP2022139728A (en) * 2021-03-12 2022-09-26 パナソニックIpマネジメント株式会社 Interboard connection structure and power conversion device
US11630153B2 (en) * 2021-04-26 2023-04-18 Winbond Electronics Corp. Chip testing apparatus and system with sharing test interface
US11929673B2 (en) 2021-10-29 2024-03-12 Ferric Inc. Two-stage voltage converters for microprocessors

Citations (98)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2449646A (en) * 1945-11-23 1948-09-21 Zenith Radio Corp Vacuum tube lock
US2968742A (en) * 1958-07-25 1961-01-17 Standard Coil Prod Co Inc High efficiency triode vacuum tube
US3077511A (en) * 1960-03-11 1963-02-12 Int Resistance Co Printed circuit unit
US3487541A (en) * 1966-06-23 1970-01-06 Int Standard Electric Corp Printed circuits
US3532944A (en) * 1966-11-04 1970-10-06 Rca Corp Semiconductor devices having soldered joints
US3541222A (en) * 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making
US3561107A (en) * 1964-12-02 1971-02-09 Corning Glass Works Semiconductor process for joining a transistor chip to a printed circuit
US3577633A (en) * 1966-12-02 1971-05-04 Hitachi Ltd Method of making a semiconductor device
US3623127A (en) * 1969-11-03 1971-11-23 Ashley C Glenn Electrical printed circuit switching device
US3778887A (en) * 1970-12-23 1973-12-18 Hitachi Ltd Electronic devices and method for manufacturing the same
US3795037A (en) * 1970-05-05 1974-03-05 Int Computers Ltd Electrical connector devices
US3806801A (en) * 1972-12-26 1974-04-23 Ibm Probe contactor having buckling beam probes
US3825353A (en) * 1972-06-06 1974-07-23 Microsystems Int Ltd Mounting leads and method of fabrication
US3832632A (en) * 1971-11-22 1974-08-27 F Ardezzone Multi-point probe head assembly
US3842189A (en) * 1973-01-08 1974-10-15 Rca Corp Contact array and method of making the same
US3862790A (en) * 1971-07-22 1975-01-28 Plessey Handel Investment Ag Electrical interconnectors and connector assemblies
US3911361A (en) * 1974-06-28 1975-10-07 Ibm Coaxial array space transformer
US3952404A (en) * 1973-07-30 1976-04-27 Sharp Kabushiki Kaisha Beam lead formation method
US3954317A (en) * 1974-02-27 1976-05-04 Amp Incorporated Elastomeric connector and its method of manufacture
US3963986A (en) * 1975-02-10 1976-06-15 International Business Machines Corporation Programmable interface contactor structure
US3967366A (en) * 1973-03-29 1976-07-06 Licentia Patent-Verwaltungs-G.M.B.H. Method of contacting contact points of a semiconductor body
US4003621A (en) * 1975-06-16 1977-01-18 Technical Wire Products, Inc. Electrical connector employing conductive rectilinear elements
US4008300A (en) * 1974-10-15 1977-02-15 A & P Products Incorporated Multi-conductor element and method of making same
US4027935A (en) * 1976-06-21 1977-06-07 International Business Machines Corporation Contact for an electrical contactor assembly
US4038599A (en) * 1974-12-30 1977-07-26 International Business Machines Corporation High density wafer contacting and test system
US4067104A (en) * 1977-02-24 1978-01-10 Rockwell International Corporation Method of fabricating an array of flexible metallic interconnects for coupling microelectronics components
US4085502A (en) * 1977-04-12 1978-04-25 Advanced Circuit Technology, Inc. Jumper cable
US4118092A (en) * 1976-06-14 1978-10-03 Shin-Etsu Polymer Co., Ltd. Interconnectors
US4142288A (en) * 1976-02-28 1979-03-06 Licentia Patent-Verwaltungs-G.M.B.H. Method for contacting contact areas located on semiconductor bodies
US4183033A (en) * 1978-03-13 1980-01-08 National Research Development Corporation Field effect transistors
US4196444A (en) * 1976-12-03 1980-04-01 Texas Instruments Deutschland Gmbh Encapsulated power semiconductor device with single piece heat sink mounting plate
US4203203A (en) * 1977-09-24 1980-05-20 Amp Incorporated Electrical connector and method of manufacture
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
US4221047A (en) * 1979-03-23 1980-09-09 International Business Machines Corporation Multilayered glass-ceramic substrate for mounting of semiconductor device
US4249787A (en) * 1978-04-04 1981-02-10 S.E.P.M. Societe D'exploitation Des Procedes Marechal Novel end-pressure connection device
US4295700A (en) * 1978-10-12 1981-10-20 Shin-Etsu Polymer Co., Ltd. Interconnectors
US4354718A (en) * 1980-08-18 1982-10-19 Amp Incorporated Dual-in-line package carrier and socket assembly
US4355199A (en) * 1975-10-10 1982-10-19 Luc Penelope Jane Vesey Conductive connections
US4400234A (en) * 1975-11-13 1983-08-23 Tektronix, Inc. Method of manufacturing electrical connector
US4408814A (en) * 1980-08-22 1983-10-11 Shin-Etsu Polymer Co., Ltd. Electric connector of press-contact holding type
US4445735A (en) * 1980-12-05 1984-05-01 Compagnie Internationale Pour L'informatique Cii-Honeywell Bull (Societe Anonyme) Electrical connection device for high density contacts
US4465972A (en) * 1982-04-05 1984-08-14 Allied Corporation Connection arrangement for printed circuit board testing apparatus
US4509099A (en) * 1980-02-19 1985-04-02 Sharp Kabushiki Kaisha Electronic component with plurality of terminals thereon
US4520562A (en) * 1979-11-20 1985-06-04 Shin-Etsu Polymer Co., Ltd. Method for manufacturing an elastic composite body with metal wires embedded therein
US4548451A (en) * 1984-04-27 1985-10-22 International Business Machines Corporation Pinless connector interposer and method for making the same
US4553192A (en) * 1983-08-25 1985-11-12 International Business Machines Corporation High density planar interconnected integrated circuit package
US4555523A (en) * 1984-06-04 1985-11-26 E. R. Squibb & Sons, Inc. 7-Oxabicycloheptane substituted thio prostaglandin analogs and their use in the treatment of thrombolytic disease
US4563640A (en) * 1981-06-03 1986-01-07 Yoshiei Hasegawa Fixed probe board
US4567432A (en) * 1983-06-09 1986-01-28 Texas Instruments Incorporated Apparatus for testing integrated circuits
US4567433A (en) * 1980-05-27 1986-01-28 Nihon Denshi Zairo Kabushiki Kaisha Complex probe card for testing a semiconductor wafer
US4575166A (en) * 1984-05-01 1986-03-11 International Business Machines Corp. Circuitry on mylar and dual durometer rubber multiple connector
US4577918A (en) * 1984-05-01 1986-03-25 International Business Machines Corporation Copper and dual durometer rubber multiple connector
US4585727A (en) * 1984-07-27 1986-04-29 Probe-Tronics, Inc. Fixed point method and apparatus for probing semiconductor devices
US4616406A (en) * 1984-09-27 1986-10-14 Advanced Micro Devices, Inc. Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein
US4622514A (en) * 1984-06-15 1986-11-11 Ibm Multiple mode buckling beam probe assembly
US4637130A (en) * 1981-03-05 1987-01-20 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
US4663742A (en) * 1984-10-30 1987-05-05 International Business Machines Corporation Directory memory system having simultaneous write, compare and bypass capabilites
US4712721A (en) * 1986-03-17 1987-12-15 Raychem Corp. Solder delivery systems
US4738625A (en) * 1986-09-29 1988-04-19 Bell Telephone Laboratories, Inc. Electrical connectors for circuit panels
US4751199A (en) * 1983-12-06 1988-06-14 Fairchild Semiconductor Corporation Process of forming a compliant lead frame for array-type semiconductor packages
US4757256A (en) * 1985-05-10 1988-07-12 Micro-Probe, Inc. High density probe card
US4763407A (en) * 1983-01-28 1988-08-16 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a semiconductor device
US4764848A (en) * 1986-11-24 1988-08-16 International Business Machines Corporation Surface mounted array strain relief device
US4764122A (en) * 1986-02-14 1988-08-16 U.S. Philips Corporation Data bus connector
US4768252A (en) * 1987-03-23 1988-09-06 Ross Anthony J Fitted sheet
US4778950A (en) * 1985-07-22 1988-10-18 Digital Equipment Corporation Anisotropic elastomeric interconnecting system
US4783624A (en) * 1986-04-14 1988-11-08 Interconnect Devices, Inc. Contact probe devices and method
US4793814A (en) * 1986-07-21 1988-12-27 Rogers Corporation Electrical circuit board interconnect
US4811296A (en) * 1987-05-15 1989-03-07 Analog Devices, Inc. Multi-port register file with flow-through of data
US4816754A (en) * 1986-04-29 1989-03-28 International Business Machines Corporation Contactor and probe assembly for electrical test apparatus
US4820170A (en) * 1984-12-20 1989-04-11 Amp Incorporated Layered elastomeric connector and process for its manufacture
US4820376A (en) * 1987-11-05 1989-04-11 American Telephone And Telegraph Company At&T Bell Laboratories Fabrication of CPI layers
US4832609A (en) * 1987-11-27 1989-05-23 Eastman Kodak Company Solderless circuit connection for bowed circuit board
US4871316A (en) * 1988-10-17 1989-10-03 Microelectronics And Computer Technology Corporation Printed wire connector
US4875614A (en) * 1988-10-31 1989-10-24 International Business Machines Corporation Alignment device
US4937653A (en) * 1988-07-21 1990-06-26 American Telephone And Telegraph Company Semiconductor integrated circuit chip-to-chip interconnection scheme
US4948379A (en) * 1989-03-17 1990-08-14 E. I. Du Pont De Nemours And Company Separable, surface-mating electrical connector and assembly
US4955523A (en) * 1986-12-17 1990-09-11 Raychem Corporation Interconnection of electronic components
US4991290A (en) * 1988-07-21 1991-02-12 Microelectronics And Computer Technology Flexible electrical interconnect and method of making
US4998885A (en) * 1989-10-27 1991-03-12 International Business Machines Corporation Elastomeric area array interposer
US5008776A (en) * 1990-06-06 1991-04-16 Sgs-Thomson Microelectronics, Inc. Zero power IC module
US5019673A (en) * 1990-08-22 1991-05-28 Motorola, Inc. Flip-chip package for integrated circuits
US5037312A (en) * 1990-11-15 1991-08-06 Amp Incorporated Conductive gel area array connector
US5049084A (en) * 1989-12-05 1991-09-17 Rogers Corporation Electrical circuit board interconnect
US5054192A (en) * 1987-05-21 1991-10-08 Cray Computer Corporation Lead bonding of chips to circuit boards and circuit boards to circuit boards
US5061192A (en) * 1990-12-17 1991-10-29 International Business Machines Corporation High density connector
US5067007A (en) * 1988-06-13 1991-11-19 Hitachi, Ltd. Semiconductor device having leads for mounting to a surface of a printed circuit board
US5070297A (en) * 1990-06-04 1991-12-03 Texas Instruments Incorporated Full wafer integrated circuit testing device
US5086337A (en) * 1987-01-19 1992-02-04 Hitachi, Ltd. Connecting structure of electronic part and electronic device using the structure
US5089877A (en) * 1990-06-06 1992-02-18 Sgs-Thomson Microelectronics, Inc. Zero power ic module
US5097100A (en) * 1991-01-25 1992-03-17 Sundstrand Data Control, Inc. Noble metal plated wire and terminal assembly, and method of making the same
US5099309A (en) * 1990-04-30 1992-03-24 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
US5106308A (en) * 1991-03-04 1992-04-21 Allied-Signal Inc. Planar contact grid array connector
US5173055A (en) * 1991-08-08 1992-12-22 Amp Incorporated Area array connector
US5175496A (en) * 1990-08-31 1992-12-29 Cray Research, Inc. Dual contact beam assembly for an IC test fixture
US5476211A (en) * 1993-11-16 1995-12-19 Form Factor, Inc. Method of manufacturing electrical contacts, using a sacrificial member
US5772451A (en) * 1993-11-16 1998-06-30 Form Factor, Inc. Sockets for electronic components and methods of connecting to electronic components
US5974662A (en) * 1993-11-16 1999-11-02 Formfactor, Inc. Method of planarizing tips of probe elements of a probe card assembly

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2961746A (en) * 1956-06-18 1960-11-29 Aladdin Ind Inc Printed circuits
US3430338A (en) * 1964-08-11 1969-03-04 Gen Motors Corp Making a welded circuit assembly
US3557446A (en) * 1968-12-16 1971-01-26 Western Electric Co Method of forming printed circuit board through-connections
US3889363A (en) * 1971-02-16 1975-06-17 Richard P Davis Method of making printed circuit boards
US4329780A (en) * 1978-09-28 1982-05-18 Dayco Corporation Method of making a reinforced wear-resistant liner
SU1003396A1 (en) * 1980-02-08 1983-03-07 Институт коллоидной химии и химии воды АН УССР Electric connector
JPS63131560A (en) * 1986-11-17 1988-06-03 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Chip joint structure
JPH07107954B2 (en) * 1986-12-19 1995-11-15 富士通株式会社 Semiconductor device
US4788767A (en) * 1987-03-11 1988-12-06 International Business Machines Corporation Method for mounting a flexible film semiconductor chip carrier on a circuitized substrate
US5195237A (en) * 1987-05-21 1993-03-23 Cray Computer Corporation Flying leads for integrated circuits
DE3838413A1 (en) * 1988-11-12 1990-05-17 Mania Gmbh ADAPTER FOR ELECTRONIC TEST DEVICES FOR PCBS AND THE LIKE
JPH02290564A (en) * 1989-02-08 1990-11-30 Tokyo Electron Ltd Probe head and its manufacture
FR2666173A1 (en) * 1990-08-21 1992-02-28 Thomson Csf HYBRID INTERCONNECTION STRUCTURE FOR INTEGRATED CIRCUITS AND MANUFACTURING METHOD.
US5148103A (en) * 1990-10-31 1992-09-15 Hughes Aircraft Company Apparatus for testing integrated circuits
US5132613A (en) * 1990-11-30 1992-07-21 International Business Machines Corporation Low inductance side mount decoupling test structure
US5258236A (en) * 1991-05-03 1993-11-02 Ibm Corporation Multi-layer thin film structure and parallel processing method for fabricating same
US5371654A (en) * 1992-10-19 1994-12-06 International Business Machines Corporation Three dimensional high performance interconnection package
US6741085B1 (en) * 1993-11-16 2004-05-25 Formfactor, Inc. Contact carriers (tiles) for populating larger substrates with spring contacts
US6336269B1 (en) * 1993-11-16 2002-01-08 Benjamin N. Eldridge Method of fabricating an interconnection element
KR100394205B1 (en) * 1994-11-15 2003-08-06 폼팩터, 인크. A tested semiconductor device and a method of producing a tested semiconductor device

Patent Citations (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2449646A (en) * 1945-11-23 1948-09-21 Zenith Radio Corp Vacuum tube lock
US2968742A (en) * 1958-07-25 1961-01-17 Standard Coil Prod Co Inc High efficiency triode vacuum tube
US3077511A (en) * 1960-03-11 1963-02-12 Int Resistance Co Printed circuit unit
US3561107A (en) * 1964-12-02 1971-02-09 Corning Glass Works Semiconductor process for joining a transistor chip to a printed circuit
US3487541A (en) * 1966-06-23 1970-01-06 Int Standard Electric Corp Printed circuits
US3532944A (en) * 1966-11-04 1970-10-06 Rca Corp Semiconductor devices having soldered joints
US3577633A (en) * 1966-12-02 1971-05-04 Hitachi Ltd Method of making a semiconductor device
US3541222A (en) * 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making
US3623127A (en) * 1969-11-03 1971-11-23 Ashley C Glenn Electrical printed circuit switching device
US3795037A (en) * 1970-05-05 1974-03-05 Int Computers Ltd Electrical connector devices
US3778887A (en) * 1970-12-23 1973-12-18 Hitachi Ltd Electronic devices and method for manufacturing the same
US3862790A (en) * 1971-07-22 1975-01-28 Plessey Handel Investment Ag Electrical interconnectors and connector assemblies
US3832632A (en) * 1971-11-22 1974-08-27 F Ardezzone Multi-point probe head assembly
US3825353A (en) * 1972-06-06 1974-07-23 Microsystems Int Ltd Mounting leads and method of fabrication
US3806801A (en) * 1972-12-26 1974-04-23 Ibm Probe contactor having buckling beam probes
US3842189A (en) * 1973-01-08 1974-10-15 Rca Corp Contact array and method of making the same
US3967366A (en) * 1973-03-29 1976-07-06 Licentia Patent-Verwaltungs-G.M.B.H. Method of contacting contact points of a semiconductor body
US3952404A (en) * 1973-07-30 1976-04-27 Sharp Kabushiki Kaisha Beam lead formation method
US3954317A (en) * 1974-02-27 1976-05-04 Amp Incorporated Elastomeric connector and its method of manufacture
US3911361A (en) * 1974-06-28 1975-10-07 Ibm Coaxial array space transformer
US4008300A (en) * 1974-10-15 1977-02-15 A & P Products Incorporated Multi-conductor element and method of making same
US4038599A (en) * 1974-12-30 1977-07-26 International Business Machines Corporation High density wafer contacting and test system
US3963986A (en) * 1975-02-10 1976-06-15 International Business Machines Corporation Programmable interface contactor structure
US4003621A (en) * 1975-06-16 1977-01-18 Technical Wire Products, Inc. Electrical connector employing conductive rectilinear elements
US4355199A (en) * 1975-10-10 1982-10-19 Luc Penelope Jane Vesey Conductive connections
US4400234A (en) * 1975-11-13 1983-08-23 Tektronix, Inc. Method of manufacturing electrical connector
US4142288A (en) * 1976-02-28 1979-03-06 Licentia Patent-Verwaltungs-G.M.B.H. Method for contacting contact areas located on semiconductor bodies
US4118092A (en) * 1976-06-14 1978-10-03 Shin-Etsu Polymer Co., Ltd. Interconnectors
US4027935A (en) * 1976-06-21 1977-06-07 International Business Machines Corporation Contact for an electrical contactor assembly
US4196444A (en) * 1976-12-03 1980-04-01 Texas Instruments Deutschland Gmbh Encapsulated power semiconductor device with single piece heat sink mounting plate
US4067104A (en) * 1977-02-24 1978-01-10 Rockwell International Corporation Method of fabricating an array of flexible metallic interconnects for coupling microelectronics components
US4085502A (en) * 1977-04-12 1978-04-25 Advanced Circuit Technology, Inc. Jumper cable
US4203203A (en) * 1977-09-24 1980-05-20 Amp Incorporated Electrical connector and method of manufacture
US4183033A (en) * 1978-03-13 1980-01-08 National Research Development Corporation Field effect transistors
US4249787A (en) * 1978-04-04 1981-02-10 S.E.P.M. Societe D'exploitation Des Procedes Marechal Novel end-pressure connection device
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
US4402562A (en) * 1978-10-12 1983-09-06 Shin-Etsu Polymer Co., Ltd. Interconnectors
US4295700A (en) * 1978-10-12 1981-10-20 Shin-Etsu Polymer Co., Ltd. Interconnectors
US4221047A (en) * 1979-03-23 1980-09-09 International Business Machines Corporation Multilayered glass-ceramic substrate for mounting of semiconductor device
US4520562A (en) * 1979-11-20 1985-06-04 Shin-Etsu Polymer Co., Ltd. Method for manufacturing an elastic composite body with metal wires embedded therein
US4509099A (en) * 1980-02-19 1985-04-02 Sharp Kabushiki Kaisha Electronic component with plurality of terminals thereon
US4567433A (en) * 1980-05-27 1986-01-28 Nihon Denshi Zairo Kabushiki Kaisha Complex probe card for testing a semiconductor wafer
US4354718A (en) * 1980-08-18 1982-10-19 Amp Incorporated Dual-in-line package carrier and socket assembly
US4408814A (en) * 1980-08-22 1983-10-11 Shin-Etsu Polymer Co., Ltd. Electric connector of press-contact holding type
US4445735A (en) * 1980-12-05 1984-05-01 Compagnie Internationale Pour L'informatique Cii-Honeywell Bull (Societe Anonyme) Electrical connection device for high density contacts
US4637130A (en) * 1981-03-05 1987-01-20 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
US4563640A (en) * 1981-06-03 1986-01-07 Yoshiei Hasegawa Fixed probe board
US4465972A (en) * 1982-04-05 1984-08-14 Allied Corporation Connection arrangement for printed circuit board testing apparatus
US4763407A (en) * 1983-01-28 1988-08-16 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a semiconductor device
US4567432A (en) * 1983-06-09 1986-01-28 Texas Instruments Incorporated Apparatus for testing integrated circuits
US4553192A (en) * 1983-08-25 1985-11-12 International Business Machines Corporation High density planar interconnected integrated circuit package
US4751199A (en) * 1983-12-06 1988-06-14 Fairchild Semiconductor Corporation Process of forming a compliant lead frame for array-type semiconductor packages
US4548451A (en) * 1984-04-27 1985-10-22 International Business Machines Corporation Pinless connector interposer and method for making the same
US4575166A (en) * 1984-05-01 1986-03-11 International Business Machines Corp. Circuitry on mylar and dual durometer rubber multiple connector
US4577918A (en) * 1984-05-01 1986-03-25 International Business Machines Corporation Copper and dual durometer rubber multiple connector
US4555523A (en) * 1984-06-04 1985-11-26 E. R. Squibb & Sons, Inc. 7-Oxabicycloheptane substituted thio prostaglandin analogs and their use in the treatment of thrombolytic disease
US4622514A (en) * 1984-06-15 1986-11-11 Ibm Multiple mode buckling beam probe assembly
US4585727A (en) * 1984-07-27 1986-04-29 Probe-Tronics, Inc. Fixed point method and apparatus for probing semiconductor devices
US4616406A (en) * 1984-09-27 1986-10-14 Advanced Micro Devices, Inc. Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein
US4663742A (en) * 1984-10-30 1987-05-05 International Business Machines Corporation Directory memory system having simultaneous write, compare and bypass capabilites
US4820170A (en) * 1984-12-20 1989-04-11 Amp Incorporated Layered elastomeric connector and process for its manufacture
US4757256A (en) * 1985-05-10 1988-07-12 Micro-Probe, Inc. High density probe card
US4778950A (en) * 1985-07-22 1988-10-18 Digital Equipment Corporation Anisotropic elastomeric interconnecting system
US4764122A (en) * 1986-02-14 1988-08-16 U.S. Philips Corporation Data bus connector
US4712721A (en) * 1986-03-17 1987-12-15 Raychem Corp. Solder delivery systems
US4783624A (en) * 1986-04-14 1988-11-08 Interconnect Devices, Inc. Contact probe devices and method
US4816754A (en) * 1986-04-29 1989-03-28 International Business Machines Corporation Contactor and probe assembly for electrical test apparatus
US4793814A (en) * 1986-07-21 1988-12-27 Rogers Corporation Electrical circuit board interconnect
US4738625A (en) * 1986-09-29 1988-04-19 Bell Telephone Laboratories, Inc. Electrical connectors for circuit panels
US4764848A (en) * 1986-11-24 1988-08-16 International Business Machines Corporation Surface mounted array strain relief device
US4955523A (en) * 1986-12-17 1990-09-11 Raychem Corporation Interconnection of electronic components
US5086337A (en) * 1987-01-19 1992-02-04 Hitachi, Ltd. Connecting structure of electronic part and electronic device using the structure
US4768252A (en) * 1987-03-23 1988-09-06 Ross Anthony J Fitted sheet
US4811296A (en) * 1987-05-15 1989-03-07 Analog Devices, Inc. Multi-port register file with flow-through of data
US5054192A (en) * 1987-05-21 1991-10-08 Cray Computer Corporation Lead bonding of chips to circuit boards and circuit boards to circuit boards
US4820376A (en) * 1987-11-05 1989-04-11 American Telephone And Telegraph Company At&T Bell Laboratories Fabrication of CPI layers
US4832609A (en) * 1987-11-27 1989-05-23 Eastman Kodak Company Solderless circuit connection for bowed circuit board
US5067007A (en) * 1988-06-13 1991-11-19 Hitachi, Ltd. Semiconductor device having leads for mounting to a surface of a printed circuit board
US4937653A (en) * 1988-07-21 1990-06-26 American Telephone And Telegraph Company Semiconductor integrated circuit chip-to-chip interconnection scheme
US4991290A (en) * 1988-07-21 1991-02-12 Microelectronics And Computer Technology Flexible electrical interconnect and method of making
US4871316A (en) * 1988-10-17 1989-10-03 Microelectronics And Computer Technology Corporation Printed wire connector
US4875614A (en) * 1988-10-31 1989-10-24 International Business Machines Corporation Alignment device
US4948379A (en) * 1989-03-17 1990-08-14 E. I. Du Pont De Nemours And Company Separable, surface-mating electrical connector and assembly
US4998885A (en) * 1989-10-27 1991-03-12 International Business Machines Corporation Elastomeric area array interposer
US5049084A (en) * 1989-12-05 1991-09-17 Rogers Corporation Electrical circuit board interconnect
US5099309A (en) * 1990-04-30 1992-03-24 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
US5070297A (en) * 1990-06-04 1991-12-03 Texas Instruments Incorporated Full wafer integrated circuit testing device
US5008776A (en) * 1990-06-06 1991-04-16 Sgs-Thomson Microelectronics, Inc. Zero power IC module
US5089877A (en) * 1990-06-06 1992-02-18 Sgs-Thomson Microelectronics, Inc. Zero power ic module
US5019673A (en) * 1990-08-22 1991-05-28 Motorola, Inc. Flip-chip package for integrated circuits
US5175496A (en) * 1990-08-31 1992-12-29 Cray Research, Inc. Dual contact beam assembly for an IC test fixture
US5037312A (en) * 1990-11-15 1991-08-06 Amp Incorporated Conductive gel area array connector
US5061192A (en) * 1990-12-17 1991-10-29 International Business Machines Corporation High density connector
US5097100A (en) * 1991-01-25 1992-03-17 Sundstrand Data Control, Inc. Noble metal plated wire and terminal assembly, and method of making the same
US5106308A (en) * 1991-03-04 1992-04-21 Allied-Signal Inc. Planar contact grid array connector
US5173055A (en) * 1991-08-08 1992-12-22 Amp Incorporated Area array connector
US5476211A (en) * 1993-11-16 1995-12-19 Form Factor, Inc. Method of manufacturing electrical contacts, using a sacrificial member
US5772451A (en) * 1993-11-16 1998-06-30 Form Factor, Inc. Sockets for electronic components and methods of connecting to electronic components
US5974662A (en) * 1993-11-16 1999-11-02 Formfactor, Inc. Method of planarizing tips of probe elements of a probe card assembly

Cited By (103)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9153562B2 (en) 2004-11-03 2015-10-06 Tessera, Inc. Stacked packaging improvements
US9570416B2 (en) 2004-11-03 2017-02-14 Tessera, Inc. Stacked packaging improvements
US8927337B2 (en) 2004-11-03 2015-01-06 Tessera, Inc. Stacked packaging improvements
US8525314B2 (en) 2004-11-03 2013-09-03 Tessera, Inc. Stacked packaging improvements
US8531020B2 (en) 2004-11-03 2013-09-10 Tessera, Inc. Stacked packaging improvements
US8728865B2 (en) 2005-12-23 2014-05-20 Tessera, Inc. Microelectronic packages and methods therefor
US9218988B2 (en) 2005-12-23 2015-12-22 Tessera, Inc. Microelectronic packages and methods therefor
US9984901B2 (en) 2005-12-23 2018-05-29 Tessera, Inc. Method for making a microelectronic assembly having conductive elements
US9570382B2 (en) 2010-07-19 2017-02-14 Tessera, Inc. Stackable molded microelectronic packages
US9553076B2 (en) 2010-07-19 2017-01-24 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
US8907466B2 (en) 2010-07-19 2014-12-09 Tessera, Inc. Stackable molded microelectronic packages
US9123664B2 (en) 2010-07-19 2015-09-01 Tessera, Inc. Stackable molded microelectronic packages
US10128216B2 (en) 2010-07-19 2018-11-13 Tessera, Inc. Stackable molded microelectronic packages
US8482111B2 (en) 2010-07-19 2013-07-09 Tessera, Inc. Stackable molded microelectronic packages
US8659164B2 (en) 2010-11-15 2014-02-25 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US8637991B2 (en) 2010-11-15 2014-01-28 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US8957527B2 (en) 2010-11-15 2015-02-17 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US8623706B2 (en) 2010-11-15 2014-01-07 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US9324681B2 (en) 2010-12-13 2016-04-26 Tessera, Inc. Pin attachment
US8618659B2 (en) 2011-05-03 2013-12-31 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US11424211B2 (en) 2011-05-03 2022-08-23 Tessera Llc Package-on-package assembly with wire bonds to encapsulation surface
US9224717B2 (en) 2011-05-03 2015-12-29 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US10593643B2 (en) 2011-05-03 2020-03-17 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US10062661B2 (en) 2011-05-03 2018-08-28 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9691731B2 (en) 2011-05-03 2017-06-27 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9093435B2 (en) 2011-05-03 2015-07-28 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9105483B2 (en) 2011-10-17 2015-08-11 Invensas Corporation Package-on-package assembly with wire bond vias
US11189595B2 (en) 2011-10-17 2021-11-30 Invensas Corporation Package-on-package assembly with wire bond vias
US9761558B2 (en) 2011-10-17 2017-09-12 Invensas Corporation Package-on-package assembly with wire bond vias
US8836136B2 (en) 2011-10-17 2014-09-16 Invensas Corporation Package-on-package assembly with wire bond vias
US9041227B2 (en) 2011-10-17 2015-05-26 Invensas Corporation Package-on-package assembly with wire bond vias
US9252122B2 (en) 2011-10-17 2016-02-02 Invensas Corporation Package-on-package assembly with wire bond vias
US10756049B2 (en) 2011-10-17 2020-08-25 Invensas Corporation Package-on-package assembly with wire bond vias
US11735563B2 (en) 2011-10-17 2023-08-22 Invensas Llc Package-on-package assembly with wire bond vias
US9842745B2 (en) 2012-02-17 2017-12-12 Invensas Corporation Heat spreading substrate with embedded interconnects
US9691679B2 (en) 2012-02-24 2017-06-27 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US8372741B1 (en) * 2012-02-24 2013-02-12 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US8772152B2 (en) 2012-02-24 2014-07-08 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US9349706B2 (en) 2012-02-24 2016-05-24 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US9953914B2 (en) 2012-05-22 2018-04-24 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US8835228B2 (en) 2012-05-22 2014-09-16 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US10170412B2 (en) 2012-05-22 2019-01-01 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US10510659B2 (en) 2012-05-22 2019-12-17 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US9917073B2 (en) 2012-07-31 2018-03-13 Invensas Corporation Reconstituted wafer-level package dram with conductive interconnects formed in encapsulant at periphery of the package
US9391008B2 (en) 2012-07-31 2016-07-12 Invensas Corporation Reconstituted wafer-level package DRAM
US9502390B2 (en) 2012-08-03 2016-11-22 Invensas Corporation BVA interposer
US10297582B2 (en) 2012-08-03 2019-05-21 Invensas Corporation BVA interposer
US8975738B2 (en) 2012-11-12 2015-03-10 Invensas Corporation Structure for microelectronic packaging with terminals on dielectric mass
US8878353B2 (en) 2012-12-20 2014-11-04 Invensas Corporation Structure for microelectronic packaging with bond elements to encapsulation surface
US9095074B2 (en) 2012-12-20 2015-07-28 Invensas Corporation Structure for microelectronic packaging with bond elements to encapsulation surface
US9615456B2 (en) 2012-12-20 2017-04-04 Invensas Corporation Microelectronic assembly for microelectronic packaging with bond elements to encapsulation surface
CN103091622A (en) * 2013-01-18 2013-05-08 宁波三星电气股份有限公司 Final circular test (FCT) multi-station test device
US9601454B2 (en) 2013-02-01 2017-03-21 Invensas Corporation Method of forming a component having wire bonds and a stiffening layer
US9034696B2 (en) 2013-07-15 2015-05-19 Invensas Corporation Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation
US9633979B2 (en) 2013-07-15 2017-04-25 Invensas Corporation Microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation
US8883563B1 (en) 2013-07-15 2014-11-11 Invensas Corporation Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation
US9023691B2 (en) 2013-07-15 2015-05-05 Invensas Corporation Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation
US10460958B2 (en) 2013-08-07 2019-10-29 Invensas Corporation Method of manufacturing embedded packaging with preformed vias
US9685365B2 (en) 2013-08-08 2017-06-20 Invensas Corporation Method of forming a wire bond having a free end
US10008477B2 (en) 2013-09-16 2018-06-26 Invensas Corporation Microelectronic element with bond elements to encapsulation surface
US9082753B2 (en) 2013-11-12 2015-07-14 Invensas Corporation Severing bond wire by kinking and twisting
US9087815B2 (en) 2013-11-12 2015-07-21 Invensas Corporation Off substrate kinking of bond wire
US9893033B2 (en) 2013-11-12 2018-02-13 Invensas Corporation Off substrate kinking of bond wire
US9728527B2 (en) 2013-11-22 2017-08-08 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US10290613B2 (en) 2013-11-22 2019-05-14 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9852969B2 (en) 2013-11-22 2017-12-26 Invensas Corporation Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
US10629567B2 (en) 2013-11-22 2020-04-21 Invensas Corporation Multiple plated via arrays of different wire heights on same substrate
US10026717B2 (en) 2013-11-22 2018-07-17 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US11404338B2 (en) 2014-01-17 2022-08-02 Invensas Corporation Fine pitch bva using reconstituted wafer with area array accessible for testing
US9837330B2 (en) 2014-01-17 2017-12-05 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US9583411B2 (en) 2014-01-17 2017-02-28 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US10529636B2 (en) 2014-01-17 2020-01-07 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US9356006B2 (en) 2014-03-31 2016-05-31 Invensas Corporation Batch process fabrication of package-on-package microelectronic assemblies
US9214454B2 (en) 2014-03-31 2015-12-15 Invensas Corporation Batch process fabrication of package-on-package microelectronic assemblies
US9812433B2 (en) 2014-03-31 2017-11-07 Invensas Corporation Batch process fabrication of package-on-package microelectronic assemblies
US10381326B2 (en) 2014-05-28 2019-08-13 Invensas Corporation Structure and method for integrated circuits packaging with increased density
US10032647B2 (en) 2014-05-29 2018-07-24 Invensas Corporation Low CTE component with wire bond interconnects
US10475726B2 (en) 2014-05-29 2019-11-12 Invensas Corporation Low CTE component with wire bond interconnects
US9646917B2 (en) 2014-05-29 2017-05-09 Invensas Corporation Low CTE component with wire bond interconnects
US9412714B2 (en) 2014-05-30 2016-08-09 Invensas Corporation Wire bond support structure and microelectronic package including wire bonds therefrom
US9947641B2 (en) 2014-05-30 2018-04-17 Invensas Corporation Wire bond support structure and microelectronic package including wire bonds therefrom
US9735084B2 (en) 2014-12-11 2017-08-15 Invensas Corporation Bond via array for thermal conductivity
US10806036B2 (en) 2015-03-05 2020-10-13 Invensas Corporation Pressing of wire bond wire tips to provide bent-over tips
US9888579B2 (en) 2015-03-05 2018-02-06 Invensas Corporation Pressing of wire bond wire tips to provide bent-over tips
US9530749B2 (en) 2015-04-28 2016-12-27 Invensas Corporation Coupling of side surface contacts to a circuit platform
US10008469B2 (en) 2015-04-30 2018-06-26 Invensas Corporation Wafer-level packaging using wire bond wires in place of a redistribution layer
US9761554B2 (en) 2015-05-07 2017-09-12 Invensas Corporation Ball bonding metal wire bond wires to metal pads
US10490528B2 (en) 2015-10-12 2019-11-26 Invensas Corporation Embedded wire bond wires
US10115678B2 (en) 2015-10-12 2018-10-30 Invensas Corporation Wire bond wires for interference shielding
US9812402B2 (en) 2015-10-12 2017-11-07 Invensas Corporation Wire bond wires for interference shielding
US10559537B2 (en) 2015-10-12 2020-02-11 Invensas Corporation Wire bond wires for interference shielding
US11462483B2 (en) 2015-10-12 2022-10-04 Invensas Llc Wire bond wires for interference shielding
US10332854B2 (en) 2015-10-23 2019-06-25 Invensas Corporation Anchoring structure of fine pitch bva
US10181457B2 (en) 2015-10-26 2019-01-15 Invensas Corporation Microelectronic package for wafer-level chip scale packaging with fan-out
US10043779B2 (en) 2015-11-17 2018-08-07 Invensas Corporation Packaged microelectronic device for a package-on-package device
US9911718B2 (en) 2015-11-17 2018-03-06 Invensas Corporation ‘RDL-First’ packaged microelectronic device for a package-on-package device
US9659848B1 (en) 2015-11-18 2017-05-23 Invensas Corporation Stiffened wires for offset BVA
US9984992B2 (en) 2015-12-30 2018-05-29 Invensas Corporation Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
US10325877B2 (en) 2015-12-30 2019-06-18 Invensas Corporation Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
US10120020B2 (en) 2016-06-16 2018-11-06 Formfactor Beaverton, Inc. Probe head assemblies and probe systems for testing integrated circuit devices
US9935075B2 (en) 2016-07-29 2018-04-03 Invensas Corporation Wire bonding method and apparatus for electromagnetic interference shielding
US10658302B2 (en) 2016-07-29 2020-05-19 Invensas Corporation Wire bonding method and apparatus for electromagnetic interference shielding
US10299368B2 (en) 2016-12-21 2019-05-21 Invensas Corporation Surface integrated waveguides and circuit structures therefor

Also Published As

Publication number Publication date
US6300780B1 (en) 2001-10-09
US20090128176A1 (en) 2009-05-21
US5531022A (en) 1996-07-02
DE69322832D1 (en) 1999-02-11
US7538565B1 (en) 2009-05-26
US20020014004A1 (en) 2002-02-07
US5821763A (en) 1998-10-13
US20070271781A9 (en) 2007-11-29
US20080121879A1 (en) 2008-05-29
EP0593966A1 (en) 1994-04-27
DE69322832T2 (en) 1999-08-05
US5371654A (en) 1994-12-06
JPH06204399A (en) 1994-07-22
JP2514305B2 (en) 1996-07-10
EP0593966B1 (en) 1998-12-30
US5635846A (en) 1997-06-03
US6334247B1 (en) 2002-01-01

Similar Documents

Publication Publication Date Title
US5635846A (en) Test probe having elongated conductor embedded in an elostomeric material which is mounted on a space transformer
US20080111570A1 (en) High density integrated circuit apparatus, test probe and methods of use thereof

Legal Events

Date Code Title Description
AS Assignment

Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION, NEW Y

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BEAMAN, BRIAN S.;FOGEL, KEITH E.;LAURO, PAUL A.;AND OTHERS;REEL/FRAME:020418/0733;SIGNING DATES FROM 19930430 TO 19930504

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION

AS Assignment

Owner name: GLOBALFOUNDRIES U.S. 2 LLC, NEW YORK

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INTERNATIONAL BUSINESS MACHINES CORPORATION;REEL/FRAME:036550/0001

Effective date: 20150629

AS Assignment

Owner name: GLOBALFOUNDRIES INC., CAYMAN ISLANDS

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GLOBALFOUNDRIES U.S. 2 LLC;GLOBALFOUNDRIES U.S. INC.;REEL/FRAME:036779/0001

Effective date: 20150910