US20080067073A1 - Interposer And Manufacturing Method For The Same - Google Patents
Interposer And Manufacturing Method For The Same Download PDFInfo
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- US20080067073A1 US20080067073A1 US11/631,635 US63163505A US2008067073A1 US 20080067073 A1 US20080067073 A1 US 20080067073A1 US 63163505 A US63163505 A US 63163505A US 2008067073 A1 US2008067073 A1 US 2008067073A1
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- hole
- layer
- electroplated coating
- interposer
- manufacturing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to an interposer and a manufacturing method for the same, and more particularly, relates to an interposer and a manufacturing method for the same in which a pinch-off is not generated in a through hole.
- a structure wherein a conducting member is formed such that a diameter of the conducting member becomes larger or smaller in succession or in incremental steps from one side to another side in the ceramic substrate which has laminated greensheets of a plurality of through holes arranged in a predetermined pattern and filled with the conducting member, and a plurality of another through holes arranged in the same pattern having different diameters.
- FIG. 9 is a cross sectional view to show a silicon substrate 80 explaining a problem in the prior art technology when an interposer is manufactured by arranging a conducting hole on the silicon substrate 80 .
- a through hole 91 is formed on the silicon substrate 80 .
- the through hole 91 becomes a cylindrical shape whose center portion is concave as shown in FIG. 9 rather than straight.
- seed layers 83 , 84 are formed by sputtering around the through hole 91 from both of a front surface 81 and a back surface 82 . Then, conducting layers 85 , 86 are formed by electroplated coating and the like utilizing the seed layers 83 , 84 as a seed.
- the interposer in the prior art technology is constituted as described above.
- the ceramic substrate is utilized and drilling or sand blasting is employed to open holes on the substrate, there is a problem that a diameter of the through hole cannot be made small.
- it is necessary to agglutinate two ceramic substrates there is a problem that a manufacturing process becomes complicated.
- the through hole is formed on the silicon substrate, because the center portion of the through hole has the concave shape and diameter of the through hole becomes larger as it goes inside from the front surface or the back surface, the seed layer cannot be formed well inside even when the seed layer is intended to be formed inside of the through hole.
- the conducting layer is grown from the seed layer by the electroplated coating and the like, because the conducting layer is not grown enough, so called “void” 92 is formed inside of the through hole 91 , in which the conducting layer does not exist. This causes a problem that the through hole 91 is not conductive and the manufacturing precision is poor.
- the present invention is made to solve the above described problems and it is an object of the present invention to provide an interposer and manufacturing method for the same in which the manufacturing process is simple and the void is not generated inside of the through hole.
- an interposer includes: a substrate which has one surface and another surface opposed to the one surface; a through hole being formed from the one surface to the another surface; a seed layer which is formed at an opening portion of the through hole on the one surface side of the substrate; an electrode layer for electroplated coating which is formed by covering the seed layer; and an electroplated coating layer which extends from the electrode layer for electroplated coating to the another surface side to fill the through hole.
- the interposer according to the present invention includes the seed layer which is formed at the opening portion of the through hole on the one surface side of the substrate, the electrode layer for electroplated coating which is formed by covering the seed layer, and the electroplated coating layer which extends from the electrode layer for electroplated coating to the another surface side to fill the through hole, the electroplated coating layer can be surely formed from the seed layer on the one surface side of the substrate to the another surface side.
- an interposer can be provided in which the manufacturing process is simple and the void is not generated inside of the through hole.
- the through hole may have a shape whose center portion is concave.
- the seed layer, the electrode layer for electroplated coating and the electroplated coating layer may be made out of the same material, or may be different materials.
- a manufacturing method for interposer includes steps of: preparing a substrate which has one surface and another surface; forming a through hole on the substrate; forming a seed layer at an opening portion of the through hole on the one surface side; and filling the through hole by forming an electroplated coating layer from the seed layer on the one surface side to the another surface side.
- the manufacturing method for the interposer according to the present invention includes steps of forming a seed layer at an opening portion of the through hole on the one surface side and filling the through hole by forming an electroplated coating layer from the seed layer on the one surface side to the another surface side. Because the conducting layer is surely formed by the electroplating from the one surface side of the through hole on the substrate to another surface side, the void is not generated inside of the through hole.
- a method for manufacturing the interposer can be provided that is simple and the void is not generated inside of the through hole.
- the step of filling the through hole by forming an electroplated coating layer from the seed layer on the one surface side to the another surface side includes steps of forming an electrode layer for electroplated coating to close the through hole at the one surface side, and forming the electroplated coating layer utilizing the electrode layer.
- the step of forming the through hole includes a step of forming a through hole whose center portion becomes concave.
- the seed layer, the electrode layer for electroplated coating and the electroplated coating layer may be made out of the same material, or different materials.
- an interposer in accordance with still another aspect of the present invention, includes a through hole which is made from a surface of one side of the substrate to a surface of another side, the through hole has a first opening area at the surface of the one side, and has a second opening area at the surface of the another side, and both of the first opening area and the second opening area become smaller in succession as they go from the surfaces to inside, and the interposer also includes a conducting layer which is formed in the through hole.
- the interposer has the through hole whose opening area becomes smaller in succession as they go from the surfaces to inside, the through hole can be easily filled by the conducting layer.
- areas of the first opening and the second opening are different.
- the wiring rules for the both surfaces can be independently settled, and wider degree of freedom for designing a wiring width and a wiring layout can be obtained.
- the through hole has a cylindrical portion between the surface of the one side and the surface of another side of the substrate.
- an interposer has a through hole, in which the through hole is made from a surface of one side of the substrate to a surface of another side; the through hole has a first opening area at the surface of the one side, and the first opening area becomes smaller in succession as the hole goes from the surface of the one side to the surface of the another side; and a conducting layer is formed in the through hole.
- a manufacturing method for the interposer including steps of: preparing a substrate which has one surface and another surface opposed to the one surface; forming a through hole by performing an etching such that an opening area of the through hole becomes smaller in succession as the hole goes from the surface of the one side and from the surface of the another side to inside; and forming a conducting layer in the through hole.
- the conducting layer can be formed without any discontinuity inside of the through hole when the conducting layer is formed in the through hole.
- the etching is performed such that the area of the opening of the surface on the one side and the area of the opening of the surface on another side are different.
- the manufacturing method further includes a step of forming a through hole whose opening area is constant from the surface of the one side to the surface of another side.
- a manufacturing method for interposer including steps of: preparing a substrate which has one surface and another surface opposed to the one surface; forming a through hole by performing an etching such that an opening area of the through hole becomes smaller in succession as the hole goes from the surface of the one side to the surface of the another side; and forming a conducting layer in the through hole.
- the etching is performed utilizing dry etching.
- the conducting layer may be formed utilizing evaporation, electroplated coating or electroless plating.
- FIG. 1A is a diagram showing a manufacturing process of an interposer according to the first embodiment of the present invention step by step;
- FIG. 1B is a diagram showing a manufacturing process of the interposer according to the first embodiment of the present invention step by step;
- FIG. 1C is a diagram showing a manufacturing process of the interposer according to the first embodiment of the present invention step by step;
- FIG. 1D is a diagram showing a manufacturing process of the interposer according to the first embodiment of the present invention step by step;
- FIG. 2 is a diagram showing a manufacturing process of an interposer according to the second embodiment of the present invention.
- FIG. 3A is a diagram to show a shape of a through hole to which the third embodiment of the present invention is applied;
- FIG. 3B is a diagram showing a shape of the through hole to which the third embodiment of the present invention is applied;
- FIG. 4A is a diagram showing a manufacturing process of an interposer according to the forth embodiment of the present invention step by step;
- FIG. 4B is a diagram showing a manufacturing process of the interposer according to the fourth embodiment of the present invention step by step;
- FIG. 4C is a diagram showing a manufacturing process of the interposer according to the forth embodiment of the present invention step by step;
- FIG. 4D is a diagram showing a manufacturing process of the interposer according to the forth embodiment of the present invention step by step;
- FIG. 5 is a cross sectional view showing a through hole on a substrate of an interposer according to the fifth embodiment of the present invention.
- FIG. 6 is a cross sectional view showing a through hole on a substrate of an interposer according to the sixth embodiment of the present invention.
- FIG. 7 is a perspective view showing a substrate of the interposer which has the cross sectional structure shown in FIG. 6 ;
- FIG. 8A is a cross sectional view showing a through hole of an interposer according to the seventh embodiment of the present invention.
- FIG. 8B is a diagram showing a manufacturing process of the through hole for the interposer according to the seventh embodiment of the present invention.
- FIG. 9 is a diagram to explain a problem of an interposer in the prior art technology.
- FIG. 1A - FIG. 1D are diagrams to show step by step a manufacturing process of an interposer according to the first embodiment of the present invention.
- a silicon substrate 10 having a front surface 11 and a back surface 12 is prepared, and a through hole 13 is opened on the substrate ( FIG. 1A ).
- the through hole 13 may be formed having a shape whose center portion is concave as shown in FIG. 1A as the interposer in the prior art.
- an insulating film which is not shown in the drawing, is formed on the substrate 10 including inside of the through hole 13 .
- This insulating film may be made of SiO2, SiN and the like and is formed by sputtering, CVD or oxidization.
- Ti layer (not shown) as a barrier layer is formed by sputtering and the like around the through hole 13 where the insulating layer is formed on the back surface 12 of the substrate 10 .
- a seed layer 14 (a base layer for an electrode to flow current for electroplating) made out of Cu is formed on the barrier layer by sputtering and the like ( FIG. 1B ).
- An electroplated coating is performed from the back surface 12 based on the Cu seed layer 14 . This electroplated coating is performed till an edge surface of the electroplating meets to close the through hole 13 at the back surface 12 so as to form an electrode layer for the electroplated coating of the electroplated coating layer 15 made out of Cu ( FIG. 1C ).
- an electroplated coating of Cu is performed to the front surface 11 utilizing the electroplated coating layer 15 of Cu as an electrode.
- an electroplated coating layer of Cu grows in a direction shown by an arrow in FIG. 1D , and an electroplated coating layer 16 is prepared ( FIG. 1D ).
- the through hole 13 can be made as the conducting layer of Cu without generating the void inside of the through hole even when the concave shaped hole is formed inside of the through hole 13 .
- this layer can be omitted.
- FIG. 2 is a diagram to show a manufacturing process of an interposer according to the second embodiment corresponding to FIG. 1D of the first embodiment, and the interposer has basically the same structure as shown in FIG. 1 .
- a through hole 23 is formed on a silicon substrate 20 , and the through hole 23 is filled with a seed layer 24 , an electrode layer 25 for electroplated coating and electroplated coating layer 26 .
- the seed layer and the electroplated coating layer made out of Cu are formed on the silicon substrate
- the seed layer 24 , the electrode layer 25 for electroplating and the electroplated coating layer 26 are made out of not only Cu but any material such as Ni, Cr, Au, Ag and the like as far as the electroplated coating can be performed.
- the material for the seed layer 24 , the electrode layer 25 for electroplated coating and the electroplated coating layer 26 may be different from one another.
- the seed layer may be made out of Cu and the electroplating of Au may be performed utilizing the seed layer as the electrode layer for electroplated coating.
- FIG. 3 is a diagram to show a shape of the through hole to which an interposer according to the third embodiment of the present invention is applied.
- the present invention is applied to the through holes having the shape whose center portion becomes concave, the present invention can be applied to the substrate 30 with the through hole 31 having a cylindrical shape ( FIG. 3A ) and the through hole 32 having a diameter which becomes smaller in succession as the hole goes from the front surface to the back surface ( FIG. 3B ).
- the explanation is made on the cases in which filling of the conducting material into the through hole is performed by electroplated coating, the present invention should not be restricted to these examples, the filling may be performed by electroless plated coating.
- FIG. 4A - FIG. 4D are diagrams to show step by step a manufacturing process of an interposer according to the fourth embodiment of the present invention.
- a silicon substrate 40 having a front surface 41 and a back surface 45 is prepared ( FIG. 4A ).
- a front surface hole 42 is formed which has a diameter that becomes smaller in succession as it goes into inside at a predetermined position on the front surface 41 of the substrate 40 by dry etching from the front surface 41 .
- the etching is performed with appropriate combination of etching conditions of the isotropic etching and the anisotropic etching.
- a back surface hole 46 is formed which has diameter that becomes smaller in succession as it goes into inside on the back surface 45 of the substrate 40 by the same manner from the back surface 45 , and center axis of the both holes are made substantially into a line at the center portion of the substrate 40 .
- a through hole 49 is formed having a diameter that becomes smaller in succession as it goes into inside from the front surface 41 and the back surface 45 on the substrate 40 ( FIG. 4B ).
- an insulating film which is not shown in the drawing, is formed on the substrate 40 including inside of the through hole 49 .
- This insulating film may be made out of SiO2, SiN and the like and is formed by sputtering, CVD or oxidization.
- the seed layers 43 , 47 to be seeds of the electroplated coating layers are formed inside of the through hole 46 , 49 and at an adjoining area of the front surface 41 and the back surface 45 around the through hole 46 , 49 on the insulating film by sputtering ( FIG. 4C ).
- the through hole 46 , 49 has not the shape whose center portion becomes concave as in the prior art technology, the seed layers 43 , 47 can be formed easily inside of the through hole 46 , 49 and around the opening of the through hole 46 , 49 of the front surface 41 and the back surface 45 continuing from inside.
- the electroplated coating or the electroless-plated coating is performed on the through hole 46 , 49 based on the seed layer 43 , 47 , and the conducting layer 44 made of Cu and the like is formed ( FIG. 4D ).
- the interposer which has the conducting layer without any generation of the void inside of the through hole 46 , 49 can be formed utilizing simple manufacturing process.
- the similar through hole having slopes inside may be formed by the wet etching.
- the wet etching there may be a problem that a slope of the through hole becomes too broad to get a predetermined shape of the through hole.
- the dry etching the through hole with a predetermined shape can be formed because the manufacturing control of the slope of the through hole is easy.
- FIG. 5 is a cross sectional view to show a through hole on the substrate of an interposer according to the fifth embodiment of the present invention corresponding to FIG. 4B of the fourth embodiment.
- the explanation is made in a case in which etching is performed from both sides of the silicon substrate 40 .
- a through hole 51 whose diameter becomes smaller as it goes inside from only one surface of the front surface or the back surface of the substrate 50 , is formed as shown in FIG. 5 by performing the etching only from the front surface of the silicon substrate 50 .
- the through hole 51 is made to be conductive by filling a conductive material inside of the through hole 51 by the same method as shown in FIG. 4A to FIG. 4D .
- the seed layer and the conductive layer based on the seed layer can be formed easily as in the fourth embodiment, and the same effect can be obtained as the fourth embodiment.
- FIG. 6 is a cross sectional view to show a through hole on the substrate 60 of an interposer according to the sixth embodiment of the present invention corresponding to FIG. 4B of the fourth embodiment.
- the holes 63 , 64 are formed whose diameters become respectively smaller as they go inside from the front surface 61 and the back surface 62 on the substrate 60 similar to the fourth embodiment, however, the diameters of them are different at the front surface 61 and the back surface 62 .
- the substrate 60 has a thickness “t”
- the hole on the front surface 61 has a diameter “a”
- the hole on the back surface 62 has a diameter “b” where a ⁇ b.
- the hole 63 on the front surface 61 has a depth “t 1 ” and the hole 64 on the back surface 62 has a depth “t 2 ” to the inside of the hole.
- a step portion 68 is formed inside of the substrate 60 .
- etching for different diameters may be performed from both of the front surface 61 and the back surface 62 similar to the fourth embodiment so as to form the front side hole 63 and the back side hole 64 with different diameters and to form the through hole 69 at any position whereby a structure without the step portion 68 may be formed as shown by the dotted line in the drawing.
- the inside of the through hole 69 is filled with the conducting layer.
- FIG. 7 is a perspective view to show the substrate 60 of the interposer which has the cross sectional structure shown in FIG. 6 .
- wiring area 67 can be made wider at the front surface 61 than at the back surface 62 .
- wiring rules for the front surface 61 and the back surface 62 can be independently settled, and wider degree of freedom for designing a wiring width and a wiring layout can be obtained on the front surface 61 .
- size of the opening portion of the through hole 69 is designed larger at the back surface 62 , process window for a through wiring can be expanded such that electroplating liquid penetrates well, the aspect ratio of the through hole becomes small, and the like.
- the wiring 65 in FIG. 7 is performed via terminals 66 b , 66 c which are formed in the pads 63 b , 63 c formed on the surface of the conducting layer filled in the hole 63 .
- FIG. 8A is a diagram to show a cross sectional structure of the substrate 70 in this embodiment of the present invention.
- the through hole 76 has semispherical opening portions 72 , 74 on the front surface 71 and the back surface 75 of the substrate 70 and a cylindrical hole 73 is formed at the central portion of the through hole 76 .
- the through hole 76 By forming the through hole 76 with the above described shape, penetration of the electroplating liquid is improved and improvement of adhesion of the electroplated coating can be expected. Further, suppression of peeling of the adhered electroplated coating can be expected.
- the conducting hole is completed by filling of the through hole 76 with the conductive material utilizing the electroplated coating and the like similar to the embodiments described above.
- FIG. 8B is a diagram to show a manufacturing process of the through hole 76 shown in FIG. 8A .
- a resist 77 is located on the surface 71 of the substrate 70 , and the opening portion is formed on a predetermined position to perform isotropic etching.
- the semispherical opening portion 72 is formed on the front surface 71 side.
- the semispherical opening portion 74 on the back surface 75 side is also formed.
- the anisotropic etching is performed to form the cylindrical hole 73 .
- the conducting layers are formed utilizing the electroplated coating based on the seed layer
- the present invention should not be restricted to these embodiments, and the conducting layer may be formed only by the seed layer.
- the manufacturing method of the interposer in accordance with the present invention can be utilized advantageously as a manufacturing method of the interposer in which the void is not generated in the through hole because the conducting layer by the electroplated coating is surely formed at the through hole from one side of the substrate to another side.
Abstract
In a manufacturing method for an interposer, a seed layer is formed at an opening portion in a through hole on back surface side of a substrate, an electrode layer for electroplated coating is formed based on the seed layer, and an electroplated coating layer is formed to fill the through hole from the electrode layer for electroplated coating layer to a front surface side. As a result, a manufacturing method for an interposer is provided in which the manufacturing process is simple and the void is not generated inside of the through hole.
Description
- The present invention relates to an interposer and a manufacturing method for the same, and more particularly, relates to an interposer and a manufacturing method for the same in which a pinch-off is not generated in a through hole.
- An interposer in which a conducting hole is prepared on a substrate in the prior art technology, is disclosed, for example, in Japanese Unexamined Patent Publication 2004-165291.
- According to the above described Unexamined Patent Publication, a structure is disclosed wherein a conducting member is formed such that a diameter of the conducting member becomes larger or smaller in succession or in incremental steps from one side to another side in the ceramic substrate which has laminated greensheets of a plurality of through holes arranged in a predetermined pattern and filled with the conducting member, and a plurality of another through holes arranged in the same pattern having different diameters.
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FIG. 9 is a cross sectional view to show asilicon substrate 80 explaining a problem in the prior art technology when an interposer is manufactured by arranging a conducting hole on thesilicon substrate 80. Referring toFIG. 9 , in the prior art technology, firstly a throughhole 91 is formed on thesilicon substrate 80. At this point, thethrough hole 91 becomes a cylindrical shape whose center portion is concave as shown inFIG. 9 rather than straight. - For the
through hole 91,seed layers hole 91 from both of afront surface 81 and aback surface 82. Then, conductinglayers seed layers - The interposer in the prior art technology is constituted as described above. According to the Unexamined Japanese Patent Publication 2004-165291, because the ceramic substrate is utilized and drilling or sand blasting is employed to open holes on the substrate, there is a problem that a diameter of the through hole cannot be made small. Moreover, because it is necessary to agglutinate two ceramic substrates, there is a problem that a manufacturing process becomes complicated.
- Further, when the through hole is formed on the silicon substrate, because the center portion of the through hole has the concave shape and diameter of the through hole becomes larger as it goes inside from the front surface or the back surface, the seed layer cannot be formed well inside even when the seed layer is intended to be formed inside of the through hole. As a result, even when the conducting layer is grown from the seed layer by the electroplated coating and the like, because the conducting layer is not grown enough, so called “void” 92 is formed inside of the through
hole 91, in which the conducting layer does not exist. This causes a problem that the throughhole 91 is not conductive and the manufacturing precision is poor. - The present invention is made to solve the above described problems and it is an object of the present invention to provide an interposer and manufacturing method for the same in which the manufacturing process is simple and the void is not generated inside of the through hole.
- In accordance with one aspect of the present invention an interposer includes: a substrate which has one surface and another surface opposed to the one surface; a through hole being formed from the one surface to the another surface; a seed layer which is formed at an opening portion of the through hole on the one surface side of the substrate; an electrode layer for electroplated coating which is formed by covering the seed layer; and an electroplated coating layer which extends from the electrode layer for electroplated coating to the another surface side to fill the through hole.
- Because the interposer according to the present invention includes the seed layer which is formed at the opening portion of the through hole on the one surface side of the substrate, the electrode layer for electroplated coating which is formed by covering the seed layer, and the electroplated coating layer which extends from the electrode layer for electroplated coating to the another surface side to fill the through hole, the electroplated coating layer can be surely formed from the seed layer on the one surface side of the substrate to the another surface side.
- As a result, an interposer can be provided in which the manufacturing process is simple and the void is not generated inside of the through hole.
- The through hole may have a shape whose center portion is concave. Further, the seed layer, the electrode layer for electroplated coating and the electroplated coating layer may be made out of the same material, or may be different materials.
- In accordance with another aspect of the present invention, a manufacturing method for interposer includes steps of: preparing a substrate which has one surface and another surface; forming a through hole on the substrate; forming a seed layer at an opening portion of the through hole on the one surface side; and filling the through hole by forming an electroplated coating layer from the seed layer on the one surface side to the another surface side.
- The manufacturing method for the interposer according to the present invention includes steps of forming a seed layer at an opening portion of the through hole on the one surface side and filling the through hole by forming an electroplated coating layer from the seed layer on the one surface side to the another surface side. Because the conducting layer is surely formed by the electroplating from the one surface side of the through hole on the substrate to another surface side, the void is not generated inside of the through hole.
- As a result, a method for manufacturing the interposer can be provided that is simple and the void is not generated inside of the through hole.
- Preferably, the step of filling the through hole by forming an electroplated coating layer from the seed layer on the one surface side to the another surface side includes steps of forming an electrode layer for electroplated coating to close the through hole at the one surface side, and forming the electroplated coating layer utilizing the electrode layer.
- More preferably, the step of forming the through hole includes a step of forming a through hole whose center portion becomes concave.
- At this point, the seed layer, the electrode layer for electroplated coating and the electroplated coating layer may be made out of the same material, or different materials.
- In accordance with still another aspect of the present invention, an interposer includes a through hole which is made from a surface of one side of the substrate to a surface of another side, the through hole has a first opening area at the surface of the one side, and has a second opening area at the surface of the another side, and both of the first opening area and the second opening area become smaller in succession as they go from the surfaces to inside, and the interposer also includes a conducting layer which is formed in the through hole.
- Because the interposer has the through hole whose opening area becomes smaller in succession as they go from the surfaces to inside, the through hole can be easily filled by the conducting layer.
- As a result of this, an interposer whose manufacturing process is simple and the void is not generated inside of the through hole, can be provided.
- Preferably, areas of the first opening and the second opening are different.
- Because the values of the opening area on one surface side and another surface side are different, the wiring rules for the both surfaces can be independently settled, and wider degree of freedom for designing a wiring width and a wiring layout can be obtained.
- More preferably, the through hole has a cylindrical portion between the surface of the one side and the surface of another side of the substrate.
- In accordance with still another aspect of the present invention, an interposer has a through hole, in which the through hole is made from a surface of one side of the substrate to a surface of another side; the through hole has a first opening area at the surface of the one side, and the first opening area becomes smaller in succession as the hole goes from the surface of the one side to the surface of the another side; and a conducting layer is formed in the through hole.
- In accordance with still another aspect of the present invention, a manufacturing method for the interposer including steps of: preparing a substrate which has one surface and another surface opposed to the one surface; forming a through hole by performing an etching such that an opening area of the through hole becomes smaller in succession as the hole goes from the surface of the one side and from the surface of the another side to inside; and forming a conducting layer in the through hole.
- Because in this manufacturing method for interposer the through hole is formed by performing an etching such that an opening area of the through hole becomes smaller in succession as it goes from the surface of the one side and from the surface of the another side to inside, the conducting layer can be formed without any discontinuity inside of the through hole when the conducting layer is formed in the through hole.
- As a result, a manufacturing method for the interposer which is simple and the void is not generated inside of the through hole, can be provided.
- Preferably, the etching is performed such that the area of the opening of the surface on the one side and the area of the opening of the surface on another side are different.
- More preferably, the manufacturing method further includes a step of forming a through hole whose opening area is constant from the surface of the one side to the surface of another side.
- In accordance with still another aspect of the present invention, a manufacturing method for interposer including steps of: preparing a substrate which has one surface and another surface opposed to the one surface; forming a through hole by performing an etching such that an opening area of the through hole becomes smaller in succession as the hole goes from the surface of the one side to the surface of the another side; and forming a conducting layer in the through hole.
- At this point, it is preferable that the etching is performed utilizing dry etching. The conducting layer may be formed utilizing evaporation, electroplated coating or electroless plating.
-
FIG. 1A is a diagram showing a manufacturing process of an interposer according to the first embodiment of the present invention step by step; -
FIG. 1B is a diagram showing a manufacturing process of the interposer according to the first embodiment of the present invention step by step; -
FIG. 1C is a diagram showing a manufacturing process of the interposer according to the first embodiment of the present invention step by step; -
FIG. 1D is a diagram showing a manufacturing process of the interposer according to the first embodiment of the present invention step by step; -
FIG. 2 is a diagram showing a manufacturing process of an interposer according to the second embodiment of the present invention; -
FIG. 3A is a diagram to show a shape of a through hole to which the third embodiment of the present invention is applied; -
FIG. 3B is a diagram showing a shape of the through hole to which the third embodiment of the present invention is applied; -
FIG. 4A is a diagram showing a manufacturing process of an interposer according to the forth embodiment of the present invention step by step; -
FIG. 4B is a diagram showing a manufacturing process of the interposer according to the fourth embodiment of the present invention step by step; -
FIG. 4C is a diagram showing a manufacturing process of the interposer according to the forth embodiment of the present invention step by step; -
FIG. 4D is a diagram showing a manufacturing process of the interposer according to the forth embodiment of the present invention step by step; -
FIG. 5 is a cross sectional view showing a through hole on a substrate of an interposer according to the fifth embodiment of the present invention; -
FIG. 6 is a cross sectional view showing a through hole on a substrate of an interposer according to the sixth embodiment of the present invention; -
FIG. 7 is a perspective view showing a substrate of the interposer which has the cross sectional structure shown inFIG. 6 ; -
FIG. 8A is a cross sectional view showing a through hole of an interposer according to the seventh embodiment of the present invention; -
FIG. 8B is a diagram showing a manufacturing process of the through hole for the interposer according to the seventh embodiment of the present invention; and -
FIG. 9 is a diagram to explain a problem of an interposer in the prior art technology. - Hereinafter, the first embodiment according to the present invention will be described with reference to the accompanying drawings.
FIG. 1A -FIG. 1D are diagrams to show step by step a manufacturing process of an interposer according to the first embodiment of the present invention. Referring toFIG. 1A -FIG. 1D , firstly asilicon substrate 10 having afront surface 11 and aback surface 12 is prepared, and a throughhole 13 is opened on the substrate (FIG. 1A ). At this point, the throughhole 13 may be formed having a shape whose center portion is concave as shown inFIG. 1A as the interposer in the prior art. In this state, then, an insulating film which is not shown in the drawing, is formed on thesubstrate 10 including inside of the throughhole 13. This insulating film may be made of SiO2, SiN and the like and is formed by sputtering, CVD or oxidization. - Next, Ti layer (not shown) as a barrier layer is formed by sputtering and the like around the through
hole 13 where the insulating layer is formed on theback surface 12 of thesubstrate 10. Then, a seed layer 14 (a base layer for an electrode to flow current for electroplating) made out of Cu is formed on the barrier layer by sputtering and the like (FIG. 1B ). An electroplated coating is performed from theback surface 12 based on theCu seed layer 14. This electroplated coating is performed till an edge surface of the electroplating meets to close the throughhole 13 at theback surface 12 so as to form an electrode layer for the electroplated coating of the electroplatedcoating layer 15 made out of Cu (FIG. 1C ). - Next, an electroplated coating of Cu is performed to the
front surface 11 utilizing the electroplatedcoating layer 15 of Cu as an electrode. By these steps, an electroplated coating layer of Cu grows in a direction shown by an arrow inFIG. 1D , and an electroplatedcoating layer 16 is prepared (FIG. 1D ). - As described above, according to this embodiment, the through
hole 13 can be made as the conducting layer of Cu without generating the void inside of the through hole even when the concave shaped hole is formed inside of the throughhole 13. - At this point in the embodiment described above, though Ti is utilized as the barrier layer, this layer can be omitted.
- Next, an explanation will be given on the second embodiment.
FIG. 2 is a diagram to show a manufacturing process of an interposer according to the second embodiment corresponding toFIG. 1D of the first embodiment, and the interposer has basically the same structure as shown inFIG. 1 . Referring toFIG. 2 , in this second embodiment, a throughhole 23 is formed on asilicon substrate 20, and the throughhole 23 is filled with aseed layer 24, anelectrode layer 25 for electroplated coating and electroplatedcoating layer 26. - Though in the first embodiment, the seed layer and the electroplated coating layer made out of Cu are formed on the silicon substrate, in this embodiment the
seed layer 24, theelectrode layer 25 for electroplating and the electroplatedcoating layer 26 are made out of not only Cu but any material such as Ni, Cr, Au, Ag and the like as far as the electroplated coating can be performed. The material for theseed layer 24, theelectrode layer 25 for electroplated coating and the electroplatedcoating layer 26 may be different from one another. For example, the seed layer may be made out of Cu and the electroplating of Au may be performed utilizing the seed layer as the electrode layer for electroplated coating. - Next, an explanation will be given on the third embodiment of the present invention.
FIG. 3 is a diagram to show a shape of the through hole to which an interposer according to the third embodiment of the present invention is applied. Though in the first and the second embodiments, the present invention is applied to the through holes having the shape whose center portion becomes concave, the present invention can be applied to thesubstrate 30 with the throughhole 31 having a cylindrical shape (FIG. 3A ) and the throughhole 32 having a diameter which becomes smaller in succession as the hole goes from the front surface to the back surface (FIG. 3B ). - Though in the above described embodiments, the explanation is made on the embodiments utilizing the silicon substrate as a material for the substrate, these embodiments should not be considered as the restricted examples, and the present invention is applicable to the insulating substrate made out of such as glass and sapphire. In these cases, forming of the insulating layer described above is not necessary.
- Though in the embodiments described above, the explanation is made on the cases in which filling of the conducting material into the through hole is performed by electroplated coating, the present invention should not be restricted to these examples, the filling may be performed by electroless plated coating.
- Next, an explanation will be given on the fourth embodiment of the present invention.
FIG. 4A -FIG. 4D are diagrams to show step by step a manufacturing process of an interposer according to the fourth embodiment of the present invention. Referring toFIG. 4A -FIG. 4D , in this embodiment firstly, asilicon substrate 40 having afront surface 41 and aback surface 45 is prepared (FIG. 4A ). Then, afront surface hole 42 is formed which has a diameter that becomes smaller in succession as it goes into inside at a predetermined position on thefront surface 41 of thesubstrate 40 by dry etching from thefront surface 41. To be more specific, the etching is performed with appropriate combination of etching conditions of the isotropic etching and the anisotropic etching. - Next, a
back surface hole 46 is formed which has diameter that becomes smaller in succession as it goes into inside on theback surface 45 of thesubstrate 40 by the same manner from theback surface 45, and center axis of the both holes are made substantially into a line at the center portion of thesubstrate 40. As described above, a throughhole 49 is formed having a diameter that becomes smaller in succession as it goes into inside from thefront surface 41 and theback surface 45 on the substrate 40 (FIG. 4B ). - In this state, then, an insulating film which is not shown in the drawing, is formed on the
substrate 40 including inside of the throughhole 49. This insulating film may be made out of SiO2, SiN and the like and is formed by sputtering, CVD or oxidization. - Then the seed layers 43, 47 to be seeds of the electroplated coating layers are formed inside of the through
hole front surface 41 and theback surface 45 around the throughhole FIG. 4C ). At this point, because the throughhole hole hole front surface 41 and theback surface 45 continuing from inside. - Next, the electroplated coating or the electroless-plated coating is performed on the through
hole seed layer conducting layer 44 made of Cu and the like is formed (FIG. 4D ). As a result, the interposer which has the conducting layer without any generation of the void inside of the throughhole - Though the explanation is made about the case in which only one through
hole holes - At this point, it is contemplated that the similar through hole having slopes inside may be formed by the wet etching. However by the wet etching, there may be a problem that a slope of the through hole becomes too broad to get a predetermined shape of the through hole. To the contrary, by the dry etching, the through hole with a predetermined shape can be formed because the manufacturing control of the slope of the through hole is easy.
- Next, an explanation will be given on the fifth embodiment of the present invention.
FIG. 5 is a cross sectional view to show a through hole on the substrate of an interposer according to the fifth embodiment of the present invention corresponding toFIG. 4B of the fourth embodiment. In the fourth embodiment, the explanation is made in a case in which etching is performed from both sides of thesilicon substrate 40. In this embodiment a throughhole 51 whose diameter becomes smaller as it goes inside from only one surface of the front surface or the back surface of thesubstrate 50, is formed as shown inFIG. 5 by performing the etching only from the front surface of thesilicon substrate 50. Further, the throughhole 51 is made to be conductive by filling a conductive material inside of the throughhole 51 by the same method as shown inFIG. 4A toFIG. 4D . - Even in this embodiment, the seed layer and the conductive layer based on the seed layer, can be formed easily as in the fourth embodiment, and the same effect can be obtained as the fourth embodiment.
- Next, an explanation will be given on the further different embodiment of the present invention.
FIG. 6 is a cross sectional view to show a through hole on thesubstrate 60 of an interposer according to the sixth embodiment of the present invention corresponding toFIG. 4B of the fourth embodiment. - In this embodiment, the
holes front surface 61 and theback surface 62 on thesubstrate 60 similar to the fourth embodiment, however, the diameters of them are different at thefront surface 61 and theback surface 62. In other words, referring toFIG. 6 , thesubstrate 60 has a thickness “t”, the hole on thefront surface 61 has a diameter “a” and the hole on theback surface 62 has a diameter “b” where a<b. Thehole 63 on thefront surface 61 has a depth “t1” and thehole 64 on theback surface 62 has a depth “t2” to the inside of the hole. As a result, astep portion 68 is formed inside of thesubstrate 60. At this point, etching for different diameters may be performed from both of thefront surface 61 and theback surface 62 similar to the fourth embodiment so as to form thefront side hole 63 and theback side hole 64 with different diameters and to form the throughhole 69 at any position whereby a structure without thestep portion 68 may be formed as shown by the dotted line in the drawing. After manufacturing as described above, the inside of the throughhole 69 is filled with the conducting layer. -
FIG. 7 is a perspective view to show thesubstrate 60 of the interposer which has the cross sectional structure shown inFIG. 6 . Referring toFIG. 7 in this embodiment, because diameters of the throughhole 69 are determined at thefront surface 61 and theback surface 62 as described above,wiring area 67 can be made wider at thefront surface 61 than at theback surface 62. By this arrangement, wiring rules for thefront surface 61 and theback surface 62 can be independently settled, and wider degree of freedom for designing a wiring width and a wiring layout can be obtained on thefront surface 61. Moreover, because size of the opening portion of the throughhole 69 is designed larger at theback surface 62, process window for a through wiring can be expanded such that electroplating liquid penetrates well, the aspect ratio of the through hole becomes small, and the like. - At this point, the
wiring 65 inFIG. 7 is performed viaterminals pads hole 63. - Next, an explanation will be given on the seventh embodiment of the present invention.
FIG. 8A is a diagram to show a cross sectional structure of thesubstrate 70 in this embodiment of the present invention. Referring toFIG. 8A in this embodiment, the throughhole 76 hassemispherical opening portions front surface 71 and theback surface 75 of thesubstrate 70 and acylindrical hole 73 is formed at the central portion of the throughhole 76. - By forming the through
hole 76 with the above described shape, penetration of the electroplating liquid is improved and improvement of adhesion of the electroplated coating can be expected. Further, suppression of peeling of the adhered electroplated coating can be expected. - Next, the conducting hole is completed by filling of the through
hole 76 with the conductive material utilizing the electroplated coating and the like similar to the embodiments described above. - Next, explanation will be made how to manufacture the through
hole 76 in this embodiment.FIG. 8B is a diagram to show a manufacturing process of the throughhole 76 shown inFIG. 8A . Referring toFIG. 8B , a resist 77 is located on thesurface 71 of thesubstrate 70, and the opening portion is formed on a predetermined position to perform isotropic etching. By this, thesemispherical opening portion 72 is formed on thefront surface 71 side. Similarly, thesemispherical opening portion 74 on theback surface 75 side is also formed. Then, the anisotropic etching is performed to form thecylindrical hole 73. - At this point, forming of the cylindrical hole in this embodiment may be applied to the above described respective embodiments.
- Though in the above described embodiments explanation is made on cases that circular or cylindrical through holes are utilized, the present invention should not be restricted to these embodiments, and a rectangular or a polygonal through hole may be used.
- Though in the above described embodiments, explanation is made on cases that the conducting layers are formed utilizing the electroplated coating based on the seed layer, the present invention should not be restricted to these embodiments, and the conducting layer may be formed only by the seed layer.
- Though in the above described embodiments, explanation is made on cases that filling of the conducting material into the through hole is performed by the electroplated coating, the present invention should not be restricted to these embodiments, and the filling may be performed by the electroless plating or the evaporation.
- Though in the above described embodiments, explanation is made on cases that forming of the through hole is performed by utilizing the dry etching, the present invention should not be restricted to these embodiments, and the forming may be performed by utilizing the wet etching.
- The manufacturing method of the interposer in accordance with the present invention can be utilized advantageously as a manufacturing method of the interposer in which the void is not generated in the through hole because the conducting layer by the electroplated coating is surely formed at the through hole from one side of the substrate to another side.
Claims (19)
1. An interposer comprising:
a substrate which has one surface, another surface opposed to said one surface, and a through hole passing through from said one surface to said another surface;
a seed layer which is formed at an opening portion of said through hole on said one surface side of said substrate;
an electrode layer for electroplated coating which is formed by covering said seed layer; and
an electroplated coating layer which extends from said electrode layer for electroplated coating to said another surface side to fill said through hole.
2. The interposer according to claim 1 , wherein said through hole has a shape whose center portion is concave.
3. The interposer according to claim 1 , wherein said seed layer, said electrode layer for electroplated coating and said electroplated coating layer are made out of the same material.
4. The interposer according to claim 1 , wherein at least two of said seed layer, said electrode layer for electroplated coating and said electroplated coating layer are made out of different materials.
5. A method for manufacturing an interposer comprising steps of:
preparing a substrate which has one surface and another surface opposed to said one surface;
forming a through hole on said substrate;
forming a seed layer at an opening portion of said through hole on said one surface side; and
filling said through hole by forming an electroplated coating layer from said seed layer on said one surface side to said another surface side.
6. The method for manufacturing an interposer according to claim 5 , wherein said step of filling said through hole by forming an electroplated coating layer from said seed layer on said one surface side to said another surface side includes steps of:
forming an electrode layer for electroplated coating to close said through hole at said one surface side; and
forming said electroplated coating layer utilizing said electrode layer.
7. The method for manufacturing an interposer according to claim 5 , wherein said step of forming the through hole includes a step of forming a through hole whose center portion becomes concave.
8. The method for manufacturing an interposer according to claim 6 , wherein said seed layer, said electrode layer for electroplated coating and said electroplated coating layer are made out of the same material.
9. The method for manufacturing an interposer according to claim 6 , wherein at least two of said seed layer, said electrode layer for electroplated coating and said electroplated coating layer are made out of different materials.
10. An interposer having a through hole wherein:
said through hole is made from a surface of one side of said substrate to a surface of another side;
said through hole has a first opening area at said surface of said one side and the opening area becomes smaller in succession as the hole goes from said surface to inside and has a second opening area at said surface of said another side and the opening area becomes smaller in succession as the hole goes from said surface of another side to inside; and
a conducting layer is formed on said through hole.
11. The interposer according to claim 10 , wherein the first opening area and the second opening area are different.
12. The manufacturing method for the interposer according to claim 10 , wherein said through hole has a cylindrical hole part having the same opening area between said surfaces of said one side and said another side.
13. The interposer according to claim 1 , wherein said through hole has a smaller opening area in succession as it goes from said surface of said one side to said surface of said another side.
14. A method for manufacturing an interposer comprising steps of:
preparing a substrate which has one surface and another surface opposed to the one surface;
forming a through hole by performing an etching such that an opening area of said through hole becomes smaller in succession as the hole goes from said surface of said one side and from said surface of said another side to inside; and
forming a conducting layer in said through hole.
15. The method for manufacturing an interposer according to claim 14 , wherein said etching is performed such that said opening area of said surface on said one side and said opening area of said surface on said another side are different.
16. The method for manufacturing an interposer according to claim 14 further comprising a step of forming a through hole whose opening area at said surface of said one side is the same as that at said surface of said another side.
17. The method for manufacturing the interposer according to claim 5 , wherein said step of forming said through hole on said substrate is performed utilizing etching such that an opening area of said through hole becomes smaller in succession as the hole goes from one side of the substrate to another side.
18. The method for manufacturing an interposer according to claim 14 , wherein said etching is performed utilizing dry etching.
19. The method for manufacturing an interposer according to claim 14 , wherein said step of forming said conducting layer is performed utilizing evaporation, electroplated coating or electroless plating.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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JP2004-199785 | 2004-07-06 | ||
JP2004199870A JP4286733B2 (en) | 2004-07-06 | 2004-07-06 | Interposer and manufacturing method of interposer |
JP2004-199870 | 2004-07-06 | ||
JP2004199785A JP4298601B2 (en) | 2004-07-06 | 2004-07-06 | Interposer and manufacturing method of interposer |
PCT/JP2005/012424 WO2006004127A1 (en) | 2004-07-06 | 2005-07-05 | Interposer and interposer producing method |
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US11/631,635 Abandoned US20080067073A1 (en) | 2004-07-06 | 2005-07-05 | Interposer And Manufacturing Method For The Same |
US13/328,710 Abandoned US20120085655A1 (en) | 2004-07-06 | 2011-12-16 | Interposer and manufacturing method for the same |
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US (2) | US20080067073A1 (en) |
EP (1) | EP1783832A4 (en) |
KR (2) | KR100786156B1 (en) |
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WO (1) | WO2006004127A1 (en) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110188151A1 (en) * | 2010-02-01 | 2011-08-04 | Tdk Corporation | Thin-film magnetic head having a magnetic pole formed of a plating film |
US20130062210A1 (en) * | 2011-09-13 | 2013-03-14 | Hoya Corporation | Manufacturing method of substrate and manufacturing method of wiring substrate |
US8724832B2 (en) | 2011-08-30 | 2014-05-13 | Qualcomm Mems Technologies, Inc. | Piezoelectric microphone fabricated on glass |
US8811636B2 (en) | 2011-11-29 | 2014-08-19 | Qualcomm Mems Technologies, Inc. | Microspeaker with piezoelectric, metal and dielectric membrane |
US8824706B2 (en) | 2011-08-30 | 2014-09-02 | Qualcomm Mems Technologies, Inc. | Piezoelectric microphone fabricated on glass |
KR101849158B1 (en) | 2015-05-31 | 2018-04-16 | 기요카와 멕키 고교 가부시키가이샤 | Process for producing a wiring board |
US20180158695A1 (en) * | 2015-05-01 | 2018-06-07 | Sony Corporation | Manufacturing method and wiring substrate with through electrode |
JP2018163986A (en) * | 2017-03-24 | 2018-10-18 | 大日本印刷株式会社 | Through electrode substrate and manufacturing method of the same |
US10847444B2 (en) | 2016-09-05 | 2020-11-24 | Dai Nippon Printing Co., Ltd. | Through electrode substrate and semiconductor device |
US11152294B2 (en) * | 2018-04-09 | 2021-10-19 | Corning Incorporated | Hermetic metallized via with improved reliability |
US11760682B2 (en) | 2019-02-21 | 2023-09-19 | Corning Incorporated | Glass or glass ceramic articles with copper-metallized through holes and processes for making the same |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008066481A (en) * | 2006-09-06 | 2008-03-21 | Shinko Electric Ind Co Ltd | Package, semiconductor device, manufacturing method of package and manufacturing method of semiconductor device |
US8569876B2 (en) | 2006-11-22 | 2013-10-29 | Tessera, Inc. | Packaged semiconductor chips with array |
US9640437B2 (en) | 2010-07-23 | 2017-05-02 | Tessera, Inc. | Methods of forming semiconductor elements using micro-abrasive particle stream |
US8847380B2 (en) | 2010-09-17 | 2014-09-30 | Tessera, Inc. | Staged via formation from both sides of chip |
US8587126B2 (en) | 2010-12-02 | 2013-11-19 | Tessera, Inc. | Stacked microelectronic assembly with TSVs formed in stages with plural active chips |
US8736066B2 (en) * | 2010-12-02 | 2014-05-27 | Tessera, Inc. | Stacked microelectronic assemby with TSVS formed in stages and carrier above chip |
JP6690142B2 (en) * | 2015-07-09 | 2020-04-28 | 大日本印刷株式会社 | Through electrode substrate, method of manufacturing through electrode substrate, and interposer using through electrode substrate |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4847114A (en) * | 1984-01-26 | 1989-07-11 | Learonal, Inc. | Preparation of printed circuit boards by selective metallization |
US20020117399A1 (en) * | 2001-02-23 | 2002-08-29 | Applied Materials, Inc. | Atomically thin highly resistive barrier layer in a copper via |
US6828510B1 (en) * | 1999-06-02 | 2004-12-07 | Ibiden Co., Ltd. | Multilayer printed wiring board and method of manufacturing multilayer printed wiring board |
US20050103524A1 (en) * | 2003-11-13 | 2005-05-19 | Toshiki Naito | Double sided wired circuit board |
US7211899B2 (en) * | 2002-01-18 | 2007-05-01 | Fujitsu Limited | Circuit substrate and method for fabricating the same |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1212073A (en) * | 1981-02-02 | 1986-09-30 | Seizo Murayama | Impregnating anodic oxide film with polymerizable compound and polymerizing and resulting wiring board |
US5340947A (en) * | 1992-06-22 | 1994-08-23 | Cirqon Technologies Corporation | Ceramic substrates with highly conductive metal vias |
JP2000150701A (en) * | 1998-11-05 | 2000-05-30 | Shinko Electric Ind Co Ltd | Semiconductor device, connection board used therefor, and manufacture thereof |
US6461493B1 (en) * | 1999-12-23 | 2002-10-08 | International Business Machines Corporation | Decoupling capacitor method and structure using metal based carrier |
JP4703061B2 (en) * | 2001-08-30 | 2011-06-15 | 富士通株式会社 | Thin film circuit board manufacturing method and via forming board forming method |
JP4043873B2 (en) * | 2002-07-11 | 2008-02-06 | 大日本印刷株式会社 | Manufacturing method of multilayer wiring board |
JP4429585B2 (en) * | 2002-11-08 | 2010-03-10 | 富士通株式会社 | Selective insulation method and mounting substrate with through via |
JP2004165291A (en) * | 2002-11-11 | 2004-06-10 | Tokuyama Corp | Ceramic substrate with via hole and manufacturing method therefor |
US7161089B2 (en) * | 2002-12-04 | 2007-01-09 | Tdk Corporation | Electronic component |
JPWO2004103039A1 (en) * | 2003-05-19 | 2006-07-20 | 大日本印刷株式会社 | Double-sided wiring board and method for manufacturing double-sided wiring board |
US7681306B2 (en) * | 2004-04-28 | 2010-03-23 | Hymite A/S | Method of forming an assembly to house one or more micro components |
-
2005
- 2005-07-05 KR KR1020067004600A patent/KR100786156B1/en not_active IP Right Cessation
- 2005-07-05 US US11/631,635 patent/US20080067073A1/en not_active Abandoned
- 2005-07-05 KR KR1020077014093A patent/KR100786166B1/en not_active IP Right Cessation
- 2005-07-05 EP EP05765494A patent/EP1783832A4/en not_active Withdrawn
- 2005-07-05 WO PCT/JP2005/012424 patent/WO2006004127A1/en not_active Application Discontinuation
- 2005-07-06 TW TW094122867A patent/TW200614896A/en not_active IP Right Cessation
-
2011
- 2011-12-16 US US13/328,710 patent/US20120085655A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4847114A (en) * | 1984-01-26 | 1989-07-11 | Learonal, Inc. | Preparation of printed circuit boards by selective metallization |
US6828510B1 (en) * | 1999-06-02 | 2004-12-07 | Ibiden Co., Ltd. | Multilayer printed wiring board and method of manufacturing multilayer printed wiring board |
US20020117399A1 (en) * | 2001-02-23 | 2002-08-29 | Applied Materials, Inc. | Atomically thin highly resistive barrier layer in a copper via |
US7211899B2 (en) * | 2002-01-18 | 2007-05-01 | Fujitsu Limited | Circuit substrate and method for fabricating the same |
US20070155174A1 (en) * | 2002-01-18 | 2007-07-05 | Fijitsu Limited | Circuit substrate and method for fabricating the same |
US20050103524A1 (en) * | 2003-11-13 | 2005-05-19 | Toshiki Naito | Double sided wired circuit board |
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8248728B2 (en) | 2010-02-01 | 2012-08-21 | Tdk Corporation | Thin-film magnetic head having a magnetic pole formed of a plating film |
US20110188151A1 (en) * | 2010-02-01 | 2011-08-04 | Tdk Corporation | Thin-film magnetic head having a magnetic pole formed of a plating film |
US8824706B2 (en) | 2011-08-30 | 2014-09-02 | Qualcomm Mems Technologies, Inc. | Piezoelectric microphone fabricated on glass |
US8724832B2 (en) | 2011-08-30 | 2014-05-13 | Qualcomm Mems Technologies, Inc. | Piezoelectric microphone fabricated on glass |
US20130062210A1 (en) * | 2011-09-13 | 2013-03-14 | Hoya Corporation | Manufacturing method of substrate and manufacturing method of wiring substrate |
US10003888B2 (en) | 2011-11-29 | 2018-06-19 | Snaptrack, Inc | Transducer with piezoelectric, conductive and dielectric membrane |
US8811636B2 (en) | 2011-11-29 | 2014-08-19 | Qualcomm Mems Technologies, Inc. | Microspeaker with piezoelectric, metal and dielectric membrane |
US10735865B2 (en) | 2011-11-29 | 2020-08-04 | Snaptrack, Inc. | Transducer with piezoelectric, conductive and dielectric membrane |
US20180158695A1 (en) * | 2015-05-01 | 2018-06-07 | Sony Corporation | Manufacturing method and wiring substrate with through electrode |
US10256117B2 (en) * | 2015-05-01 | 2019-04-09 | Sony Corporation | Manufacturing method and wiring substrate with through electrode |
KR101849158B1 (en) | 2015-05-31 | 2018-04-16 | 기요카와 멕키 고교 가부시키가이샤 | Process for producing a wiring board |
US10847444B2 (en) | 2016-09-05 | 2020-11-24 | Dai Nippon Printing Co., Ltd. | Through electrode substrate and semiconductor device |
US11728243B2 (en) | 2016-09-05 | 2023-08-15 | Dai Nippon Printing Co., Ltd. | Through electrode substrate and semiconductor device |
JP2018163986A (en) * | 2017-03-24 | 2018-10-18 | 大日本印刷株式会社 | Through electrode substrate and manufacturing method of the same |
JP7022365B2 (en) | 2017-03-24 | 2022-02-18 | 大日本印刷株式会社 | Through Silicon Via Board and Its Manufacturing Method |
US11152294B2 (en) * | 2018-04-09 | 2021-10-19 | Corning Incorporated | Hermetic metallized via with improved reliability |
US11201109B2 (en) | 2018-04-09 | 2021-12-14 | Corning Incorporated | Hermetic metallized via with improved reliability |
US11760682B2 (en) | 2019-02-21 | 2023-09-19 | Corning Incorporated | Glass or glass ceramic articles with copper-metallized through holes and processes for making the same |
Also Published As
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US20120085655A1 (en) | 2012-04-12 |
WO2006004127A1 (en) | 2006-01-12 |
KR20060060722A (en) | 2006-06-05 |
TW200614896A (en) | 2006-05-01 |
KR20070086502A (en) | 2007-08-27 |
KR100786156B1 (en) | 2007-12-18 |
EP1783832A1 (en) | 2007-05-09 |
KR100786166B1 (en) | 2007-12-21 |
TWI301392B (en) | 2008-09-21 |
EP1783832A4 (en) | 2008-07-09 |
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