US20060289921A1 - Method of manufacturing a capacitor for semiconductor device - Google Patents

Method of manufacturing a capacitor for semiconductor device Download PDF

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US20060289921A1
US20060289921A1 US11/514,248 US51424806A US2006289921A1 US 20060289921 A1 US20060289921 A1 US 20060289921A1 US 51424806 A US51424806 A US 51424806A US 2006289921 A1 US2006289921 A1 US 2006289921A1
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capacitor
dielectric layer
thin dielectric
indicates
buffer layer
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US11/514,248
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Jung-hyun Lee
Yo-sep Min
Young-Jin Cho
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3141—Deposition using atomic layer deposition techniques [ALD]
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/65—Electrodes comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD

Definitions

  • the present invention relates to a capacitor for a semiconductor device. More particularly, the present invention relates to a capacitor for use in a semiconductor device having an ability to effectively suppress the oxidization of a material for an electrode when forming a thin dielectric layer, a manufacturing method thereof, and an electronic device that employs the capacitor and thus may be highly integrated.
  • High-dielectric materials include tantalum oxide (TaO) and strontium titanium oxide (SrTiO 3 ), which have a larger permittivity than low-dielectric materials such as SiO 2 and Si 3 N 4 .
  • TaO tantalum oxide
  • SrTiO 3 strontium titanium oxide
  • a three-dimensional capacitor is still required to realize a capacitor having a large capacitance.
  • an atomic layer deposition (ALD) method is used.
  • a desired metal oxide thin dielectric film is obtained by chemically absorbing an organometallic compound, which is a precursor, on a substrate, and processing the thin film under an oxygen atmosphere.
  • the ALD method is advantageous in that an organic substance included in a precursor can be removed by a strong oxidizer since the precursor and the oxidizer are introduced using time division.
  • a lower electrode which is to be formed below a thin dielectric layer when forming an atomic layer, is formed of a material that is prone to oxidization, e.g., ruthenium (Ru), the Ru electrode may be deformed and the thin dielectric layer may deteriorate, as shown in FIG. 1 . Therefore, it is difficult to highly integrate the thin dielectric layer.
  • ruthenium ruthenium
  • FIG. 1 illustrates a capacitor in which a thin strontium titanium oxide (SrTiO 3 ) layer is formed on a Ru lower electrode by a conventional O 3 atomic layer deposition (ALD) method.
  • a thin strontium titanium oxide (SrTiO 3 ) layer is formed on a Ru lower electrode by a conventional O 3 atomic layer deposition (ALD) method.
  • ALD O 3 atomic layer deposition
  • Ru easily changes into RuO 2 or RuO 4 under an oxygen atmosphere, which causes the deformation of the Ru electrode.
  • a capacitor for use in a semiconductor device including upper and lower electrodes, each formed of a platinum group metal, a thin dielectric layer disposed between the upper and lower electrodes, and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13.
  • a method of fabricating such a capacitor for use in a semiconductor device including forming a buffer layer on a lower electrode of a platinum group metal by performing an atomic layer deposition (ALD) process using a precursor for the buffer layer, forming a thin dielectric layer by performing the ALD process using a precursor for a thin dielectric layer on the buffer layer, and forming an upper electrode of a platinum group metal on the thin dielectric layer.
  • ALD atomic layer deposition
  • a method of fabricating such a capacitor for use in a semiconductor device including absorbing CO on a surface of a lower electrode of a platinum group metal, placing the lower electrode under a reducing atmosphere to produce a lattice oxygen, using the lattice oxygen to form a thin dielectric layer by performing an ALD process using a precursor for the thin dielectric layer, and forming an upper electrode of a platinum group metal on the thin dielectric layer.
  • an electronic device employing a capacitor for a semiconductor device according to an embodiment of the present invention.
  • FIG. 1 illustrates a view of a capacitor formed by a conventional O 3 atomic layer deposition (ALD) method
  • FIG. 2 is a graph illustrating variations in the degree of activation, according to temperature, of ruthenium (Ru) oxide in the capacitor of FIG. 1 ;
  • FIG. 3 illustrates a view for explaining a process in which carbon monoxide (CO) absorbed on the surface of a Ru electrode changes into a lattice oxygen, in accordance with the present invention
  • FIGS. 4A through 4C illustrate cross-sectional views showing embodiments of a memory device employing a capacitor according to the present invention
  • FIG. 5 is a photograph taken by a transmission electron microscope (TEM) of an SrTiO 3 thin layer of a capacitor according to one embodiment of the present invention
  • FIG. 6 is a photograph taken by a scanning electron microscope (SEM) of an SrTiO 3 thin layer of a capacitor according to another embodiment of the present invention.
  • FIGS. 7A and 7B are graphs illustrating the electrical characteristics of a capacitor according to still another embodiment of the present invention.
  • a buffer layer is formed between a thin dielectric layer and an electrode to prevent the oxidization of a platinum metal when forming the thin dielectric film.
  • ruthenium (Ru) is the platinum metal used as a material for the electrode.
  • the buffer layer is formed of a metal oxide of Group 3, 4, or 13, preferably, at least one selected from the group consisting of TiO 2 , Al 2 O 3 , Ta 2 O 5 , and HfO 2 .
  • Such a buffer layer may be formed by an atomic layer deposition (ALD) of a precursor for forming the buffer layer.
  • the precursor is an organometallic compound having a small sized ligand or that is easily decomposed when being absorbed on a substrate and causes the chemical absorption of a by-product.
  • organometallic compound having a small sized ligand or that is easily decomposed when being absorbed on a substrate and causes the chemical absorption of a by-product.
  • the use of such an organometallic compound allows an atomic layer of a higher packing density to be formed on an electrode.
  • a metal precursor includes Ti(i-OPr) 4 or Ti(i-OPr) 2 (tmhd) 2 for a TiO 2 buffer layer (where tmhd indicates tetramethylheptanedionate, and i-OPr indicates isopropoxy); Al(CH 3 ) 3 or AlCl 3 for an Al 2 O 3 buffer layer; Ta(OEt) 5 (where OEt indicates ethoxide) for a Ta 2 O 5 buffer layer; and HfCl 4 or Hf(OBu) 4 for an HfO 2 buffer layer.
  • the vapor deposition temperature of the precursor for a buffer layer depends largely on the characteristics of the precursor, but preferably is between about 200-500° C. This is because the reactivity between the precursor and O 3 , which is used as an oxidizer, decreases when the deposition temperature is less than 200° C., and the precursor decomposes when the deposition temperature is greater than 500° C., thereby preventing formation of a buffer layer using the ALD method.
  • a lower electrode is formed of a platinum group metal.
  • the platinum group metal is at least one element selected from the group consisting of ruthenium (Ru), osmium (Os), iridium (Ir), and platinum (Pt).
  • the ALD process is performed using a precursor for a buffer layer on the lower electrode to form a buffer layer.
  • the ALD process is performed using a precursor for a thin dielectric layer on the buffer layer to form a thin dielectric layer.
  • the thin dielectric layer is formed of SrTiO 3 , BaTiO 3 , Pb(Zr,Ti)O 3 , or the like.
  • SrTiO 3 one of Sr(tmhd) 2 or Sr(methd) 2 (where methd indicates methoxyethoxy tetramethylheptanedionate) is selected as the Sr source, one of TiO(tmhd) 2 or TiO(i-OPr) 2 (tmhd) 2 is selected as the Ti source, and then the selected elements are mixed together.
  • the ALD process is performed using the precursor for the thin dielectric layer and oxygen gas or a heat source.
  • the vapor deposition temperature of an atomic layer is between about 300-500° C.
  • the capacitor for use in a semiconductor device according to the present invention is completed by forming an upper electrode on the thin dielectric layer using a platinum group metal.
  • a lattice oxygen obtained from carbon monoxide (CO) that is absorbed in a material for an electrode is preferably used for oxidation.
  • FIG. 3 illustrates a view for explaining a process of producing lattice oxygen when a Ru electrode is used.
  • CO absorbed on the Ru electrode is placed under a reducing atmosphere and the carbon in the CO is removed in the form of CH 4 .
  • CH 4 the carbon in the CO
  • only lattice oxygen remains on the surface of Ru electrode.
  • the lattice oxygen remaining on the surface of the Ru electrode is used as an oxidizer when a thin dielectric layer is formed by the ALD process in a subsequent procedure.
  • CO is absorbed on the surface of a lower electrode made of an element of a platinum group metal.
  • the resultant is placed under a reducing atmosphere to produce lattice oxygen.
  • the temperature may be maintained at about between 100-500° C. This is because CO is difficult to reduce if the temperature is lower than 100° C., and CO is more easily desorbed from the surface of a lower electrode carbon if the process temperature is higher than 500° C.
  • the reducing atmosphere is formed using a reducing gas such as hydrogen.
  • a thin dielectric layer is formed by performing the ALD process using a precursor for a thin dielectric layer.
  • a method of forming the thin dielectric layer and the required materials are as described above.
  • a capacitor for use in a semiconductor device according to the present invention is completed by forming an upper electrode by forming an element of a platinum group metal on the thin dielectric layer.
  • Such a capacitor may be applied to various electronic devices such as a dynamic RAM (DRAM) device and non-volatile memory (FRAM).
  • DRAM dynamic RAM
  • FRAM non-volatile memory
  • FIGS. 4A through 4C illustrate cross-sectional views of several forms memory devices adopting a capacitor according to the present invention.
  • FIG. 4A illustrates a cross-sectional view of a memory device of a single transistor type
  • FIG. 4B illustrates a cross sectional view of a one transistor, one capacitor (1Tr-1C) type memory device
  • FIG. 4C illustrates a cross sectional view of a 1Tr-1C capacitor over bit line (COB)-type memory device.
  • COB bit line
  • reference numeral ‘ 40 ’ denotes a silicon substrate
  • ‘ 41 ’ denotes an active region
  • ‘ 42 ’ denotes a non-active region
  • ‘ 43 ’ denotes a lower structure
  • ‘ 44 ’ denotes a gate electrode
  • ‘ 45 ’ denotes a polysilicon layer
  • ‘ 46 ’ denotes a lower electrode
  • ‘ 47 ’ denotes a buffer layer of TiO 2
  • ‘ 48 ’ denotes a thin dielectric layer of SrTiO 3
  • ‘ 50 ’ denotes an upper electrode
  • ‘ 52 ’ denotes a capacitor.
  • FIGS. 4A through 4C various memory devices adopting a preferred embodiment of a capacitor according to the present invention are illustrated, but such a capacitor may be applied to other electronic devices having a thin dielectric layer.
  • ALD atomic layer deposition
  • the ALD process was performed on the buffer layer at about 400° C., using Sr(mdthd) 2 and Ti(i-OPr) 2 (tmhd) 2 as a precursor and O 3 as an oxidizer to form a thin dielectric layer of SrTiO 3 .
  • a capacitor was prepared in the same manner as in the first embodiment, except that the ALD process was performed at about 400° C. with Al(CH 3 ) 3 as a precursor for a buffer layer and O 3 as an oxidizer to form a buffer layer of Al 2 O 3 on a second Ru electrode.
  • FIG. 5 illustrates the laminated cross-section of a thin dielectric layer of SrTiO 3 formed on the Ru thin layer according to the first embodiment taken by a transmission electronic microscope (TEM).
  • TEM transmission electronic microscope
  • the buffer layer of TiO 2 is formed below the thin layer of SrTiO 3 , and the Ru electrode is positioned under the buffer layer of TiO 2 . It is noted that a protrusion is not formed in the Ru electrode.
  • FIG. 6 is a photograph of the laminated cross-section of the thin dielectric layer of SrTiO 3 formed on the Ru thin layer according to the second embodiment of the present invention, taken by a scanning electronic microscope (SEM).
  • SEM scanning electronic microscope
  • FIGS. 7A and 7B are graphs illustrating the electrical characteristics of the capacitor made according to the third embodiment of the present invention.
  • FIG. 7A illustrates variations in the current density according to voltage in the capacitor.
  • FIG. 7A reveals that 10 ⁇ 7 A/cm 2 at 1V, which is the standard set for a DRAM, is generally satisfied by the capacitor prepared in the third embodiment.
  • FIG. 7B shows variations in t ox according to bias voltage.
  • a smaller value of t ox indicates a higher quality dielectric layer.
  • a white tetragonal symbol indicates variations in the current density as voltage in the capacitor is changed from a negative value to a positive value.
  • a black tetragonal symbol indicates variations in the current density as voltage in the capacitor is changed from a positive value to a negative value.
  • a white tetragonal symbol indicates t ox according to a bias voltage, and a black tetragonal symbol indicates a dielectric loss factor (TAN ⁇ ).
  • the t ox of a dielectric layer is 6.8 ⁇ just after being deposited, and is 7 ⁇ at a bias voltage of 1V, which is the t ox of a dielectric layer required for a DRAM of more than 16 Gigabytes.
  • oxidization of a lower Ru electrode may be suppressed even when forming a thin dielectric layer by performing an ALD process with a strong oxidizer such as O 3 .
  • a strong oxidizer such as O 3 .
  • deformation of the lower Ru electrode may be prevented, and deterioration of the characteristics of the thin dielectric layer may be inhibited.
  • a capacitor according to the present invention retains the excellent electrical characteristics of a thin dielectric layer as required by a highly integrated memory, and therefore may be used in an electronic device such as a DRAM.

Abstract

A capacitor for use in a semiconductor device, a method of fabricating the capacitor, and an electronic device adopting the capacitor, wherein the capacitor includes upper and lower electrodes, each formed of a platinum group metal; a thin dielectric layer disposed between the upper and lower electrodes; and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13. In the capacitor of the present invention, oxidization of the lower electrode may be suppressed, and excellent characteristics of the thin dielectric layer may be maintained.

Description

    CROSS REFERENCE TO RELATED APPLICATION(S)
  • This is a divisional application based on pending application Ser. No. 10/930,953, filed Sep. 1, 2004, which in turn is a division of application Ser. No. 10/370,625, filed Feb. 24, 2003, the entire contents of which is hereby incorporated by reference.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a capacitor for a semiconductor device. More particularly, the present invention relates to a capacitor for use in a semiconductor device having an ability to effectively suppress the oxidization of a material for an electrode when forming a thin dielectric layer, a manufacturing method thereof, and an electronic device that employs the capacitor and thus may be highly integrated.
  • 2. Description of the Related Art
  • The more integrated a memory is, the smaller the size of a unit cell and the smaller the area of a capacitor. Thus, to realize a capacitor having a large electrostatic capacity in a limited area, extensive research into the use of a capacitor dielectric having a large permittivity, e.g., a high-dielectric material, has been conducted.
  • High-dielectric materials include tantalum oxide (TaO) and strontium titanium oxide (SrTiO3), which have a larger permittivity than low-dielectric materials such as SiO2 and Si3N4. However, despite the use of a high-dielectric material, a three-dimensional capacitor is still required to realize a capacitor having a large capacitance. To this end, an atomic layer deposition (ALD) method is used.
  • According to the ALD method, a desired metal oxide thin dielectric film is obtained by chemically absorbing an organometallic compound, which is a precursor, on a substrate, and processing the thin film under an oxygen atmosphere. The ALD method is advantageous in that an organic substance included in a precursor can be removed by a strong oxidizer since the precursor and the oxidizer are introduced using time division.
  • However, if a lower electrode, which is to be formed below a thin dielectric layer when forming an atomic layer, is formed of a material that is prone to oxidization, e.g., ruthenium (Ru), the Ru electrode may be deformed and the thin dielectric layer may deteriorate, as shown in FIG. 1. Therefore, it is difficult to highly integrate the thin dielectric layer.
  • FIG. 1 illustrates a capacitor in which a thin strontium titanium oxide (SrTiO3) layer is formed on a Ru lower electrode by a conventional O3 atomic layer deposition (ALD) method. Referring to FIG. 1, it is noted that the conventional O3 ALD method causes a protrusion of the Ru lower electrode to be generated in the capacitor.
  • As shown in FIG. 2, Ru easily changes into RuO2 or RuO4 under an oxygen atmosphere, which causes the deformation of the Ru electrode.
    • SUMMARY OF THE INVENTION
  • To solve the above-described problems, it is a first feature of an embodiment of the present invention to provide a capacitor for use in a semiconductor device, in which the oxidization of a material for an electrode is effectively suppressed when forming a thin dielectric layer.
  • It is a second a feature of an embodiment of the present invention to provide a method of fabricating such a capacitor.
  • It is a third a feature of an embodiment of the present invention to provide an electronic device employing such a capacitor, in which a thin dielectric layer may be highly integrated, and a method for forming the same.
  • Accordingly, to provide the first feature of an embodiment of the present invention, there is provided a capacitor for use in a semiconductor device including upper and lower electrodes, each formed of a platinum group metal, a thin dielectric layer disposed between the upper and lower electrodes, and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13.
  • To provide an aspect of the second feature of an embodiment of the present invention, there is provided a method of fabricating such a capacitor for use in a semiconductor device including forming a buffer layer on a lower electrode of a platinum group metal by performing an atomic layer deposition (ALD) process using a precursor for the buffer layer, forming a thin dielectric layer by performing the ALD process using a precursor for a thin dielectric layer on the buffer layer, and forming an upper electrode of a platinum group metal on the thin dielectric layer.
  • To provide another aspect of the second feature of an embodiment of the present invention, there is provided a method of fabricating such a capacitor for use in a semiconductor device including absorbing CO on a surface of a lower electrode of a platinum group metal, placing the lower electrode under a reducing atmosphere to produce a lattice oxygen, using the lattice oxygen to form a thin dielectric layer by performing an ALD process using a precursor for the thin dielectric layer, and forming an upper electrode of a platinum group metal on the thin dielectric layer.
  • To provide the third feature of an embodiment of the present invention, there is provided an electronic device employing a capacitor for a semiconductor device according to an embodiment of the present invention.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above features and advantages of the present invention will become more apparent by describing in detail a preferred embodiment thereof with reference to the attached drawings in which:
  • FIG. 1 illustrates a view of a capacitor formed by a conventional O3 atomic layer deposition (ALD) method;
  • FIG. 2 is a graph illustrating variations in the degree of activation, according to temperature, of ruthenium (Ru) oxide in the capacitor of FIG. 1;
  • FIG. 3 illustrates a view for explaining a process in which carbon monoxide (CO) absorbed on the surface of a Ru electrode changes into a lattice oxygen, in accordance with the present invention;
  • FIGS. 4A through 4C illustrate cross-sectional views showing embodiments of a memory device employing a capacitor according to the present invention;
  • FIG. 5 is a photograph taken by a transmission electron microscope (TEM) of an SrTiO3 thin layer of a capacitor according to one embodiment of the present invention;
  • FIG. 6 is a photograph taken by a scanning electron microscope (SEM) of an SrTiO3 thin layer of a capacitor according to another embodiment of the present invention; and
  • FIGS. 7A and 7B are graphs illustrating the electrical characteristics of a capacitor according to still another embodiment of the present invention.
    • DETAILED DESCRIPTION OF THE INVENTION
  • Korean Patent Application No. 2002-10982, entitled “Capacitor For Semiconductor Device, Manufacturing Method Thereof, And Electronic Device,” filed on Feb. 28, 2002, is incorporated by reference herein in its entirety.
  • In the present invention, a buffer layer is formed between a thin dielectric layer and an electrode to prevent the oxidization of a platinum metal when forming the thin dielectric film. Preferably, ruthenium (Ru) is the platinum metal used as a material for the electrode. The buffer layer is formed of a metal oxide of Group 3, 4, or 13, preferably, at least one selected from the group consisting of TiO2, Al2O3, Ta2O5, and HfO2. Such a buffer layer may be formed by an atomic layer deposition (ALD) of a precursor for forming the buffer layer. The precursor is an organometallic compound having a small sized ligand or that is easily decomposed when being absorbed on a substrate and causes the chemical absorption of a by-product. The use of such an organometallic compound allows an atomic layer of a higher packing density to be formed on an electrode.
  • A metal precursor includes Ti(i-OPr)4 or Ti(i-OPr)2(tmhd)2 for a TiO2 buffer layer (where tmhd indicates tetramethylheptanedionate, and i-OPr indicates isopropoxy); Al(CH3)3 or AlCl3 for an Al2O3 buffer layer; Ta(OEt)5 (where OEt indicates ethoxide) for a Ta2O5 buffer layer; and HfCl4 or Hf(OBu)4 for an HfO2 buffer layer.
  • As described above, if an atomic layer having a high packing density is formed on an electrode, the surface of a Ru electrode is not directly in contact with ozone (O3) or oxygen when a thin dielectric layer is formed. Therefore, it is possible to prevent deformation of the electrode or deterioration of the characteristics of a thin dielectric layer caused by the oxidization of the electrode.
  • The vapor deposition temperature of the precursor for a buffer layer depends largely on the characteristics of the precursor, but preferably is between about 200-500° C. This is because the reactivity between the precursor and O3, which is used as an oxidizer, decreases when the deposition temperature is less than 200° C., and the precursor decomposes when the deposition temperature is greater than 500° C., thereby preventing formation of a buffer layer using the ALD method.
  • Hereinafter, a method of fabricating a capacitor according to the present invention for use in a semiconductor device will be described.
  • First, a lower electrode is formed of a platinum group metal. The platinum group metal is at least one element selected from the group consisting of ruthenium (Ru), osmium (Os), iridium (Ir), and platinum (Pt).
  • Then, the ALD process is performed using a precursor for a buffer layer on the lower electrode to form a buffer layer.
  • Thereafter, the ALD process is performed using a precursor for a thin dielectric layer on the buffer layer to form a thin dielectric layer. Preferably, the thin dielectric layer is formed of SrTiO3, BaTiO3, Pb(Zr,Ti)O3, or the like. To make the thin dielectric layer of SrTiO3, one of Sr(tmhd)2 or Sr(methd)2 (where methd indicates methoxyethoxy tetramethylheptanedionate) is selected as the Sr source, one of TiO(tmhd)2 or TiO(i-OPr)2(tmhd)2 is selected as the Ti source, and then the selected elements are mixed together. Next, the ALD process is performed using the precursor for the thin dielectric layer and oxygen gas or a heat source. Preferably, the vapor deposition temperature of an atomic layer is between about 300-500° C.
  • Then, the capacitor for use in a semiconductor device according to the present invention is completed by forming an upper electrode on the thin dielectric layer using a platinum group metal.
  • In the present invention, a lattice oxygen obtained from carbon monoxide (CO) that is absorbed in a material for an electrode is preferably used for oxidation.
  • FIG. 3 illustrates a view for explaining a process of producing lattice oxygen when a Ru electrode is used. Referring to FIG. 3, CO absorbed on the Ru electrode is placed under a reducing atmosphere and the carbon in the CO is removed in the form of CH4. Thus, only lattice oxygen remains on the surface of Ru electrode. The lattice oxygen remaining on the surface of the Ru electrode is used as an oxidizer when a thin dielectric layer is formed by the ALD process in a subsequent procedure.
  • A method of fabricating a capacitor for use in a semiconductor device according to the present invention, using the lattice oxygen, will now be described.
  • First, CO is absorbed on the surface of a lower electrode made of an element of a platinum group metal. Next, the resultant is placed under a reducing atmosphere to produce lattice oxygen. To this end, the temperature may be maintained at about between 100-500° C. This is because CO is difficult to reduce if the temperature is lower than 100° C., and CO is more easily desorbed from the surface of a lower electrode carbon if the process temperature is higher than 500° C. The reducing atmosphere is formed using a reducing gas such as hydrogen.
  • Thereafter, using the lattice oxygen, a thin dielectric layer is formed by performing the ALD process using a precursor for a thin dielectric layer. A method of forming the thin dielectric layer and the required materials are as described above.
  • Then, a capacitor for use in a semiconductor device according to the present invention is completed by forming an upper electrode by forming an element of a platinum group metal on the thin dielectric layer.
  • Such a capacitor may be applied to various electronic devices such as a dynamic RAM (DRAM) device and non-volatile memory (FRAM).
  • FIGS. 4A through 4C illustrate cross-sectional views of several forms memory devices adopting a capacitor according to the present invention. Specifically, FIG. 4A illustrates a cross-sectional view of a memory device of a single transistor type, FIG. 4B illustrates a cross sectional view of a one transistor, one capacitor (1Tr-1C) type memory device, and FIG. 4C illustrates a cross sectional view of a 1Tr-1C capacitor over bit line (COB)-type memory device.
  • In FIGS. 4A-4C, reference numeral ‘40’ denotes a silicon substrate, ‘41’ denotes an active region, ‘42’ denotes a non-active region, ‘43’ denotes a lower structure, ‘44’ denotes a gate electrode, ‘45’ denotes a polysilicon layer, ‘46’ denotes a lower electrode, ‘47’ denotes a buffer layer of TiO2, ‘48’ denotes a thin dielectric layer of SrTiO3, ‘50’ denotes an upper electrode, and ‘52’ denotes a capacitor.
  • In FIGS. 4A through 4C, various memory devices adopting a preferred embodiment of a capacitor according to the present invention are illustrated, but such a capacitor may be applied to other electronic devices having a thin dielectric layer.
  • Hereinafter, a capacitor according to an embodiment of the present invention will be specifically described by the following exemplary embodiments.
    • First Embodiment
  • An atomic layer deposition (ALD) process was performed at about 325° C. using 0.1M of Ti(i-OPr)2(tmhd)2 dissolved in tetrahydrofuran (THF) and using O3 as an oxidizer to form a buffer layer of TiO2 on a first Ru electrode.
  • Then, the ALD process was performed on the buffer layer at about 400° C., using Sr(mdthd)2 and Ti(i-OPr)2(tmhd)2 as a precursor and O3 as an oxidizer to form a thin dielectric layer of SrTiO3.
  • Next, a second Ru electrode was formed on the thin dielectric layer of SrTiO3, thereby completing a capacitor.
    • Second Embodiment
  • A capacitor was prepared in the same manner as in the first embodiment, except that the ALD process was performed at about 400° C. with Al(CH3)3 as a precursor for a buffer layer and O3 as an oxidizer to form a buffer layer of Al2O3 on a second Ru electrode.
    • Third Embodiment
  • CO was absorbed on the surface of a first Ru electrode and processed under a hydrogen gas atmosphere at about 400° C. to produce lattice oxygen. Then, a thin dielectric layer of SrTiO3 was prepared in the same manner as in the first embodiment.
  • Then, a second Ru electrode was formed on the thin dielectric layer of SrTiO3, thereby completing a capacitor.
  • FIG. 5 illustrates the laminated cross-section of a thin dielectric layer of SrTiO3 formed on the Ru thin layer according to the first embodiment taken by a transmission electronic microscope (TEM).
  • Referring to FIG. 5, the buffer layer of TiO2 is formed below the thin layer of SrTiO3, and the Ru electrode is positioned under the buffer layer of TiO2. It is noted that a protrusion is not formed in the Ru electrode.
  • FIG. 6 is a photograph of the laminated cross-section of the thin dielectric layer of SrTiO3 formed on the Ru thin layer according to the second embodiment of the present invention, taken by a scanning electronic microscope (SEM).
  • From FIG. 6, it is noted that, due to the buffer layer, a protrusion does not occur in the Ru electrode, and roughness of the surface of the capacitor does not increase when a thin dielectric layer of SrTiO3 is deposited.
  • FIGS. 7A and 7B are graphs illustrating the electrical characteristics of the capacitor made according to the third embodiment of the present invention. Specifically, FIG. 7A illustrates variations in the current density according to voltage in the capacitor. FIG. 7A reveals that 10−7 A/cm2 at 1V, which is the standard set for a DRAM, is generally satisfied by the capacitor prepared in the third embodiment. FIG. 7B shows variations in tox according to bias voltage. Here, ‘tox’ is a thickness of SiO2, and may be expressed by the following general equation:
    t ox={(a dielectric constant of SiO2)(an area of an upper electrode in a capacitor)}/{a capacitance of the capacitor}.
  • A smaller value of tox indicates a higher quality dielectric layer.
  • In FIG. 7A, a white tetragonal symbol indicates variations in the current density as voltage in the capacitor is changed from a negative value to a positive value. A black tetragonal symbol indicates variations in the current density as voltage in the capacitor is changed from a positive value to a negative value. In FIG. 7B, a white tetragonal symbol indicates tox according to a bias voltage, and a black tetragonal symbol indicates a dielectric loss factor (TAN δ).
  • Referring to FIG. 7B, the tox of a dielectric layer is 6.8 Å just after being deposited, and is 7 Å at a bias voltage of 1V, which is the tox of a dielectric layer required for a DRAM of more than 16 Gigabytes.
  • As described above, in a capacitor according to the present invention, oxidization of a lower Ru electrode may be suppressed even when forming a thin dielectric layer by performing an ALD process with a strong oxidizer such as O3. By suppressing oxidization, deformation of the lower Ru electrode may be prevented, and deterioration of the characteristics of the thin dielectric layer may be inhibited. Accordingly, a capacitor according to the present invention retains the excellent electrical characteristics of a thin dielectric layer as required by a highly integrated memory, and therefore may be used in an electronic device such as a DRAM.
  • Preferred embodiments of the present invention have been disclosed herein and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purpose of limitation. Accordingly, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the spirit and scope of the present invention as set forth in the following claims.

Claims (12)

1-4. (canceled)
5. A method of fabricating a capacitor for use in a semiconductor device, the method comprising:
forming a buffer layer on a lower electrode of a platinum group metal by performing an atomic layer deposition (ALD) process using a precursor for the buffer layer;
forming a thin dielectric layer by performing the ALD process using a precursor for a thin dielectric layer on the buffer layer; and
forming an upper electrode of a platinum group metal on the thin dielectric layer.
6. The method as claimed in claim 5, wherein the precursor for the buffer layer is comprised of Ti(i-OPr)2(tmhd)2 (where tmhd indicates tetramethylheptanedionate, and i-OPr indicates isopropoxy), Al(CH3)3 or Hf(OBu)4 (where n-OBu indicates n-butoxide).
7. The method as claimed in claim 5, wherein the ALD process for forming the buffer layer is performed at a temperature of between about 200-500° C.
8. The method as claimed in claim 5, wherein the precursor for the thin dielectric layer is comprised of at least one selected from the group consisting of Sr(tmdh)2, Sr(methd)2, TiO(tmhd)2, and Ti(i-OPr)2(tmhd)2, (where tmhd indicates tetramethylheptanedionate, methd indicates methoxyethoxy tetramethylheptanedionate and i-OPr indicates isopropoxy).
9-16. (canceled)
17. The method as claimed in claim 5, wherein forming the buffer layer includes using O3 as an oxidizer.
18. The method as claimed in claim 17, wherein the ALD process for forming the buffer layer is performed at a temperature of between about 200-500° C.
19. The method as claimed in claim 18, wherein the precursor for the buffer layer is comprised of Ti(i-OPr)2(tmhd)2 (where tmhd indicates tetramethylheptanedionate, and i-OPr indicates isopropoxy), Al(CH3)3 or Hf(OBu)4 (where n-OBu indicates n-butoxide).
20. The method as claimed in claim 5, wherein forming the thin dielectric layer includes using O3 as an oxidizer.
21. The method as claimed in claim 20, wherein forming the thin dielectric layer is performed at a temperature between about 300-500° C.
22. The method as claimed in claim 21, wherein the precursor for the thin dielectric layer is comprised of at least one selected from the group consisting of Sr(tmdh)2, Sr(methd)2, TiO(tmhd)2, and Ti(i-OPr)2(tmhd)2, (where tmhd indicates tetramethylheptanedionate, methd indicates methoxyethoxy tetramethylheptanedionate and i-OPr indicates isopropoxy).
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