US20050016956A1 - Methods and apparatus for cycle time improvements for atomic layer deposition - Google Patents

Methods and apparatus for cycle time improvements for atomic layer deposition Download PDF

Info

Publication number
US20050016956A1
US20050016956A1 US10/791,030 US79103004A US2005016956A1 US 20050016956 A1 US20050016956 A1 US 20050016956A1 US 79103004 A US79103004 A US 79103004A US 2005016956 A1 US2005016956 A1 US 2005016956A1
Authority
US
United States
Prior art keywords
flow
purge
ald
purge flow
reactor chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10/791,030
Inventor
Xinye Liu
Thomas Seidel
Edward Lee
Ken Doering
Sasangan Ramanathan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Aixtron Inc
Original Assignee
Genus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Genus Inc filed Critical Genus Inc
Priority to US10/791,030 priority Critical patent/US20050016956A1/en
Assigned to GENUS, INC. reassignment GENUS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: DOERING, KEN, RAMANATHAN, SASANGAN, LEE, EDWARD, SEIDEL, THOMAS E., LIU, XINYE
Publication of US20050016956A1 publication Critical patent/US20050016956A1/en
Assigned to AIXTRON, INC. reassignment AIXTRON, INC. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: GENUS, INC.
Abandoned legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/14Feed and outlet means for the gases; Modifying the flow of the reactive gases
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4412Details relating to the exhausts, e.g. pumps, filters, scrubbers, particle traps
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45544Atomic layer deposition [ALD] characterized by the apparatus
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45557Pulsed pressure or control pressure

Definitions

  • the present invention relates to thin film processing and, more particularly, to methods and apparatus for improvement in the cycle time of Atomic Layer Deposition (ALD) processes.
  • ALD Atomic Layer Deposition
  • ALD atomic layer deposition
  • CVD chemical vapor deposition
  • the above 4 periods are called expose period of A, purge period of A, expose period of B, and purge period of B, respectively.
  • the time period that consists of expose period of A and the following purge period of A is called half cycle A.
  • the time period that consists of expose period of B and the following purge period of B is called half cycle B.
  • cycle time reductions and in particular purge time reductions, are needed.
  • One way in which this can be accomplished is to provide an increased flow for the purge gas. Providing the purge gas at a higher flow rate will tend to minimize the time needed to complete the purge period.
  • this would tend to increase the required precursor exposure time. This is because the increased flow rate of the purge gas (which is used as a neutral carrier during the exposure periods) would tend to drive the chemical precursors out of the reactor chamber faster than would otherwise be the case at a lower purge gas flow rate.
  • a greater loss of chemical precursor for a unit time interval could be expected and so increased exposure times would be necessary.
  • a bi-level purge gas flow rate could be implemented. That is, during precursor exposure a relatively low purge gas flow rate could be used (to maximize precursor residence time within the chamber) whereas during the purge period a relatively high purge gas flow rate could be used (to minimize the required purge time).
  • the first known system to implement such a bi-level purge gas flow rate was developed in 1998 by Steven Shatas for Modular Process Technology of San Jose, Calif. (“MPT”). Later, in 1999, Shatas and MPT (working with one of its customers) combined the use of a bi-level purge gas flow driven by a pair of mass flow controllers with a fast-switching throttle valve downstream from the reactor chamber to permit control of both flow rate and reactor pressure. This system allowed operators to vary the residence time of the precursors during the ALD cycle, providing low residence time during precursor removal and high residence time during exposure.
  • the present invention provides for performing an expose period (which may, in some cases, be a plasma-assisted period) of an ALD process using a first purge flow and a first pumping capacity, and performing a purge period of the ALD process using a second purge flow greater than the first purge flow and a second pumping capacity greater than the first pumping capacity.
  • These procedures may be performed while maintaining the reactor chamber within which the ALD process is performed at a nominally constant pressure, for example through the operation of a throttle valve downstream from the reactor chamber such that the throttle valve is more open during the purge period than during the expose period.
  • the first purge flow and the second purge flow may, in some cases, utilize different gasses and/or may be provided through different flow paths.
  • the second purge flow and second pumping capacity may be initiated prior to termination of material deposition during the expose period.
  • the second purge flow and second pumping capacity may be activated so as to break turbulence within the reactor chamber (e.g., to help in the removal of precursors).
  • a second expose period of the ALD process may be performed using a third purge flow and a third pumping capacity different from the first purge flow and first pumping capacity, respectively.
  • the third purge flow may be an absence of a purge flow.
  • the first purge flow may be switched to the second purge flow: at a substantially coincident point in time as the first pumping capacity is switched to the second pumping capacity, prior to completion of material deposition during the expose period, or at a different point in time than that at which the first pumping capacity is switched to the second pumping capacity.
  • the purge flows may be switched by switching first flow limiting conductances located upstream of the reactor chamber out of a first gas flow path thereto at a substantially coincident point in time as second flow limiting conductances located downstream of the reactor chamber are switched out of a second gas flow path from the reactor chamber.
  • the present invention allows for performing, within a half cycle, an expose period of an ALD process using a first purge flow defined in part by a first conductance of an annular gas flow pathway within the reactor chamber, and performing a purge period of the ALD process using a second purge flow greater than the first purge flow, the second purge flow defined in part by a second conductance of the annular gas flow pathway within the reactor chamber.
  • the pressure of the reactor chamber may be maintained so as to be nominally constant during the expose and purge period, and in some cases, the first purge flow and the second purge flow may utilize different gasses and/or be provided through different flow paths.
  • Still further embodiments of the present invention provide for performing an expose period of an ALD process using a first purge flow at a first pressure, the first purge flow passing through first flow limiting conductances located within a first gas flow pathway upstream of the reactor chamber and second flow limiting conductances located within a second gas flow pathway downstream of the reactor chamber, and performing a purge period of the ALD process using a second purge flow at a second pressure greater than the first pressure, the second purge flow passing through third flow limiting conductances located within the first gas flow pathway and fourth flow limiting conductances located in the second gas flow pathway, wherein a ratio of the first flow limiting conductances to the second flow limiting conductances is equal to a ratio of the third flow limiting conductances to the fourth flow limiting conductances and a pressure of the reactor chamber is maintained nominally constant during the ALD process.
  • Another embodiment provides an ALD system that includes a first purge flow pathway coupled upstream of a reactor; a second purge flow pathway coupled upstream of the reactor; and a pumping arrangement coupled downstream of the reactor, and configured to be switched between a first pumping capacity when the first purge flow pathway is active and a second pumping capacity greater than the first pumping capacity when the second purge flow pathway is active.
  • the first and second purge flow pathways may share a common gas flow manifold with one or more precursor injection pathways, or at least one of the purge flow pathways may be directly coupled to the reactor independently of the other.
  • the first and second pumping capacities comprise two operational modes of a single physical pump.
  • Additional embodiments of the present invention provide an ALD system having a purge flow pathway coupled upstream of a reactor chamber through selectable upstream flow limiting conductances having two or more operational modes including a low flow mode and a high flow mode; and a pumping arrangement coupled downstream of the reactor through selectable downstream flow limiting conductances having two or more operational modes including a low flow mode and a high flow mode, wherein the upstream flow limiting conductances and downstream flow limiting conductances are configured to switch operational modes in time-phase with one another.
  • the upstream flow limiting conductances may be configured to switch operational modes prior to the downstream flow limiting conductances switching operational modes.
  • the downstream flow limiting conductances include a throttle valve, which may be an annular throttle valve located within the reactor chamber.
  • Still further embodiments of the present invention provide an ALD system that includes a gas delivery system coupled to a reactor chamber having disposed therein an annular throttle valve positioned within a gas flow pathway from the reactor chamber to a pumping system coupled downstream of the reactor chamber.
  • the annular throttle valve may have two or more operating modes, each configured to provide a different flow path conductance from the reactor chamber.
  • FIG. 1 illustrates a conventional ALD processing apparatus having a split-flow gas manifold.
  • FIG. 2 illustrates conventional (idealized) baseline conditions for ALD reactor operation at constant pressure and flow.
  • FIG. 3A is a graph that illustrates variations in ALD reactor flows due to the introduction of chemical precursors.
  • FIG. 3B is a graph illustrating the effects of chemical precursor introduction on ALD reactor pressures.
  • FIG. 4 illustrates an ALD processing apparatus configured with a two-level purge source and dual pump capacity arrangement in accordance with an embodiment of the present invention.
  • FIG. 5 illustrates the use of a direct-coupled purge flow conduit in accordance with a further embodiment of the present invention.
  • FIG. 6 illustrates an ALD apparatus configured to provide for multi-level purge flows through the use of tracking conductances in accordance with yet another embodiment of the present invention.
  • FIG. 7 illustrates an ALD apparatus configured for tracking conductance operation using a direct-coupled purge gas conduit in accordance with another embodiment of the present invention.
  • FIG. 8 illustrates an ALD apparatus configured with an annular throttle valve in accordance with still another embodiment of the present inventions.
  • FIG. 9 illustrates various examples of annular throttle valves for use in accordance with embodiments of the present invention.
  • reference numerals in the accompanying drawings typically are in the form “drawing number” followed by two digits, xx; for example, reference numerals on FIG. 4 may be numbered 4 xx; on FIG. 5 , reference numerals may be numbered 5 xx, and so on.
  • a reference numeral may be introduced on one drawing and the same reference numeral (with a different drawing number indicator) may be utilized on other drawings to refer to the same item.
  • the present invention provides multi-level flow sources using pressure controlled and/or passive conductance components combined with a dual (or, more generally multiple) pump (or dual or multiple pump capacity) arrangement.
  • a high purge flow does not have to flow during the exposure pulse, resulting in more economical operation with respect to consumables usage.
  • Both lower cost and better dynamic time-dependent performance is obtained, in some embodiments, by the use of pressure controlled components instead of mass flow controllers.
  • the use of an independent, direct-coupled conduit for neutral gas flow, instead of a purge bypass provides multi-level purge source capability without the need for continual operation of a high purge flow.
  • step coverage In addition to reduced consumables consumption, another benefit afforded by the two or multiple level flow purge operation of the present invention is better step coverage. To achieve better step coverage, higher exposure (defined as partial pressure multiplied by exposure time) is needed. By limiting the pumping rate and the dilution of the precursor, the present invention assures that more precursor molecules reach the extremes of high aspect ratio/high topology structures and/or the bottom of trenches in a given expose period.
  • the present invention provides systems and methods that provide low flow levels concurrently matched to low pumping capacities during exposure times and high flow levels concurrently matched with higher pumping capacities during purge times.
  • Other cycle time improvement techniques that are known in the art, such as those due to chemical delivery assistance using flow controllers or pressure controlled methods (see, e.g., U.S. Pat. No. 6,503,330, assigned to the assignee of the present invention and incorporated herein by reference), or ALD precursors delivered from “charge tubes” (see, e.g., Gadgil et al., WO0079019) or pressurized precursor volumes may be used in conjunction with the present methods and apparatus.
  • FIG. 1 shows an ALD processing system 100 and is adapted from the above-cited U.S. Patent of the present assignee.
  • ALD processing system 100 includes a split-flow gas switching manifold 102 , through which a neutral purge gas (from source 104 ) and one or more chemical sources (or process gasses) 106 and 108 may be delivered to reactor chamber 110 .
  • Neutral carrier gases may or may not accompany the chemical precursor.
  • Within the chamber 110 is a heater assembly 112 , upon which rests a semiconductor wafer 114 .
  • shut-off valves 116 and 118 are closed, and neutral purge gas flows through the reactor 110 , baseline purge flow and pressure conditions are established.
  • the split-flow manifold can include one or more inject conduits to the reactor 110 ; and system 100 is illustrated with a dual inject.
  • the flows and pressure in the reactor 110 are determined by: the upstream pressure setting at purge gas source 104 , the pressure setting at the reactor chamber 110 and the operation of the downstream throttle valve 120 .
  • the throttle valve 120 is part of a closed loop, feedback control system 122 , which operates to keep the pressure in the reactor chamber constant (or nearly so) as the various chemical precursors are introduced into the reactor 110 .
  • Various “restrictors” and conduit conductance limitations as may be useful may be placed in the gas switching manifold 102 (e.g., in reactor purge pathways 126 and 124 ), but are not shown in detail. Where used such restrictors and conductances may also determine the quantitative pressure and flow values.
  • the split-flow architecture provides a nominally constant gas pressure and (continuous) flow background for ALD operation, as illustrated in FIG. 2 .
  • precursor injections are carried out to move the precursor chemicals into the purge stream. That is, precursors are introduced to the purge stream from their respective sources 106 , 108 via valves 116 and 118 , respectively. This is done alternately and sequentially in time.
  • valve 116 The condition for the injection into the purge stream at valve 116 (or 118 ) is established by the pressure value set just above the upstream position of valve 116 (or 118 ) by controller 117 ( 119 ). This allows precursor injection or blending into the purge gas stream on either side of the manifold 102 . At the input 128 to the chamber, the two precursor lines open below the entrance to the reactor (forming multi-injects).
  • the overall flow in the reactor 110 will increase. If the carrier flow is small relative to the purge, which may be (and often is) the case, the increase in total flow and increase in reactor pressure will be small, but nevertheless observable, as shown in FIG. 3A .
  • One reason for this pressure rise above the baseline value may be that the response time of the throttle valve 120 is long compared with that of the injection valves 116 , 118 . That is, the inertia of the throttle valve 120 may lead to fluctuations in the reactor pressure during the purge period.
  • Typical response times for injection valves 116 and 118 may be on the order of 20-30 msec, whereas response times of a typical downstream throttle valve 120 may be on the order of 500-1000 msec (though throttle valves having response times of less than 100 msec have recently become available). Thus, the pressure in the reactor 110 may rise in coincidence with the increased flow.
  • the pressure in the reactor 110 may change and fluctuate above and below that of the baseline flow level both during and after the period of the exposure pulse as shown in FIG. 3B .
  • the total reactor pressure is maintained during the middle and towards the end of the purge half-cycle, where the precursor's partial pressure is low enough to start the other precursor injection, because the throttle valve 120 and its closed-loop control system 122 have corrected to reestablish the desired reactor pressure.
  • a well-designed system will exhibit a smooth decay of pressure vs. time.
  • residence time may be expressed in terms of the reactor volume (V) and the effective pumping speed (S) at the orifice where the precursor is removed from that volume: r.t. ⁇ V/S.
  • reactant exposure times (a.k.a. pulse times, which, historically, have been of the order of or greater than a few hundred msec)
  • long residence time e.g., to conformally coat high aspect ratio devices. Since the reactor chamber volume and pressure are relatively constant, and the residence time is inversely proportional to the flow rate, in order to achieve longer residence time, lower flow rate is necessary.
  • long residence time is not desirable during the reactant removal time (purge time) because a longer residence time means a longer purge time. In order to achieve shorter residence time, higher flow rate is necessary. Therefore, there is a conflict between the needs of reactant exposure and reactant removal.
  • the present invention's use of a time-phased, multi-level flow overcomes this conflict by using different purge flow rates so that residence time of reactant molecules can be optimized in different periods of an ALD cycle. By doing so the overall ALD cycle time is reduced (over that required by conventional systems), allowing for greater wafer throughput. Importantly, the present invention achieves this advantage while at the same time not requiring the use of a continual, high flow purge which tends to be wasteful. Indeed, if the purge flow were simply increased over the entire ALD cycle, then the precursor would be driven out of the reactor chamber too fast during the exposure times and this adversely increases the exposure time. By using a relatively low flow rate during precursor exposure the present invention may, in some embodiments, actually allow for shortening the pulse time further helping to decrease the overall ALD cycle time.
  • some embodiments of the present invention utilize different purge gasses during the different ALD half-cycles. That is, a different purge gas may be used during the purge period than is used during the exposure period.
  • the collision theory of hard sphere may be used to estimate the number of collisions per unit volume per unit time for the purge gas “P” on the precursor “A” or “B.” See, e.g., K. J. Laidler, Chemical Kinetics, pp. 81-87 (1987).
  • the collision rate is: N p ⁇ N A ⁇ r 2 ⁇ (kT/m*) 1/2
  • N p is the concentration of purge gas
  • N A the concentration of precursor gas “A”
  • m* is the effective mass (m A m p /m A +m p ) of the purge and precursor molecules.
  • embodiments of the present invention provide for maintaining the reactor pressure nominally constant. Such a condition is desirable during ALD (and CVD) processes because it helps to keep particle contamination within the reactor chamber to a minimum. To understand why this is so, consider that all chemical deposition techniques are accompanied by parasitic deposition on the walls and surfaces of the reactor. After a certain total thickness and accumulation, the deposits flake off due to stress effects and provide secondary, macro-particle contamination. These particles may be up to microns in size (distinguishing them from much smaller, sub-micron sized particles caused by gas phase nucleation). Large variations in pressure within the reactor can result in the premature flaking off of these particles, a situation that aggravates the maintenance of the deposition reactor.
  • an empirically defined range of operational pressures acceptable for film deposition suggests a “substantially constant pressure” of approximately 1-3 times the baseline operating pressure may be suitable, but variations of pressure greater than five times the baseline pressure may be unsuitable (though in some cases such operation may be desirable to break turbulence that helps to eliminate precursors that may have become trapped in the reactor chamber).
  • an ALD reactor is controlled at a nominally constant pressure using a closed loop feedback controlled, or a command controlled open loop downstream throttle valve.
  • a closed loop feedback controlled, or a command controlled open loop downstream throttle valve By maintaining an acceptable, substantially constant pressure for the reactor, secondary, macro-particle contamination is minimized.
  • the throttle valve will move (at least initially) to a more closed position, which results in a longer residence time for the precursor in the reaction chamber. This is desirable during the pulse time, but undesirable during the purge time. Consequently, the present invention incorporates a bi- or multi-level purge flow capability in addition to the throttle valve.
  • the low purge flow is used during the exposure pulse (allowing for a relative increase the precursor exposure and increased chemisorption and chemical utilization in a given time) and the high purge flow is used during the purge (to reduce residence time of the residual precursor), providing an advantageous situation for both the exposure and purge half-cycles.
  • the present invention provides several alternative embodiments for the operation of time-phased, multi-level flow (TMF) ALD processes.
  • TMF time-phased, multi-level flow
  • One such method includes the use of two or more downstream pumps (or pump capacities if a single pump is used), switched substantially in time-phase with two or more upstream purge flows (e.g., between low and high levels).
  • This method may be used in either of two modes: mode I, without the second pump (pump capacity) to allow longer residence time during a lower flow level purge; or mode II, with the second pump (or pump capacity) switched on during the higher flow level purge.
  • the pressure can be maintained nominally constant if the higher-level flow is matched to the pumping capacity of the combined pumps (or higher pumping capacity if a single pump is used).
  • the purge flow is controlled by switching upstream, flow-limiting conductances (e.g., from a low to a high value for low and high flow, respectively) in time-phase with downstream conductances (e.g., from a low to a high level for low and high flow, respectively).
  • This method is referred to herein as “tracking conductance(s)” in the system.
  • This approach provides not only the ability to keep the pressure of the reactor nominally constant (as long as the fraction of upstream and downstream conductances are the same at any point in time during the switching cycle), but also allows for a wide dynamic range of purge flows.
  • the upstream switching conductances may be placed in a variety of configurations: for example, in series with or imbedded within a split-flow chemical manifold, or in parallel with the chemical delivery manifold lines.
  • the downstream switching conductances may also be placed in a variety of positions: for example, in the locale of the first downstream constriction just downstream from the reaction zone, or integrated as part of the downstream throttle valve (which in this case is controlled independently so as to assume designed positions or openings and is not used in a closed loop control mode).
  • a separate purge gas control line (which may also be called a direct-coupled conduit or DCC) independent of the chemical sourcing in the split-flow manifold, is fed into the reactor pump stack either above the throttle valve or below the throttle valve, or into the first constriction leading from the reaction space.
  • an independent control gas flow level may be set with an independent pressure regulator.
  • the source may be an independent gas type (e.g., N 2 or He) relative to that used as the main ALD reactor purge (e.g., Ar).
  • This independent purge gas control line may also be asynchronously timed relative to the period of the end of the exposure pulse (ahead of the period of the desired action), providing flexibility for optimizing the multi-level flows.
  • the independent higher temperature control of this line also provides better purge capability without promoting the decomposition of precursors with low decomposition temperatures.
  • the DCC may either pass parallel to the split-flow manifold, or be part of an ALD system that has all its sources directly coupled to the reactor.
  • the multi-level flow purge gas may pass in parallel to the chemical sourcing or serially through it.
  • a second neutral-purge conduit line can be added to the apparatus with appropriate fast gas switching valve arrangements.
  • a residual gas analyzer may be used to detect how precursor concentrations change. If the valves that control the purge lines are quite far away from the chamber, the response time may be unfavorably long (e.g., a couple of seconds).
  • valves may be placed suitably close to the chamber and/or larger diameter purge lines may be used between the upstream pressure sources and the chamber. All the controlling valves may be integrated into a common hub or block, ensuring minimal response time, as may be known in the art.
  • an ALD apparatus 400 having a second purge conduit that is introduced upstream of the chemical gas switching manifold and in parallel with the first purge conduit is provided.
  • This arrangement (which may be termed a dual flow purge manifold 403 ) is illustrated in FIG. 4 .
  • Both purge sources may be pressure controlled (e.g., using pressure controllers 409 and 411 ) with set points of pressure that can be widely different. Given the current state of the art, the pressure controllers 409 and 411 cannot be fast gas switched below several hundred milliseconds (however, future pressure controllers may allow for direct, fast electronic control).
  • valve 405 may be configured to actuate below a relatively low pressure suitable for use during the exposure pulse.
  • Valve 407 may be configured to actuate below a relatively high pressure, suitable for use during the purge period.
  • the precise timing for these valves to be switched on and off may be in a range of times around 10-30 msec.
  • the turn-on and turn-off times may not need to be nor want to be coincident with the turn-on and turn-off times of the exposure pulses. This allows for reliable software control for optimizing and minimizing the time between actual switchover between the exposure and purge flows within the reactor chamber 410 . This is discussed further below, in developing the concept of optimal time-phased, multi-level flow using asynchronous flow concepts.
  • the ALD apparatus 400 also has provision for a second pump 432 placed at a downstream location along with the first system pump 430 .
  • Pump 432 can be switched into operation by opening valve 434 at a time substantially coincident with the turn-on of the upstream, higher-pressure valve 407 .
  • the two pumps described here can be two physical pumps or two fractions of the pumping capacity of a single physical pump. The latter is referred to as virtual pump. If the conductance of valve 434 is appropriately selected the result can be the maintenance of nominally constant pressure during the entire ALD cycle.
  • Operation with this two level ALD purge apparatus 400 may be carried out advantageously in many modes, some of which are illustrated in the following tables.
  • the time elements reflected in the tables represent either a particular period, Tx, or a particular instant, t x , in time.
  • Graphical illustrations of these time periods and instances are reflected in FIG. 3B , however, the illustration of reactor pressure in the figure is not necessarily meant to correspond to the operational conditions reflected in the tables.
  • Operation Mode I non-constant pressure.
  • the downstream throttle valve 420 may be set at a fixed position: e.g., at a position corresponding to a desired reactor baseline pressure, or may be fixed as fully open (o).
  • the switching on of the upstream higher-level pressure through valve 407 may result in excursions of pressure in the reactor chamber 410 in the time frame of the pulse-purge operations.
  • pump 432 is not used and valve 434 is closed (c).
  • Operation Mode II nominally constant pressure.
  • the downstream throttle valve 420 may be set to a fixed position: e.g., at a position corresponding to a desired reactor baseline pressure, or may be fixed as fully open.
  • Table 2 the switching on of upstream, higher level pressures through valve 407 and the action of the downstream throttle valve 420 for switching into pump 432 via valve 434 may ensure that a correction towards or to the baseline reactor chamber pressure occurs in the time frame of the pulse-purge operations.
  • Additional configuration variations or combinations for different operational modes can, of course, be used.
  • One such configuration would be the passage of inert purge gas directly to the reactor (using an appropriate timing sequence) and run in parallel to by-pass the precursor-switching manifold 402 .
  • the flow of the additional purge gas can be increased during the purge step to provide for increase in the total flow and thus decrease the purge time.
  • This gas can be delivered through a specially designed gas manifold for optimal purge efficiency.
  • Variants on the design illustrated in FIG. 4 include an ALD apparatus having a pump and connecting valve (in place of or in addition to pump 432 and valve 434 ) that are connected to the pump stack above the throttle valve 420 .
  • the valve may be a parallel array of large diameter pneumatic switching valves, or a fast switching (e.g., on the order of or less than 100 msec) throttle valve.
  • Another variant includes a high flow purge source that is directly and independently connected to the rector 410 .
  • This high flow purge source would be independent of and parallel to the chemical switching manifold 402 .
  • the independent purge source (which may include multiple purge flows) may be either the high or low flow, the other being the purge taken from the chemical switching manifold 402 .
  • FIG. 5 one embodiment of an ALD apparatus 500 implementing such a conduit is shown in FIG. 5 .
  • the conduit 536 runs in parallel to bypass the split-flow manifold 502 in a manner that allows purge switching by valve 538 .
  • This high flow purge line is independent of the main purge line through the chemical switching manifold, which can be one or both of lines from pressure sources 509 and 511 .
  • Such an independent line may be used to limit the pumping speed during the exposure downstream to affect the effective pumping speed of the pump in the reactor zone.
  • the high flow is driven by pressure controller 540 and actuated by valve 538 during the purge.
  • the precursor chemicals may be injected with or without carrier gas and also with or without neutral gas from the purge, if valves 516 and 518 are closed during the exposure part of the cycle.
  • a DCC may be run from the downstream side of valve 507 (or 505 ) directly to the reactor 510 , bypassing (or not bypassing) the split-flow route.
  • independent precursor conduits may feed the ALD reactor and a DCC may be run in parallel therewith.
  • the DCC purge may be differentiated from the other lines feeding the reactor chamber by virtue of it containing only a high level of neutral gas flow during the purge periods, and/or by its relatively large conductance to promote purging of the reactor chamber relative to the precursor feed lines.
  • the DCC itself may be modified to permit two- or multi-level flow control (e.g., by replacing pressure controller 540 and valve 538 with a split- or multi-source manifold).
  • a lower flow level via the DCC 536 may be used during exposure and a higher one during purge.
  • either or both chemical precursors may be run without neutral gas dilution.
  • FIG. 6 Another embodiment, shown in FIG. 6 , may be used to implement the tracking conductances approach referred to above.
  • the upstream purge pressure is common and fixed, using pressure controller 642 .
  • the upstream flow By switching (e.g., via valves 644 and 646 ) the upstream flow through two different limiting conductances (e.g., metering valves) 648 and 650 , having low and high conductance values, respectively, the overall purge flow (low or high, respectively) may be set.
  • the low and high flows are substantially switched in time phase with the downstream conductances from a low to a high level (for low and high flow, respectively).
  • This approach provides the ability to keep the pressure of the reactor nominally constant as long as the fraction of upstream and downstream conductances are the same at any point during the switching cycle. Certainly this will be the case at the steady state set points of the exposure and purge periods. This solution provides both a wide dynamic range of purge flows as well as a design constrained to operate at nominally constant pressure.
  • the reactor pressure for a reactor of very large conductance (compared with the conductances in line from source 642 ) placed in series between an upstream flow limiting conductance and downstream flow limiting conductance can be approximated by an expression for the chamber pressure: P cham ⁇ u P ⁇ [(1/ d C)/(1/ d C+1/ u C)] (1), where u P is the upstream pressure that may be set with a pressure controller, and d C and u C are the downstream and upstream conductances, respectively.
  • the reciprocal conductances are proportional to the flow impedance, so at any constant flow the chamber pressure is just the ratio of pressure drop across the downstream impedance to the total impedance.
  • This model is used to write Eq. 1, and is analogous to that provided by an electrical circuit, with constant supply voltage Vs (analogous to the upstream pressure), and upstream series resistance, Ru (analogous to the upstream reciprocal conductance) and node voltage below Ru (analogous to the chamber pressure), a downstream resistance (analogous to the downstream reciprocal conductance) and a ground (analogous to the downstream pump).
  • Vs analogous to the upstream pressure
  • Ru analogous to the upstream reciprocal conductance
  • node voltage is given by: Vs ⁇ [Rd/(Rd+Ru)].
  • the upstream pressure is typically approximately several 10s to 100 Torr and the chamber pressure is approximately 100 mTorr to 1 Torr.
  • the typical impedance ratio, downstream to total, is a factor of 10-100.
  • ALD apparatus configured in accordance with the present invention typically provide flow rates for ratios in a range of up to approximately 100, though in some cases higher ratio values may exist because downstream impedance may be mainly determined by the position of the throttle valve (minimum) and pump capacity (maximum).
  • the total impedance to flow must be able to be changed by a factor of approximately 100 or more.
  • the value of d C at its lowest value is approximately 10 l/s (downstream throttle valve near closed)
  • the corresponding value of u C may be set by design to be approximately 0.5 l/s, providing a pressure drop of 21:1, but the flow is small and limited by the upstream restricting conductance.
  • the upstream pressure is 10 Torr
  • the chamber pressure will be 10/21 or approximately 500 mTorr and the flow is 10 ⁇ 0.5 Torr l/s. This represents the condition of the flow and pressures when the flow is in a low state.
  • the corresponding value of u C may be judiciously set by design to be approximately 50 l/s, again providing a pressure drop of 21:1, and the flow is now large and limited by the upstream restricting conductance.
  • the upstream pressure is 10 Torr
  • the chamber pressure will again be 10/21 or approximately 500 mTorr and the flow is 10 ⁇ 50 Torr l/s. This represents the condition of the flow and pressures when the flow is in a high state, which is 100 times the low state flow.
  • This example can be favorably generalized so that the pressure in the chamber remains nominally constant at all times in the ALD cycle. This can be done if the upstream and downstream conductances have factional values of their full range, which is always the same fraction: P cham ⁇ u P ⁇ [(1/ d f d C)/(1/ d f d C+1/ u f u C)] (2), where d f and u f are the fraction of the range of conductance of the downstream and upstream conductances, respectively.
  • the tracking conductances approach can be implemented using a DCC 736 .
  • the DCC gas pressure level may be set with an independent pressure regulator 742 and the source may be an independent gas type (e.g., N 2 or He) relative to that used as the main ALD reactor purge (e.g., Ar) from source 752 .
  • the tracking conductances 748 and 750 may be set for low (exposure) and high (purge) flow, respectively.
  • the switching valves, 744 and 746 may be set for low and high flows substantially coincident with the setting of the downstream conductance of the throttle valve 720 to achieve nominally constant pressure during exposure and purge.
  • the matching of the ratio of upstream and downstream conductances is designed to achieve a low flow during the exposure, corresponding to high residence times, and a high flow during precursor removal or purge, for low residence times.
  • substantially constant pressure in the reactor is achieved.
  • An alternative method to achieve constant pressure, but still with different flows, is to use independent, directly coupled conduit lines.
  • a first gas line may inject a purge flow at level “Fp” directly into the reaction space, and a second independent (separate) line directly coupled downstream from the reaction space may provide an appropriate flow level “Fe” to the pump.
  • the upstream and downstream flow values are selected so as to provide for nominally constant pressure (e.g., within a range of +/ ⁇ 50% of an average) to be achieved in the reactor during the periods of purge and exposure. In the case where small flow limiting conductances exist between the downstream injection position and the reaction space, the flows may be substantially the same.
  • the upstream purge may be selected to enhance entrainment of the precursor reactant for its removal. For example, Ar (having a relatively heavy mass) may be used to maximize the entrainment during purge. Heavier neutral gases (Kr, Xe, etc.), although more efficient as entrainment gases, are likely too expensive to use in commercial reactors.
  • the downstream purge may be selected to reduce cost as it is not active during the purge, and N 2 is the gas of choice (He being more expensive that N 2 ).
  • Another alternative is to route the independent gas control line to provide a flow to the pump 730 that reduces the effective pumping speed on the reaction chamber 710 during the exposure time, thus increasing the residence time of precursors therein.
  • the DCC line 736 would be routed to the zone between the throttle valve 720 and the pump 730 , rather than to the reactor 710 .
  • ALD apparatus 700 may allow for a multi-level flow source having an upstream regulated inlet pressure of 35 Torr, leading into a split-flow manifold.
  • the split-flow manifold may have a low flow branch set at 10 sccm as determined by a metered needle valve (e.g., type SSVR4) with a Cv of 0.005-0.03 and high flow branch set at 1000 sccm as determined by a metered valve (e.g., type SS-4BMRC-VCR) with a Cv of 0.05 to 0.3.
  • the purge flows may be input to the reaction zone (which may be at 200 mTorr) of the reactor independently of the A and B chemical supply flow line(s). Specifically, the purge flows may pass through a gas distribution module which has a flow coefficient (Cv) of more than 70 and which does not result in significant pressure drop, and from there through a perimeter orifice annulus (which has a Cv of more than 150) beyond the wafer perimeter to the lower part of the reactor vessel.
  • Cv flow coefficient
  • the gas path may be to and through a restriction set by a fast switching pressure control throttle valve (e.g., type VAT 61 with a 4′′ throat), leading to a 6′′ diameter foreline to a rough pump (e.g., type BOC Edwards iH1800) that can maintain gas flows well above 2000 sccm with a reactor pressure of 200 mTorr.
  • a fast switching pressure control throttle valve e.g., type VAT 61 with a 4′′ throat
  • a rough pump e.g., type BOC Edwards iH1800
  • the controllable conductance range for the throttle valve is 1 to 1400 l/s.
  • a flow of 100 sccm at a reactor pressure of 200 mTorr will require a conductance of 6.3 l/s and a flow of 1000 sccm will require a conductance of 63 l/s, both well within the range of the throttle valve.
  • the independent purge line provides the flexibility to optimize the minimization of exposure time. If the DCC switching is started ahead of the actuation of the exposure time by a time, dt, the effective pumping capacity at the point of the exit orifice to the reaction volume can be time-phased to be coincident with the arrival of precursor into the reaction volume. In this way, the delay of the reduced pumping speed arriving at the reaction chamber is matched with the arrival of the precursor through the upstream switching manifold. dt is given by the residence time of the precursor gas between the injecting valve and the reaction chamber and includes the conductances of connecting lines, orifices and distribution module (e.g., showerhead components).
  • asynchronous timing (AT) for optimizing the edges of the expose and removal periods in the cycle time. AT can be applied with any of the methods or apparatus of the present invention described herein.
  • the tracking conductance approach may be implemented using an annular throttle valve (ATV) 854 , as illustrated for the ALD apparatus 800 shown in FIG. 8 .
  • ATV 854 is used to adjust the conductance of an annular gas flow pathway in the reactor 810 so that the gas flow rate through the reactor can be adjusted.
  • ATV 854 When ATV 854 is open, it provides high conductance (i.e., high flow rate). Therefore the residence time of the reactant molecules is short.
  • an ATV 854 When an ATV 854 is closed, it provides low conductance (i.e., low flow rate). Therefore the residence time of the reactant molecules is long.
  • the residence time or the precursors can be adjusted according to different needs in exposure time and removal time.
  • This approach places a fast switching (e.g., less than or the order of 100 msec), limiting conductance as close to the reaction space as possible.
  • This provides the advantage of sharp residence time control, with minimal precursor backflow. That is, little or no precursor will flow through the low conductance state of the ATV and the effect on residence time will be felt with minimum delay.
  • the ATV 854 of the present invention is a throttle valve that adjusts the conductance of a conduit with annular cross section.
  • An ATV's conductance can be adjusted (e.g., opened, closed or moved to a position therebetween if more than just discrete modes are provided) electrically, magnetically, mechanically, pneumatically or by another method.
  • An ATV can be adapted to any convenient opening/closing configuration, and several examples of such configurations are shown in FIG. 9 . Each of these ATVs is designed to provide varying conductances through an opening 958 having an annular cross-section.
  • a wedge-shaped vane ATV 960 provides a means of continuous conductance adjustment.
  • This ATV has multiple wedge-shaped vanes 962 , each of which can rotate about its axis 964 (which in the illustration lies in the plane of the page).
  • the vane is in its fully closed position.
  • the ATV 960 is in its fully closed position and the conductance of the conduit is at minimum.
  • the plane of a vane is perpendicular to the plane of the wafer holder, it is at its fully open position.
  • the ATV 960 When all of the vanes are in this position the ATV 960 is fully open and the conductance of the conduit is at maximum.
  • the conductance of the conduit can be adjusted from its minimum (all vanes fully closed) to its maximum (all vanes fully open).
  • vanes that can assume positions other than fully open or fully closed so as to provide a ‘fine tuning’ ability in terms of regulating the conductance of the conduit.
  • a vane's weight and momentum of inertia should be minimized to allow for a fast response time.
  • a camera shutter (or iris diaphragm) ATV 966 also provides a means of continuous conductance adjustment.
  • This ATV has multiple blades 968 that move in the plane that is nearly parallel to the plane of the susceptor. It imitates a camera shutter movement except that a camera shutter closes from a certain diameter to zero diameter position while this ATV closes from the position of the outer diameter of the ring to the position of the inner diameter of the ring.
  • the inner diameter of the ring usually is very close to the diameter of the susceptor.
  • the conductance of the conduit can be continuously adjusted when the blades of camera shutter ATV 966 move from a fully open position to a fully closed position.
  • the third example in the illustration shows a baffle ATV 970 which allows for two-state (open & closed) operation.
  • This ATV consists of two identical annular pieces or blades, one on top of the other, with a group of holes 972 within each of them acting as conduits. When the holes of the two pieces coincide, gas can flow through the holes, and the ATV is said to be open. When the two pieces have an angular displacement with respect to one another such that none of the holes overlap, gas cannot flow and the ATV is said to be closed.
  • the conductance of the conduit can be turned on and off.
  • the conductance can be continuously adjusted between a fully open and a fully closed state.
  • this form of ATV can be adapted to have three, four or more modes of operation, each of which will provide varying numbers (and perhaps sizes) of open holes (and, hence, varying conductance) to allow gas to pass therethrough.
  • annular throttle valve Compared to a conventional throttle valve, an annular throttle valve is closer to the wafer, which makes chamber pressure response time shorter (due to the reduced volume above the valve). It also increases the efficiency of reactant usage. Compared to the “draw control chamber” method described by Sneh, an important advantage of an annular throttle valve is that it can prevent back diffusion to the reaction zone that interferes with the precursor distribution.
  • the ATV may be operated in a fashion very similar to that for the conventional throttle valve discussed above. In general, the ATV provides more efficient coupling with the upstream module that provides the time-phased multi-level flows.
  • Table 3 illustrates some operational modes for an ATV. TABLE 3 Operational Modes for ATV ATV position Flow in chamber Residence time Exposure Low Flow Low Long Removal High Flow High Short
  • the benefit in cycle time improvement for the plasma-assisted process may be quantitatively less than that for the thermal ALD case because plasma-assisted ALD cycles may be run without a purge period following the plasma-assisted half-reaction.
  • a plasma-assisted step at higher flow pressures may be advantageous in some applications.
  • a suitably designed electrode configuration for use with active purging during plasma may result in a limited reaction and a better controlled surface reaction during surface precursor adsorption for improved film quality.
  • sub-saturation ALD e.g., Transient Enhanced ALD and Starved Reaction ALD
  • self-limiting ALD reactions are either designed to just reach the onset of saturation or not permitted to go to completion.

Abstract

Different periods of an ALD cycle are performed using different purge flows and, in some cases, different pumping capacities, while maintaining the reactor chamber at a nominally constant pressure. The purge flows may, in some cases, utilize different gasses and/or may be provided through different flow paths. These operations provide for ALD cycle time improvements and economical operation with respect to consumables usage. In some embodiments the use of an annular throttle valve provides a means for controlling downstream flow limiting conductances in a gas flow path from the reactor chamber.

Description

    RELATED APPLICATION
  • This application is related to and hereby claims the priority benefit of U.S. Provisional Patent Application No. 60/455,034, entitled “Method and Apparatus for Cycle Time Improvement for ALD”, filed Mar. 14, 2003 assigned to the assignee of the present application and incorporated herein by reference.
  • FIELD OF THE INVENTION
  • The present invention relates to thin film processing and, more particularly, to methods and apparatus for improvement in the cycle time of Atomic Layer Deposition (ALD) processes.
  • BACKGROUND
  • In the field of material deposition, a process known as atomic layer deposition (ALD) has emerged as a promising candidate to extend the abilities of chemical vapor deposition (CVD) techniques. Generally ALD is a process wherein conventional CVD processes are divided into individual, sequential deposition steps that theoretically achieve saturation (and exhibit self-limited growth) at the level of a single molecular or atomic layer thickness. After each deposition step, unreacted chemical precursors used therein (and the unwanted byproducts of the reaction) must be removed from the reactor chamber. Existing techniques for doing so include the so-called “pump” or “evacuation” method and the “purge” or “flow” method. Of these, the purge or flow procedures have become the method of choice for commercial operation of ALD reactors because the efficiency of precursor removal by purge is improved over that provided by evacuation. See, e.g., M. Ritala and M. Leskela, “Deposition and Processing” in Handbook of Thin Film Materials, H. S. Nalwa (ed.), Vol. 1, Ch. 2 (2002).
  • In the purge or flow method, chemical molecular precursors are introduced separately into a reactor. Typically, each precursor exposure is followed by an inert gas purge to assist in the removal of the extra reactive precursor chemicals from the reactor just prior to the introduction of the next precursor. This sequence of steps may be repeated several times to provide for the complete formation of a desired material film. The total time to carry out the series of sequential steps or “periods” of: (i) exposure of precursor A, (ii) inert or neutral gas purge (for removal of unreacted precursor A), (iii) exposure of precursor B, and (iv) inert or neutral gas purge (for removal of unreacted precursor B), is called the “cycle time” (CT). The above 4 periods are called expose period of A, purge period of A, expose period of B, and purge period of B, respectively. The time period that consists of expose period of A and the following purge period of A is called half cycle A. Similarly, the time period that consists of expose period of B and the following purge period of B is called half cycle B.
  • To provide for greater wafer throughput, it is a goal of semiconductor manufacturers to reduce the CT of ALD processes. Many pulse/purge times are reported in the literature and it is commonly found that the purge times are long relative to the exposure pulse times. This is particularly true when very good film uniformity over large area substrates is desired. Thus, in the current state of the art, it is generally the purge component(s) of ALD cycles that provide(s) the limiting factors on the CT. Indeed, a typical case may utilize purge times 1.5-5 times longer than the exposure times. Note that this is true even in the case of plasma-assisted ALD processes in which only a single purge process is required. See, e.g., U.S. Pat. No. 6,200,893 of Sneh, assigned to the assignee of the present invention.
  • To provide for the desired increase in wafer throughput then, cycle time reductions, and in particular purge time reductions, are needed. One way in which this can be accomplished is to provide an increased flow for the purge gas. Providing the purge gas at a higher flow rate will tend to minimize the time needed to complete the purge period. However, given conventional ALD reactor designs (which utilize constant purge gas flow rates and strive to maintain constant reactor chamber pressures using a downstream throttle valve), this would tend to increase the required precursor exposure time. This is because the increased flow rate of the purge gas (which is used as a neutral carrier during the exposure periods) would tend to drive the chemical precursors out of the reactor chamber faster than would otherwise be the case at a lower purge gas flow rate. Hence, a greater loss of chemical precursor for a unit time interval could be expected and so increased exposure times would be necessary.
  • To avoid this situation, a bi-level purge gas flow rate could be implemented. That is, during precursor exposure a relatively low purge gas flow rate could be used (to maximize precursor residence time within the chamber) whereas during the purge period a relatively high purge gas flow rate could be used (to minimize the required purge time). The first known system to implement such a bi-level purge gas flow rate was developed in 1998 by Steven Shatas for Modular Process Technology of San Jose, Calif. (“MPT”). Later, in 1999, Shatas and MPT (working with one of its customers) combined the use of a bi-level purge gas flow driven by a pair of mass flow controllers with a fast-switching throttle valve downstream from the reactor chamber to permit control of both flow rate and reactor pressure. This system allowed operators to vary the residence time of the precursors during the ALD cycle, providing low residence time during precursor removal and high residence time during exposure.
  • More recently, a bi-level flow system using a purge bypass into a draw chamber (located downstream of the reactor chamber) during precursor exposure has been described by Sneh. See O. Sneh, WO 03/062490 A2, “ALD Apparatus and Method” (Jul. 31, 2003). In this so-called “synchronously modulated flow draw” (SMFD) process, a high flow rate through the reactor chamber is maintained during purge, but a low flow rate is used during deposition. The low flow rate is achieved by dumping a significant portion of the purge gas into the downstream draw chamber via a reactor bypass conduit. Thus, only a portion of the purge gas flow finds its way to the reactor chamber during the deposition sequence and so the chemical precursors are allowed to remain therein for a sufficient residence time.
  • Both the Shatas and Sneh systems for providing bi- or multi-level flows suffer from deficiencies. In the Shatas system, the dual purge source was provided using mass flow control components. These components are limited in their speed of response and also require ancillary flow (dumping) of the neutral purge gas during the period when the source is not injected into the reactor. This makes for relatively inefficient use of purge gas. Similarly, in the Sneh SMFD device the purge source bypasses the reactor during exposure, but the purge gas is always flowing at a high rate from its source. This tends to waste purge gas. Hence, new methods and apparatus for reducing the purge time while maintaining adequate precursor residence times are needed.
  • SUMMARY OF THE INVENTION
  • In one embodiment, the present invention provides for performing an expose period (which may, in some cases, be a plasma-assisted period) of an ALD process using a first purge flow and a first pumping capacity, and performing a purge period of the ALD process using a second purge flow greater than the first purge flow and a second pumping capacity greater than the first pumping capacity. These procedures may be performed while maintaining the reactor chamber within which the ALD process is performed at a nominally constant pressure, for example through the operation of a throttle valve downstream from the reactor chamber such that the throttle valve is more open during the purge period than during the expose period. The first purge flow and the second purge flow may, in some cases, utilize different gasses and/or may be provided through different flow paths.
  • In some cases, the second purge flow and second pumping capacity may be initiated prior to termination of material deposition during the expose period. Alternatively, or in addition, the second purge flow and second pumping capacity may be activated so as to break turbulence within the reactor chamber (e.g., to help in the removal of precursors). Also, a second expose period of the ALD process may be performed using a third purge flow and a third pumping capacity different from the first purge flow and first pumping capacity, respectively. In some cases, the third purge flow may be an absence of a purge flow.
  • In various embodiments, the first purge flow may be switched to the second purge flow: at a substantially coincident point in time as the first pumping capacity is switched to the second pumping capacity, prior to completion of material deposition during the expose period, or at a different point in time than that at which the first pumping capacity is switched to the second pumping capacity. In some cases, the purge flows may be switched by switching first flow limiting conductances located upstream of the reactor chamber out of a first gas flow path thereto at a substantially coincident point in time as second flow limiting conductances located downstream of the reactor chamber are switched out of a second gas flow path from the reactor chamber.
  • In still further embodiments, the present invention allows for performing, within a half cycle, an expose period of an ALD process using a first purge flow defined in part by a first conductance of an annular gas flow pathway within the reactor chamber, and performing a purge period of the ALD process using a second purge flow greater than the first purge flow, the second purge flow defined in part by a second conductance of the annular gas flow pathway within the reactor chamber. The pressure of the reactor chamber may be maintained so as to be nominally constant during the expose and purge period, and in some cases, the first purge flow and the second purge flow may utilize different gasses and/or be provided through different flow paths.
  • Still further embodiments of the present invention provide for performing an expose period of an ALD process using a first purge flow at a first pressure, the first purge flow passing through first flow limiting conductances located within a first gas flow pathway upstream of the reactor chamber and second flow limiting conductances located within a second gas flow pathway downstream of the reactor chamber, and performing a purge period of the ALD process using a second purge flow at a second pressure greater than the first pressure, the second purge flow passing through third flow limiting conductances located within the first gas flow pathway and fourth flow limiting conductances located in the second gas flow pathway, wherein a ratio of the first flow limiting conductances to the second flow limiting conductances is equal to a ratio of the third flow limiting conductances to the fourth flow limiting conductances and a pressure of the reactor chamber is maintained nominally constant during the ALD process.
  • Another embodiment provides an ALD system that includes a first purge flow pathway coupled upstream of a reactor; a second purge flow pathway coupled upstream of the reactor; and a pumping arrangement coupled downstream of the reactor, and configured to be switched between a first pumping capacity when the first purge flow pathway is active and a second pumping capacity greater than the first pumping capacity when the second purge flow pathway is active. The first and second purge flow pathways may share a common gas flow manifold with one or more precursor injection pathways, or at least one of the purge flow pathways may be directly coupled to the reactor independently of the other. In some cases, the first and second pumping capacities comprise two operational modes of a single physical pump.
  • Additional embodiments of the present invention provide an ALD system having a purge flow pathway coupled upstream of a reactor chamber through selectable upstream flow limiting conductances having two or more operational modes including a low flow mode and a high flow mode; and a pumping arrangement coupled downstream of the reactor through selectable downstream flow limiting conductances having two or more operational modes including a low flow mode and a high flow mode, wherein the upstream flow limiting conductances and downstream flow limiting conductances are configured to switch operational modes in time-phase with one another. The upstream flow limiting conductances may be configured to switch operational modes prior to the downstream flow limiting conductances switching operational modes. In some cases, the downstream flow limiting conductances include a throttle valve, which may be an annular throttle valve located within the reactor chamber.
  • Still further embodiments of the present invention provide an ALD system that includes a gas delivery system coupled to a reactor chamber having disposed therein an annular throttle valve positioned within a gas flow pathway from the reactor chamber to a pumping system coupled downstream of the reactor chamber. The annular throttle valve may have two or more operating modes, each configured to provide a different flow path conductance from the reactor chamber.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The present invention is illustrated by way of example, and not limitation, in the figures of the accompanying drawings in which:
  • FIG. 1 illustrates a conventional ALD processing apparatus having a split-flow gas manifold.
  • FIG. 2 illustrates conventional (idealized) baseline conditions for ALD reactor operation at constant pressure and flow.
  • FIG. 3A is a graph that illustrates variations in ALD reactor flows due to the introduction of chemical precursors.
  • FIG. 3B is a graph illustrating the effects of chemical precursor introduction on ALD reactor pressures.
  • FIG. 4 illustrates an ALD processing apparatus configured with a two-level purge source and dual pump capacity arrangement in accordance with an embodiment of the present invention.
  • FIG. 5 illustrates the use of a direct-coupled purge flow conduit in accordance with a further embodiment of the present invention.
  • FIG. 6 illustrates an ALD apparatus configured to provide for multi-level purge flows through the use of tracking conductances in accordance with yet another embodiment of the present invention.
  • FIG. 7 illustrates an ALD apparatus configured for tracking conductance operation using a direct-coupled purge gas conduit in accordance with another embodiment of the present invention.
  • FIG. 8 illustrates an ALD apparatus configured with an annular throttle valve in accordance with still another embodiment of the present inventions.
  • FIG. 9 illustrates various examples of annular throttle valves for use in accordance with embodiments of the present invention.
  • For ease of reference, reference numerals in the accompanying drawings typically are in the form “drawing number” followed by two digits, xx; for example, reference numerals on FIG. 4 may be numbered 4xx; on FIG. 5, reference numerals may be numbered 5xx, and so on. In certain cases, a reference numeral may be introduced on one drawing and the same reference numeral (with a different drawing number indicator) may be utilized on other drawings to refer to the same item.
  • DETAILED DESCRIPTION
  • Described herein are methods and systems for cycle time improvements in ALD processes. In various embodiments, the present invention provides multi-level flow sources using pressure controlled and/or passive conductance components combined with a dual (or, more generally multiple) pump (or dual or multiple pump capacity) arrangement. Unlike the multi-level flow systems described above, in the present invention a high purge flow does not have to flow during the exposure pulse, resulting in more economical operation with respect to consumables usage. Both lower cost and better dynamic time-dependent performance is obtained, in some embodiments, by the use of pressure controlled components instead of mass flow controllers. Further, in some embodiments the use of an independent, direct-coupled conduit for neutral gas flow, instead of a purge bypass, provides multi-level purge source capability without the need for continual operation of a high purge flow.
  • In addition to reduced consumables consumption, another benefit afforded by the two or multiple level flow purge operation of the present invention is better step coverage. To achieve better step coverage, higher exposure (defined as partial pressure multiplied by exposure time) is needed. By limiting the pumping rate and the dilution of the precursor, the present invention assures that more precursor molecules reach the extremes of high aspect ratio/high topology structures and/or the bottom of trenches in a given expose period.
  • It should be remembered that the various embodiments described herein are intended merely to illustrate systems and methods incorporating the present invention and are not to limit the overall scope of the invention. The principle of time-phased, multi-level flow to vary residence time during ALD processes may described in terms of a method for varying flows and also controlling pressure over the ALD cycle and there are many different ways to implement the procedure. For example, in the case of no limiting constraints, such as operation at non-constant reactor chamber pressure, an ideal sequence may be:
      • i) Close by command (or move toward the closed position) a downstream throttle valve during reactant exposure time. This allows the precursor to reside a sufficiently long enough time in the chamber to achieve substantially about or more than 99% completion of the saturating ALD half-reaction.
      • ii) Remove the extra precursor as quickly as possible. This may be done by driving the purge gas flow rate to higher values during the purge period by the switching action using an upstream higher-pressure level source.
        Where, however, the reactor chamber pressure is to be constrained at a nominally constant pressure, the present invention allows for the same by maintaining the throttle valve less open at low flow rates during reactant exposure and more open at high flow rates during purge. Further, because an ALD half-reaction for a first precursor (A) may be very different from that for a second precursor (B), the flow rates during the A cycle and the B cycle may be different. To accommodate the need for varying exposure flow rates due to different precursor requirements, the present invention provides for a “multi-value” or multi-level” flow rate, consisting of two or more flow levels.
  • In general then the present invention provides systems and methods that provide low flow levels concurrently matched to low pumping capacities during exposure times and high flow levels concurrently matched with higher pumping capacities during purge times. Other cycle time improvement techniques that are known in the art, such as those due to chemical delivery assistance using flow controllers or pressure controlled methods (see, e.g., U.S. Pat. No. 6,503,330, assigned to the assignee of the present invention and incorporated herein by reference), or ALD precursors delivered from “charge tubes” (see, e.g., Gadgil et al., WO0079019) or pressurized precursor volumes may be used in conjunction with the present methods and apparatus.
  • Before describing embodiments of the present invention in detail it is helpful to present some background regarding state of the art ALD reactor design. This will provide readers unfamiliar with the technology sufficient basis to better appreciate the present invention. Thus, we refer first to FIG. 1, which shows an ALD processing system 100 and is adapted from the above-cited U.S. Patent of the present assignee.
  • ALD processing system 100 includes a split-flow gas switching manifold 102, through which a neutral purge gas (from source 104) and one or more chemical sources (or process gasses) 106 and 108 may be delivered to reactor chamber 110. Neutral carrier gases may or may not accompany the chemical precursor. Within the chamber 110 is a heater assembly 112, upon which rests a semiconductor wafer 114. When both shut-off valves 116 and 118 are closed, and neutral purge gas flows through the reactor 110, baseline purge flow and pressure conditions are established. In general, the split-flow manifold can include one or more inject conduits to the reactor 110; and system 100 is illustrated with a dual inject.
  • Prior to precursor injection, the flows and pressure in the reactor 110 are determined by: the upstream pressure setting at purge gas source 104, the pressure setting at the reactor chamber 110 and the operation of the downstream throttle valve 120. The throttle valve 120 is part of a closed loop, feedback control system 122, which operates to keep the pressure in the reactor chamber constant (or nearly so) as the various chemical precursors are introduced into the reactor 110. Various “restrictors” and conduit conductance limitations as may be useful may be placed in the gas switching manifold 102 (e.g., in reactor purge pathways 126 and 124), but are not shown in detail. Where used such restrictors and conductances may also determine the quantitative pressure and flow values. Overall though, the split-flow architecture provides a nominally constant gas pressure and (continuous) flow background for ALD operation, as illustrated in FIG. 2.
  • Using a neutral carrier gas (that is distinct from the purge gas) precursor injections are carried out to move the precursor chemicals into the purge stream. That is, precursors are introduced to the purge stream from their respective sources 106, 108 via valves 116 and 118, respectively. This is done alternately and sequentially in time.
  • The condition for the injection into the purge stream at valve 116 (or 118) is established by the pressure value set just above the upstream position of valve 116 (or 118) by controller 117 (119). This allows precursor injection or blending into the purge gas stream on either side of the manifold 102. At the input 128 to the chamber, the two precursor lines open below the entrance to the reactor (forming multi-injects).
  • Once the flows of the carrier with precursor join the baseline purge flow, the overall flow in the reactor 110 will increase. If the carrier flow is small relative to the purge, which may be (and often is) the case, the increase in total flow and increase in reactor pressure will be small, but nevertheless observable, as shown in FIG. 3A. One reason for this pressure rise above the baseline value may be that the response time of the throttle valve 120 is long compared with that of the injection valves 116, 118. That is, the inertia of the throttle valve 120 may lead to fluctuations in the reactor pressure during the purge period. Typical response times for injection valves 116 and 118 may be on the order of 20-30 msec, whereas response times of a typical downstream throttle valve 120 may be on the order of 500-1000 msec (though throttle valves having response times of less than 100 msec have recently become available). Thus, the pressure in the reactor 110 may rise in coincidence with the increased flow.
  • In fact, the pressure in the reactor 110 may change and fluctuate above and below that of the baseline flow level both during and after the period of the exposure pulse as shown in FIG. 3B. Typically, the total reactor pressure is maintained during the middle and towards the end of the purge half-cycle, where the precursor's partial pressure is low enough to start the other precursor injection, because the throttle valve 120 and its closed-loop control system 122 have corrected to reestablish the desired reactor pressure. A well-designed system will exhibit a smooth decay of pressure vs. time.
  • Having thus described a state of the art ALD processing system, we turn now to a discussion of the present invention. As indicated above, the present invention makes use of a time-phased, multi-level flow to vary precursor residence time during ALD processes. Residence time is defined as the time it takes for a molecule of a reactant gas to move through a space (e.g., the reactor chamber) with a certain volume. If the pressure of the reactant gas is p, the volume of the space is V, and the flow rate is F, then the residence time r.t. is given by r.t. =pV/F. For example, if p=200 mTorr (0.2/760 Atm), V=1000 cm3, F=200 sccm (3.33 cm3/sec), then r.t. =0.079 sec=79 msec. Alternatively, or in addition, residence time may be expressed in terms of the reactor volume (V) and the effective pumping speed (S) at the orifice where the precursor is removed from that volume: r.t. ˜V/S.
  • During reactant exposure times (a.k.a. pulse times, which, historically, have been of the order of or greater than a few hundred msec), it is desirable to have long residence time (e.g., to conformally coat high aspect ratio devices). Since the reactor chamber volume and pressure are relatively constant, and the residence time is inversely proportional to the flow rate, in order to achieve longer residence time, lower flow rate is necessary. However, long residence time is not desirable during the reactant removal time (purge time) because a longer residence time means a longer purge time. In order to achieve shorter residence time, higher flow rate is necessary. Therefore, there is a conflict between the needs of reactant exposure and reactant removal.
  • The present invention's use of a time-phased, multi-level flow overcomes this conflict by using different purge flow rates so that residence time of reactant molecules can be optimized in different periods of an ALD cycle. By doing so the overall ALD cycle time is reduced (over that required by conventional systems), allowing for greater wafer throughput. Importantly, the present invention achieves this advantage while at the same time not requiring the use of a continual, high flow purge which tends to be wasteful. Indeed, if the purge flow were simply increased over the entire ALD cycle, then the precursor would be driven out of the reactor chamber too fast during the exposure times and this adversely increases the exposure time. By using a relatively low flow rate during precursor exposure the present invention may, in some embodiments, actually allow for shortening the pulse time further helping to decrease the overall ALD cycle time.
  • In addition to using time-phased, multi-level flow, some embodiments of the present invention utilize different purge gasses during the different ALD half-cycles. That is, a different purge gas may be used during the purge period than is used during the exposure period. To understand the rationale for this use of different purge gasses, consider the following. The collision theory of hard sphere may be used to estimate the number of collisions per unit volume per unit time for the purge gas “P” on the precursor “A” or “B.” See, e.g., K. J. Laidler, Chemical Kinetics, pp. 81-87 (1987). For two unlike molecules, the collision rate is:
    Np×NA×r2×(kT/m*)1/2
  • Here Np is the concentration of purge gas, NA the concentration of precursor gas “A” and m* is the effective mass (mAmp/mA+mp) of the purge and precursor molecules. This indicates that a higher concentration of purge gas density increases the collision rate and increases the forward momentum for removing the precursor gas. Although the collision rate is higher as the effective mass is lowered by 1/{square root}m*, the transferred momentum to the precursor gas is linear in the mass of the neutral purge gas molecule, so the choice of purge gases favors heavier masses by the square root of m*. In this respect, Ar with atomic mass 40 may be more favorable than N2 with atomic mass 28. Thus, in some embodiments of the present invention Ar is used during the purge period, while N2 may be used as an independent control gas during the exposure period to lower gas usage costs.
  • Finally, embodiments of the present invention provide for maintaining the reactor pressure nominally constant. Such a condition is desirable during ALD (and CVD) processes because it helps to keep particle contamination within the reactor chamber to a minimum. To understand why this is so, consider that all chemical deposition techniques are accompanied by parasitic deposition on the walls and surfaces of the reactor. After a certain total thickness and accumulation, the deposits flake off due to stress effects and provide secondary, macro-particle contamination. These particles may be up to microns in size (distinguishing them from much smaller, sub-micron sized particles caused by gas phase nucleation). Large variations in pressure within the reactor can result in the premature flaking off of these particles, a situation that aggravates the maintenance of the deposition reactor. Although there is no well-defined range over which reactor pressure must controlled in CVD or ALD processes, an empirically defined range of operational pressures acceptable for film deposition suggests a “substantially constant pressure” of approximately 1-3 times the baseline operating pressure may be suitable, but variations of pressure greater than five times the baseline pressure may be unsuitable (though in some cases such operation may be desirable to break turbulence that helps to eliminate precursors that may have become trapped in the reactor chamber).
  • In one embodiment of the present invention then, an ALD reactor is controlled at a nominally constant pressure using a closed loop feedback controlled, or a command controlled open loop downstream throttle valve. By maintaining an acceptable, substantially constant pressure for the reactor, secondary, macro-particle contamination is minimized. If the flow rate of the purge gas is rapidly reduced to a low value, the throttle valve will move (at least initially) to a more closed position, which results in a longer residence time for the precursor in the reaction chamber. This is desirable during the pulse time, but undesirable during the purge time. Consequently, the present invention incorporates a bi- or multi-level purge flow capability in addition to the throttle valve. If two purge flow levels (low and high) are used, the low purge flow is used during the exposure pulse (allowing for a relative increase the precursor exposure and increased chemisorption and chemical utilization in a given time) and the high purge flow is used during the purge (to reduce residence time of the residual precursor), providing an advantageous situation for both the exposure and purge half-cycles.
  • More generally, the present invention provides several alternative embodiments for the operation of time-phased, multi-level flow (TMF) ALD processes. One such method includes the use of two or more downstream pumps (or pump capacities if a single pump is used), switched substantially in time-phase with two or more upstream purge flows (e.g., between low and high levels). This method may be used in either of two modes: mode I, without the second pump (pump capacity) to allow longer residence time during a lower flow level purge; or mode II, with the second pump (or pump capacity) switched on during the higher flow level purge. The pressure can be maintained nominally constant if the higher-level flow is matched to the pumping capacity of the combined pumps (or higher pumping capacity if a single pump is used).
  • In a second method, the purge flow is controlled by switching upstream, flow-limiting conductances (e.g., from a low to a high value for low and high flow, respectively) in time-phase with downstream conductances (e.g., from a low to a high level for low and high flow, respectively). This method is referred to herein as “tracking conductance(s)” in the system. This approach provides not only the ability to keep the pressure of the reactor nominally constant (as long as the fraction of upstream and downstream conductances are the same at any point in time during the switching cycle), but also allows for a wide dynamic range of purge flows. The upstream switching conductances may be placed in a variety of configurations: for example, in series with or imbedded within a split-flow chemical manifold, or in parallel with the chemical delivery manifold lines. The downstream switching conductances may also be placed in a variety of positions: for example, in the locale of the first downstream constriction just downstream from the reaction zone, or integrated as part of the downstream throttle valve (which in this case is controlled independently so as to assume designed positions or openings and is not used in a closed loop control mode).
  • In a third method, a separate purge gas control line (which may also be called a direct-coupled conduit or DCC) independent of the chemical sourcing in the split-flow manifold, is fed into the reactor pump stack either above the throttle valve or below the throttle valve, or into the first constriction leading from the reaction space. Using this path an independent control gas flow level may be set with an independent pressure regulator. The source may be an independent gas type (e.g., N2 or He) relative to that used as the main ALD reactor purge (e.g., Ar). This independent purge gas control line may also be asynchronously timed relative to the period of the end of the exposure pulse (ahead of the period of the desired action), providing flexibility for optimizing the multi-level flows. The independent higher temperature control of this line also provides better purge capability without promoting the decomposition of precursors with low decomposition temperatures.
  • Generally, the DCC may either pass parallel to the split-flow manifold, or be part of an ALD system that has all its sources directly coupled to the reactor. Thus, the multi-level flow purge gas may pass in parallel to the chemical sourcing or serially through it. To demonstrate the idea, a second neutral-purge conduit line can be added to the apparatus with appropriate fast gas switching valve arrangements. A residual gas analyzer may be used to detect how precursor concentrations change. If the valves that control the purge lines are quite far away from the chamber, the response time may be unfavorably long (e.g., a couple of seconds). To minimize this problem valves may be placed suitably close to the chamber and/or larger diameter purge lines may be used between the upstream pressure sources and the chamber. All the controlling valves may be integrated into a common hub or block, ensuring minimal response time, as may be known in the art.
  • To achieve the multi-level purge methods described above, an ALD apparatus 400 having a second purge conduit that is introduced upstream of the chemical gas switching manifold and in parallel with the first purge conduit is provided. This arrangement (which may be termed a dual flow purge manifold 403) is illustrated in FIG. 4. Both purge sources may be pressure controlled (e.g., using pressure controllers 409 and 411) with set points of pressure that can be widely different. Given the current state of the art, the pressure controllers 409 and 411 cannot be fast gas switched below several hundred milliseconds (however, future pressure controllers may allow for direct, fast electronic control). We avoid this shortcoming by passing the pressurized gas through fast switching pneumatic valves (with conductances determined by the conduit lines, elbows, valve and any restrictor components in the lines between the pressure sources 409/411 down to and including the entrance 428 to the reactor 410). This implementation has each purge conduit leading to switching valves 405 and 407. These valves may be as fast (e.g., on the order of 20 msec) as are used for precursor injection valves 416 and 418.
  • Within the dual flow purge manifold 403, valve 405 may be configured to actuate below a relatively low pressure suitable for use during the exposure pulse. Valve 407, on the other hand, may be configured to actuate below a relatively high pressure, suitable for use during the purge period. The precise timing for these valves to be switched on and off may be in a range of times around 10-30 msec. The turn-on and turn-off times may not need to be nor want to be coincident with the turn-on and turn-off times of the exposure pulses. This allows for reliable software control for optimizing and minimizing the time between actual switchover between the exposure and purge flows within the reactor chamber 410. This is discussed further below, in developing the concept of optimal time-phased, multi-level flow using asynchronous flow concepts.
  • The ALD apparatus 400 also has provision for a second pump 432 placed at a downstream location along with the first system pump 430. Pump 432 can be switched into operation by opening valve 434 at a time substantially coincident with the turn-on of the upstream, higher-pressure valve 407. The two pumps described here can be two physical pumps or two fractions of the pumping capacity of a single physical pump. The latter is referred to as virtual pump. If the conductance of valve 434 is appropriately selected the result can be the maintenance of nominally constant pressure during the entire ALD cycle.
  • Operation with this two level ALD purge apparatus 400 may be carried out advantageously in many modes, some of which are illustrated in the following tables. The time elements reflected in the tables represent either a particular period, Tx, or a particular instant, tx, in time. Graphical illustrations of these time periods and instances are reflected in FIG. 3B, however, the illustration of reactor pressure in the figure is not necessarily meant to correspond to the operational conditions reflected in the tables.
  • Operation Mode I: non-constant pressure. In this mode of operation (illustrated in Table 1), the downstream throttle valve 420 may be set at a fixed position: e.g., at a position corresponding to a desired reactor baseline pressure, or may be fixed as fully open (o). The switching on of the upstream higher-level pressure through valve 407 may result in excursions of pressure in the reactor chamber 410 in the time frame of the pulse-purge operations. In this mode pump 432 is not used and valve 434 is closed (c).
    TABLE 1
    Operation at Non-constant Pressure
    Time:
    T1 t2 T3 t4 T5 t6 T7 t8 T9 (T1) t10 (t2)
    Function:
    Purge B Expose A Purge A Expose B Purge B
    Valve 416 c o o c c c c c c o
    Valve 405 c or o o o c c or o o o c c or o o
    Valve 418 c c c c c o o c c c
    Valve 407 o c c o o c c o o c
    Valve 434 c c c c c c c c c c
  • Operation Mode II: nominally constant pressure. Here, the downstream throttle valve 420 may be set to a fixed position: e.g., at a position corresponding to a desired reactor baseline pressure, or may be fixed as fully open. As illustrated in Table 2, the switching on of upstream, higher level pressures through valve 407 and the action of the downstream throttle valve 420 for switching into pump 432 via valve 434 may ensure that a correction towards or to the baseline reactor chamber pressure occurs in the time frame of the pulse-purge operations.
    TABLE 2
    Operation at Nominally Constant Pressure
    Time:
    T1 t2 T3 t4 T5 t6 T7 t8 T9 (T1) t10 (t2)
    Function:
    Purge B Expose A Purge A Expose B Purge B
    Valve 416 c o o c c c c c c o
    Valve 405 c or o o o c c or o o o c c or o o
    Valve 418 c c c c c o o c c c
    Valve 407 o c c o o c c o o c
    Valve 434 o c c o o c c o o c
  • Additional configuration variations or combinations for different operational modes can, of course, be used. One such configuration would be the passage of inert purge gas directly to the reactor (using an appropriate timing sequence) and run in parallel to by-pass the precursor-switching manifold 402. The flow of the additional purge gas can be increased during the purge step to provide for increase in the total flow and thus decrease the purge time. This gas can be delivered through a specially designed gas manifold for optimal purge efficiency.
  • Variants on the design illustrated in FIG. 4 include an ALD apparatus having a pump and connecting valve (in place of or in addition to pump 432 and valve 434) that are connected to the pump stack above the throttle valve 420. Such an arrangement may permit more efficient pumping. The valve may be a parallel array of large diameter pneumatic switching valves, or a fast switching (e.g., on the order of or less than 100 msec) throttle valve.
  • Another variant includes a high flow purge source that is directly and independently connected to the rector 410. This high flow purge source would be independent of and parallel to the chemical switching manifold 402. In this case the independent purge source (which may include multiple purge flows) may be either the high or low flow, the other being the purge taken from the chemical switching manifold 402.
  • With reference to the direct-coupled conduit (DCC) method described above, one embodiment of an ALD apparatus 500 implementing such a conduit is shown in FIG. 5. Here, the conduit 536 runs in parallel to bypass the split-flow manifold 502 in a manner that allows purge switching by valve 538. This high flow purge line is independent of the main purge line through the chemical switching manifold, which can be one or both of lines from pressure sources 509 and 511. Such an independent line may be used to limit the pumping speed during the exposure downstream to affect the effective pumping speed of the pump in the reactor zone. The high flow is driven by pressure controller 540 and actuated by valve 538 during the purge. The precursor chemicals may be injected with or without carrier gas and also with or without neutral gas from the purge, if valves 516 and 518 are closed during the exposure part of the cycle.
  • In alternative embodiments, a DCC may be run from the downstream side of valve 507 (or 505) directly to the reactor 510, bypassing (or not bypassing) the split-flow route. Or, where a non-split-flow manifold is used, independent precursor conduits may feed the ALD reactor and a DCC may be run in parallel therewith. In such a case, the DCC purge may be differentiated from the other lines feeding the reactor chamber by virtue of it containing only a high level of neutral gas flow during the purge periods, and/or by its relatively large conductance to promote purging of the reactor chamber relative to the precursor feed lines.
  • In still another embodiment, the DCC itself may be modified to permit two- or multi-level flow control (e.g., by replacing pressure controller 540 and valve 538 with a split- or multi-source manifold). In such an embodiment, a lower flow level via the DCC 536 may be used during exposure and a higher one during purge. In this configuration, either or both chemical precursors may be run without neutral gas dilution.
  • Another embodiment, shown in FIG. 6, may be used to implement the tracking conductances approach referred to above. In ALD apparatus 600, the upstream purge pressure is common and fixed, using pressure controller 642. By switching (e.g., via valves 644 and 646) the upstream flow through two different limiting conductances (e.g., metering valves) 648 and 650, having low and high conductance values, respectively, the overall purge flow (low or high, respectively) may be set. The low and high flows are substantially switched in time phase with the downstream conductances from a low to a high level (for low and high flow, respectively). This approach provides the ability to keep the pressure of the reactor nominally constant as long as the fraction of upstream and downstream conductances are the same at any point during the switching cycle. Certainly this will be the case at the steady state set points of the exposure and purge periods. This solution provides both a wide dynamic range of purge flows as well as a design constrained to operate at nominally constant pressure.
  • The reactor pressure for a reactor of very large conductance (compared with the conductances in line from source 642) placed in series between an upstream flow limiting conductance and downstream flow limiting conductance can be approximated by an expression for the chamber pressure:
    Pcham˜uP×[(1/dC)/(1/dC+1/uC)]  (1),
    where uP is the upstream pressure that may be set with a pressure controller, and dC and uC are the downstream and upstream conductances, respectively. The reciprocal conductances are proportional to the flow impedance, so at any constant flow the chamber pressure is just the ratio of pressure drop across the downstream impedance to the total impedance.
  • This model is used to write Eq. 1, and is analogous to that provided by an electrical circuit, with constant supply voltage Vs (analogous to the upstream pressure), and upstream series resistance, Ru (analogous to the upstream reciprocal conductance) and node voltage below Ru (analogous to the chamber pressure), a downstream resistance (analogous to the downstream reciprocal conductance) and a ground (analogous to the downstream pump). In this linear equivalent circuit, the node voltage is given by:
    Vs×[Rd/(Rd+Ru)].
    A key difference in the gas stream case is that the conductance elements may not be operating in a linear range with respect to their dependence on pressure. Nevertheless, regardless of the functional form of the pressure drop across the conductances, such a proportionality can be used.
  • The upstream pressure is typically approximately several 10s to 100 Torr and the chamber pressure is approximately 100 mTorr to 1 Torr. Thus the typical impedance ratio, downstream to total, is a factor of 10-100. ALD apparatus configured in accordance with the present invention typically provide flow rates for ratios in a range of up to approximately 100, though in some cases higher ratio values may exist because downstream impedance may be mainly determined by the position of the throttle valve (minimum) and pump capacity (maximum).
  • Considering the typical case then, the total impedance to flow must be able to be changed by a factor of approximately 100 or more. If the value of dC at its lowest value is approximately 10 l/s (downstream throttle valve near closed), the corresponding value of uC may be set by design to be approximately 0.5 l/s, providing a pressure drop of 21:1, but the flow is small and limited by the upstream restricting conductance. If the upstream pressure is 10 Torr, the chamber pressure will be 10/21 or approximately 500 mTorr and the flow is 10×0.5 Torr l/s. This represents the condition of the flow and pressures when the flow is in a low state.
  • If the value of dC at its highest value is approximately 1000 l/s (downstream throttle valve near open), the corresponding value of uC may be judiciously set by design to be approximately 50 l/s, again providing a pressure drop of 21:1, and the flow is now large and limited by the upstream restricting conductance. If the upstream pressure is 10 Torr, the chamber pressure will again be 10/21 or approximately 500 mTorr and the flow is 10×50 Torr l/s. This represents the condition of the flow and pressures when the flow is in a high state, which is 100 times the low state flow.
  • This example can be favorably generalized so that the pressure in the chamber remains nominally constant at all times in the ALD cycle. This can be done if the upstream and downstream conductances have factional values of their full range, which is always the same fraction:
    Pcham˜uP×[(1/dfdC)/(1/dfdC+1/ufuC)]  (2),
    where df and uf are the fraction of the range of conductance of the downstream and upstream conductances, respectively. If the ratio of df to uf (call it f) is always the same at any point in time and a common fraction f of the range of the conductance of the downstream and upstream valves or restrictors, the f values cancel in the expression and the pressure is canonically constant, Pcham˜uP×[(1/dC)/(1/dC+f/uC)].
  • As illustrated in FIG. 7, the tracking conductances approach can be implemented using a DCC 736. The DCC gas pressure level may be set with an independent pressure regulator 742 and the source may be an independent gas type (e.g., N2 or He) relative to that used as the main ALD reactor purge (e.g., Ar) from source 752. The tracking conductances 748 and 750 may be set for low (exposure) and high (purge) flow, respectively. The switching valves, 744 and 746, may be set for low and high flows substantially coincident with the setting of the downstream conductance of the throttle valve 720 to achieve nominally constant pressure during exposure and purge.
  • The matching of the ratio of upstream and downstream conductances (tracking conductances) is designed to achieve a low flow during the exposure, corresponding to high residence times, and a high flow during precursor removal or purge, for low residence times. By maintaining constant (or nearly so) the ratio of the conductances, substantially constant pressure in the reactor is achieved. An alternative method to achieve constant pressure, but still with different flows, is to use independent, directly coupled conduit lines. A first gas line may inject a purge flow at level “Fp” directly into the reaction space, and a second independent (separate) line directly coupled downstream from the reaction space may provide an appropriate flow level “Fe” to the pump. The upstream and downstream flow values are selected so as to provide for nominally constant pressure (e.g., within a range of +/−50% of an average) to be achieved in the reactor during the periods of purge and exposure. In the case where small flow limiting conductances exist between the downstream injection position and the reaction space, the flows may be substantially the same. The upstream purge may be selected to enhance entrainment of the precursor reactant for its removal. For example, Ar (having a relatively heavy mass) may be used to maximize the entrainment during purge. Heavier neutral gases (Kr, Xe, etc.), although more efficient as entrainment gases, are likely too expensive to use in commercial reactors. The downstream purge may be selected to reduce cost as it is not active during the purge, and N2 is the gas of choice (He being more expensive that N2).
  • Another alternative is to route the independent gas control line to provide a flow to the pump 730 that reduces the effective pumping speed on the reaction chamber 710 during the exposure time, thus increasing the residence time of precursors therein. In such an apparatus, the DCC line 736 would be routed to the zone between the throttle valve 720 and the pump 730, rather than to the reactor 710.
  • In one embodiment, ALD apparatus 700 may allow for a multi-level flow source having an upstream regulated inlet pressure of 35 Torr, leading into a split-flow manifold. The split-flow manifold may have a low flow branch set at 10 sccm as determined by a metered needle valve (e.g., type SSVR4) with a Cv of 0.005-0.03 and high flow branch set at 1000 sccm as determined by a metered valve (e.g., type SS-4BMRC-VCR) with a Cv of 0.05 to 0.3. The low flow branch may have a fast switching pneumatic valve (e.g., type Veriflo 955AOLP, Cv=0.55) positioned upstream of the needle valve. The purge flows may be input to the reaction zone (which may be at 200 mTorr) of the reactor independently of the A and B chemical supply flow line(s). Specifically, the purge flows may pass through a gas distribution module which has a flow coefficient (Cv) of more than 70 and which does not result in significant pressure drop, and from there through a perimeter orifice annulus (which has a Cv of more than 150) beyond the wafer perimeter to the lower part of the reactor vessel. From the reactor vessel the gas path may be to and through a restriction set by a fast switching pressure control throttle valve (e.g., type VAT 61 with a 4″ throat), leading to a 6″ diameter foreline to a rough pump (e.g., type BOC Edwards iH1800) that can maintain gas flows well above 2000 sccm with a reactor pressure of 200 mTorr. The controllable conductance range for the throttle valve is 1 to 1400 l/s. For such a system, a flow of 100 sccm at a reactor pressure of 200 mTorr will require a conductance of 6.3 l/s and a flow of 1000 sccm will require a conductance of 63 l/s, both well within the range of the throttle valve.
  • The independent purge line provides the flexibility to optimize the minimization of exposure time. If the DCC switching is started ahead of the actuation of the exposure time by a time, dt, the effective pumping capacity at the point of the exit orifice to the reaction volume can be time-phased to be coincident with the arrival of precursor into the reaction volume. In this way, the delay of the reduced pumping speed arriving at the reaction chamber is matched with the arrival of the precursor through the upstream switching manifold. dt is given by the residence time of the precursor gas between the injecting valve and the reaction chamber and includes the conductances of connecting lines, orifices and distribution module (e.g., showerhead components). We refer to this method as asynchronous timing (AT) for optimizing the edges of the expose and removal periods in the cycle time. AT can be applied with any of the methods or apparatus of the present invention described herein.
  • In still another embodiment, the tracking conductance approach may be implemented using an annular throttle valve (ATV) 854, as illustrated for the ALD apparatus 800 shown in FIG. 8. ATV 854 is used to adjust the conductance of an annular gas flow pathway in the reactor 810 so that the gas flow rate through the reactor can be adjusted. Recall that the residence time (r.t.) of a molecule in a space with volume V and flow rate F is given by r.t.=pV/F. When ATV 854 is open, it provides high conductance (i.e., high flow rate). Therefore the residence time of the reactant molecules is short. When an ATV 854 is closed, it provides low conductance (i.e., low flow rate). Therefore the residence time of the reactant molecules is long. Thus, by adjusting the ATV (e.g., between a fully open position and a fully closed position, or any positions therebetween) the residence time or the precursors can be adjusted according to different needs in exposure time and removal time.
  • This approach places a fast switching (e.g., less than or the order of 100 msec), limiting conductance as close to the reaction space as possible. This provides the advantage of sharp residence time control, with minimal precursor backflow. That is, little or no precursor will flow through the low conductance state of the ATV and the effect on residence time will be felt with minimum delay.
  • The ATV 854 of the present invention is a throttle valve that adjusts the conductance of a conduit with annular cross section. An ATV's conductance can be adjusted (e.g., opened, closed or moved to a position therebetween if more than just discrete modes are provided) electrically, magnetically, mechanically, pneumatically or by another method. An ATV can be adapted to any convenient opening/closing configuration, and several examples of such configurations are shown in FIG. 9. Each of these ATVs is designed to provide varying conductances through an opening 958 having an annular cross-section.
  • In a first example, a wedge-shaped vane ATV 960 provides a means of continuous conductance adjustment. This ATV has multiple wedge-shaped vanes 962, each of which can rotate about its axis 964 (which in the illustration lies in the plane of the page). When the plane of a vane is parallel to the plane of the wafer holder (susceptor), the vane is in its fully closed position. When all of the vanes (which may be independently controlled) are in this position, the ATV 960 is in its fully closed position and the conductance of the conduit is at minimum. When the plane of a vane is perpendicular to the plane of the wafer holder, it is at its fully open position. When all of the vanes are in this position the ATV 960 is fully open and the conductance of the conduit is at maximum. By varying the number of fully open or fully closed vanes, the conductance of the conduit can be adjusted from its minimum (all vanes fully closed) to its maximum (all vanes fully open). Of course, it is possible to implement vanes that can assume positions other than fully open or fully closed so as to provide a ‘fine tuning’ ability in terms of regulating the conductance of the conduit. In general, a vane's weight and momentum of inertia should be minimized to allow for a fast response time.
  • In a second example, a camera shutter (or iris diaphragm) ATV 966 also provides a means of continuous conductance adjustment. This ATV has multiple blades 968 that move in the plane that is nearly parallel to the plane of the susceptor. It imitates a camera shutter movement except that a camera shutter closes from a certain diameter to zero diameter position while this ATV closes from the position of the outer diameter of the ring to the position of the inner diameter of the ring. The inner diameter of the ring usually is very close to the diameter of the susceptor. The conductance of the conduit can be continuously adjusted when the blades of camera shutter ATV 966 move from a fully open position to a fully closed position.
  • The third example in the illustration shows a baffle ATV 970 which allows for two-state (open & closed) operation. This ATV consists of two identical annular pieces or blades, one on top of the other, with a group of holes 972 within each of them acting as conduits. When the holes of the two pieces coincide, gas can flow through the holes, and the ATV is said to be open. When the two pieces have an angular displacement with respect to one another such that none of the holes overlap, gas cannot flow and the ATV is said to be closed. By varying the annular displacement of the blades with respect to one another then, the conductance of the conduit can be turned on and off. If the displacement of the two blades can be controlled carefully so that the two groups of holes partly overlap with each other, the conductance can be continuously adjusted between a fully open and a fully closed state. Alternatively, or in addition, by varying the hole positions or increasing the number of blades (each possibly having different hole layouts and/or sizes) this form of ATV can be adapted to have three, four or more modes of operation, each of which will provide varying numbers (and perhaps sizes) of open holes (and, hence, varying conductance) to allow gas to pass therethrough.
  • Compared to a conventional throttle valve, an annular throttle valve is closer to the wafer, which makes chamber pressure response time shorter (due to the reduced volume above the valve). It also increases the efficiency of reactant usage. Compared to the “draw control chamber” method described by Sneh, an important advantage of an annular throttle valve is that it can prevent back diffusion to the reaction zone that interferes with the precursor distribution.
  • The ATV may be operated in a fashion very similar to that for the conventional throttle valve discussed above. In general, the ATV provides more efficient coupling with the upstream module that provides the time-phased multi-level flows. Table 3 illustrates some operational modes for an ATV.
    TABLE 3
    Operational Modes for ATV
    ATV position Flow in chamber Residence time
    Exposure Low Flow Low Long
    Removal High Flow High Short
  • Thus, methods and apparatus for cycle time improvements in ALD processes have been described. In the foregoing discussion the invention has been described with respect to various illustrated embodiments thereof, however, it should be remembered that these descriptions were for convenience only and should not be read as limiting the broader scope of the invention. For example, although the methods and apparatus described above were discussed with reference to thermal ALD, they are equally applicable to plasma-assisted ALD. In such cases one of the precursors may first be exposed with no plasma, followed by a high flow level purge operation, then a plasma-assisted exposure of the second precursor may be followed by either no purge or a higher flow level purge. The benefit in cycle time improvement for the plasma-assisted process may be quantitatively less than that for the thermal ALD case because plasma-assisted ALD cycles may be run without a purge period following the plasma-assisted half-reaction. Although a plasma-assisted step at higher flow pressures may be advantageous in some applications. In addition, one may choose to operate the purge in a neutral plasma mode, if the plasma purging has no deleterious effect of the deposited film on the substrate/wafer. A suitably designed electrode configuration for use with active purging during plasma may result in a limited reaction and a better controlled surface reaction during surface precursor adsorption for improved film quality. Finally, certain variants of classical ALD developed by some of the present inventors concurrently with the methods and apparatus described herein, such as sub-saturation ALD (e.g., Transient Enhanced ALD and Starved Reaction ALD) can be further enhanced by the use of the present methods and apparatus. In these processes, the self-limiting ALD reactions are either designed to just reach the onset of saturation or not permitted to go to completion. Thus, the full scope of the present invention should be measured only in terms of the claims, which follow.

Claims (55)

1. A method, comprising performing an expose period of an atomic layer deposition (ALD) process using a first purge flow and a first pumping capacity, and performing a purge period of the ALD process using a second purge flow greater than the first purge flow and a second pumping capacity greater than the first pumping capacity.
2. The method of claim 1, further comprising maintaining a pressure of a reactor chamber within which the ALD process is performed nominally constant during the expose period and the purge period.
3. The method of claim 2, wherein the pressure of the reactor chamber is maintained nominally constant through operation of a throttle valve downstream from the reactor chamber such that the throttle valve is more open during the purge period than during the expose period.
4. The method of claim 1, wherein the first purge flow and the second purge flow comprise different gasses.
5. The method of claim 1, wherein the first purge flow and the second purge flow are provided through different flow paths.
6. The method of claim 1, wherein the second purge flow and second pumping capacity are activated prior to termination of material deposition during the expose period.
7. The method of claim 1, wherein the second purge flow and second pumping capacity are activated so as to break existing turbulence within a reactor chamber within which the ALD process is performed.
8. The method of claim 1, further comprising performing a second expose period of the ALD process using a third purge flow and a third pumping capacity different from the first purge flow and first pumping capacity, respectively.
9. The method of claim 8, wherein the third purge flow comprises an absence of a purge flow.
10. The method of claim 1, wherein the expose period comprises a plasma-assisted process.
11. The method of claim 1, wherein the first purge flow is switched to the second purge flow at a substantially coincident point in time as the first pumping capacity is switched to the second pumping capacity.
12. The method of claim 11, wherein the first purge flow is switched to the second purge flow prior to completion of material deposition during the expose half-cycle.
13. The method of claim 1, wherein the first purge flow is switched to the second purge flow at a different point in time than that at which the first pumping capacity is switched to the second pumping capacity.
14. The method of claim 13, wherein the first purge flow is switched to the second purge flow before the first pumping capacity is switched to the second pumping capacity.
15. The method of claim 13, wherein the first purge flow is switched to the second purge flow after the first pumping capacity is switched to the second pumping capacity.
16. The method of claim 1, wherein the first purge flow is switched to the second purge flow by switching first flow limiting conductances located upstream of a reactor chamber within which the ALD process is performed out of a first gas flow path to the reactor chamber at a substantially coincident point in time as second flow limiting conductances located downstream of the reactor chamber are switched out of a second gas flow path from the reactor chamber.
17. A method, comprising performing a first period of an atomic layer deposition (ALD) cycle using a first purge flow defined in part by a first conductance of an annular gas flow pathway within a reactor chamber in which the ALD process takes place, and performing a second period of the ALD cycle using a second purge flow greater than the first purge flow, the second purge flow defined in part by a second conductance of the annular gas flow pathway within the reactor chamber.
18. The method of claim 17, further comprising maintaining a pressure of the reactor chamber nominally constant during the first period and the second period.
19. The method of claim 17, wherein the first purge flow and the second purge flow comprise different gasses.
20. The method of claim 17, wherein the first purge flow and the second purge flow are provided through different flow paths.
21. The method of claim 17, wherein the second purge flow is activated prior to termination of material deposition during the first period.
22. The method of claim 17, further comprising performing a third period of the ALD cycle using a third purge flow defined in part by a third conductance of the annular gas flow pathway and different from the first and second purge flows.
23. The method of claim 22, wherein the third purge flow comprises an absence of a purge flow.
24. The method of claim 17, wherein the first period comprises a plasma-assisted process.
25. The method of claim 1, wherein the first purge flow is switched to the second purge flow in part by switching first flow limiting conductances located upstream of the reactor chamber out of a first gas flow path to the reactor chamber at a substantially coincident point in time as the second conductance of the annular gas flow pathway within the reactor chamber is switched into a second gas flow path from the reactor chamber.
26. A method, comprising performing an expose period of an atomic layer deposition (ALD) process using a first purge flow at a first pressure, the first purge flow passing through a first flow limiting conductance located within a first gas flow pathway upstream of a reactor chamber within which the ALD process is performed and a second flow limiting conductance located within a second gas flow pathway downstream of the reactor chamber, and performing a purge period of the ALD process using a second purge flow at a second pressure greater than the first pressure, the second purge flow passing through a third conductance located within the first gas flow pathway and a fourth conductance located in the second gas flow pathway, wherein a ratio of the first conductance to the second conductance is equal to a ratio of the third conductance to the fourth conductance and a pressure of the reactor chamber is maintained nominally constant during the ALD process.
27. The method of claim 26, wherein a second purge gas used for the second purge flow is different from a first purge gas used for the first purge flow.
28. The method of claim 26, wherein the expose period comprises a plasma-assisted process.
29. The method of claim 26, wherein the first purge flow is switched to the second purge flow at a substantially coincident point in time as the first conductance within the first gas flow pathway is switched to the third conductance.
30. The method of claim 26, wherein the first purge flow is switched to the second purge flow prior to completion of material deposition during the expose period.
31. The method of claim 26, wherein the first purge flow is switched to the second purge flow at a different point in time than that at which the second conductance in the second gas flow pathway is switched to the fourth conductance.
32. An atomic layer deposition (ALD) system, comprising:
a first purge flow pathway coupled upstream of a reactor;
a second purge flow pathway coupled upstream of the reactor; and
a pumping arrangement coupled downstream of the reactor, and configured to be switched between a first pumping capacity when the first purge flow pathway is active and a second pumping capacity greater than the first pumping capacity when the second purge flow pathway is active.
33. The ALD system of claim 32, wherein the first and second purge flow pathways share a common gas flow manifold with one or more precursor injection pathways.
34. The ALD system of claim 32, wherein at least one of the first and second purge flow pathways is directly coupled to the reactor independently of the other.
35. The ALD system of claim 32, wherein the first and second pumping capacities comprise two operational modes of a single physical pump.
36. The ALD system of claim 32, further comprising a throttle valve downstream of the reactor chamber.
37. The ALD system of claim 36, wherein the second pumping capacity is provided, at least in part, by a physical pump coupled downstream of the reactor chamber but upstream of the throttle valve.
38. The ALD system of claim 36, wherein the first and second pumping capacities are provided by one or more pumps coupled downstream of the throttle valve.
39. The ALD system of claim 32, wherein the first and second purge flow pathways are configured to operate at first and second purge gas pressures, respectively, the first pressure being less than the second pressure.
40. The ALD system of claim 39, wherein the first and second purge flow pathways share a common gas flow manifold with one or more precursor injection pathways.
41. The ALD system of claim 39, wherein at least one of the first and second purge flow pathways is directly coupled to the reactor independently of the other.
42. An atomic layer deposition (ALD) system, comprising:
a purge flow pathway coupled upstream of a reactor chamber through selectable upstream flow limiting conductances having two or more operational modes including a low flow mode and a high flow mode; and
a pumping arrangement coupled downstream of the reactor through selectable downstream flow limiting conductances having two or more operational modes including a low flow mode and a high flow mode,
wherein the upstream flow limiting conductances and downstream flow limiting conductances are configured to switch operational modes in time-phase with one another.
43. The ALD apparatus of claim 42, wherein the upstream flow limiting conductances are configured to switch operational modes prior to the downstream flow limiting conductances switching operational modes.
44. The ALD apparatus of claim 42, wherein the downstream flow limiting conductances include a throttle valve.
45. The ALD apparatus of claim 44, wherein the throttle valve comprises an annular throttle valve located within the reactor chamber.
46. The ALD apparatus of claim 42, wherein the purge flow pathway comprises multiple gas flow pathways for purge gasses and chemical precursors which share one or more common inputs to the reactor chamber.
47. The ALD apparatus of claim 46, wherein at least one of the purge gas flow pathways is independent of the gas flow pathways for the chemical precursors.
48. An atomic layer deposition (ALD) system, comprising a gas delivery system coupled to a reactor chamber having disposed therein an annular throttle valve positioned within a gas flow pathway from the reactor chamber to a pumping system coupled downstream of the reactor chamber.
49. The ALD system of claim 48, wherein the annular throttle valve has two or more operating modes, each configured to provide a different flow path conductance from the reactor chamber.
50. The ALD system of claim 49, wherein the gas delivery system is configured to provide purge flows at two or more flow levels.
51. The ALD system of claim 50, wherein the annular throttle valve is coupled to a control system configured to switch operating modes of the annular throttle valve according to a level of purge flow so as to maintain a nominally constant reactor chamber pressure.
52. The ALD system of claim 48, wherein the annular throttle valve includes multiple vanes, each having an axis therethrough about which an individual vane rotates from a first position to a second position.
53. The ALD system of claim 48, wherein the annular throttle valve includes multiple blades arranged in an iris configuration.
54. The ALD system of claim 48, wherein the annular throttle valve includes multiple blades, each having a number of holes therethrough, at least one of the blades being rotatable about an axis such that holes extending through the rotatable blade align with holes of at least one of the other blades to provide a passage through the annular throttle valve.
55. An ALD apparatus, comprising a first neutral gas line configured to inject an Ar gas flow level into a reaction space during a purge period of an ALD cycle, and a distinct, second neutral gas line configured to inject an N2 gas flow level downstream of the reaction space, the gas flow levels being selected so as to provide for substantially constant pressure in the reaction space.
US10/791,030 2003-03-14 2004-03-01 Methods and apparatus for cycle time improvements for atomic layer deposition Abandoned US20050016956A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/791,030 US20050016956A1 (en) 2003-03-14 2004-03-01 Methods and apparatus for cycle time improvements for atomic layer deposition

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45503403P 2003-03-14 2003-03-14
US10/791,030 US20050016956A1 (en) 2003-03-14 2004-03-01 Methods and apparatus for cycle time improvements for atomic layer deposition

Publications (1)

Publication Number Publication Date
US20050016956A1 true US20050016956A1 (en) 2005-01-27

Family

ID=33029946

Family Applications (1)

Application Number Title Priority Date Filing Date
US10/791,030 Abandoned US20050016956A1 (en) 2003-03-14 2004-03-01 Methods and apparatus for cycle time improvements for atomic layer deposition

Country Status (6)

Country Link
US (1) US20050016956A1 (en)
EP (1) EP1613792B1 (en)
JP (1) JP4734231B2 (en)
KR (1) KR101416781B1 (en)
CN (1) CN1777696B (en)
WO (1) WO2004083485A2 (en)

Cited By (292)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040083962A1 (en) * 2002-08-15 2004-05-06 Applied Materials, Inc. Clog-resistant gas delivery system
US20040226507A1 (en) * 2003-04-24 2004-11-18 Carpenter Craig M. Methods for controlling mass flow rates and pressures in passageways coupled to reaction chambers and systems for depositing material onto microfeature workpieces in reaction chambers
US20050016984A1 (en) * 2002-08-15 2005-01-27 Dando Ross S. Reactors with isolated gas connectors and methods for depositing materials onto micro-device workpieces
US20050016453A1 (en) * 2003-04-23 2005-01-27 Seidel Thomas E. Collection of unused precursors in ALD
US20050022739A1 (en) * 2002-07-08 2005-02-03 Carpenter Craig M. Apparatus and method for depositing materials onto microelectronic workpieces
US20050028734A1 (en) * 2003-02-11 2005-02-10 Carpenter Craig M. Reactors with isolated gas connectors and methods for depositing materials onto micro-device workpieces
US20050039680A1 (en) * 2003-08-21 2005-02-24 Beaman Kevin L. Methods and apparatus for processing microfeature workpieces; methods for conditioning ALD reaction chambers
US20050045102A1 (en) * 2003-08-28 2005-03-03 Zheng Lingyi A. Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces
US20050059261A1 (en) * 2003-09-17 2005-03-17 Cem Basceri Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces
US20050070121A1 (en) * 2003-09-30 2005-03-31 Kuse Ronald John Variable temperature and dose atomic layer deposition
US20050087302A1 (en) * 2003-10-10 2005-04-28 Mardian Allen P. Apparatus and methods for manufacturing microfeatures on workpieces using plasma vapor processes
US20050126489A1 (en) * 2003-12-10 2005-06-16 Beaman Kevin L. Methods and systems for controlling temperature during microfeature workpiece processing, e.g., CVD deposition
US20050170662A1 (en) * 2004-02-02 2005-08-04 Oosterlaken Theodorus G.M. Method and apparatus for processing semiconductor substrates
US20050249873A1 (en) * 2004-05-05 2005-11-10 Demetrius Sarigiannis Apparatuses and methods for producing chemically reactive vapors used in manufacturing microelectronic devices
US20050249887A1 (en) * 2004-05-06 2005-11-10 Dando Ross S Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces
US20050268856A1 (en) * 2004-06-02 2005-12-08 Miller Matthew W Reactors, systems and methods for depositing thin films onto microfeature workpieces
US20060147626A1 (en) * 2004-12-30 2006-07-06 Blomberg Tom E Method of pulsing vapor precursors in an ALD reactor
US20060154383A1 (en) * 2002-08-30 2006-07-13 Tokyo Electron Limited Processing apparatus and processing method
US20060165873A1 (en) * 2005-01-25 2006-07-27 Micron Technology, Inc. Plasma detection and associated systems and methods for controlling microfeature workpiece deposition processes
US20060198955A1 (en) * 2003-08-21 2006-09-07 Micron Technology, Inc. Microfeature workpiece processing apparatus and methods for batch deposition of materials on microfeature workpieces
US20060237138A1 (en) * 2005-04-26 2006-10-26 Micron Technology, Inc. Apparatuses and methods for supporting microelectronic devices during plasma-based fabrication processes
US20060269693A1 (en) * 2005-05-26 2006-11-30 Applied Materials, Inc. Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure
US20070158025A1 (en) * 2006-01-11 2007-07-12 Lam Research Corporation Gas switching section including valves having different flow coefficients for gas distribution system
WO2007099490A1 (en) * 2006-02-28 2007-09-07 Nxp B.V. Processing assembly and method for processing a batch of wafers
US20070259110A1 (en) * 2006-05-05 2007-11-08 Applied Materials, Inc. Plasma, uv and ion/neutral assisted ald or cvd in a batch tool
US20070259111A1 (en) * 2006-05-05 2007-11-08 Singh Kaushal K Method and apparatus for photo-excitation of chemicals for atomic layer deposition of dielectric film
WO2007142850A2 (en) * 2006-06-02 2007-12-13 Applied Materials Gas flow control by differential pressure measurements
US20080020591A1 (en) * 2005-05-26 2008-01-24 Applied Materials, Inc. Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ uv cure
WO2008011579A2 (en) * 2006-07-21 2008-01-24 Aixtron, Inc. Small volume symmetric flow single wafer ald apparatus
US20080029028A1 (en) * 2003-09-18 2008-02-07 Micron Technology, Inc. Systems and methods for depositing material onto microfeature workpieces in reaction chambers
US20080075881A1 (en) * 2006-07-26 2008-03-27 Won Seok-Jun Method of Forming A Metallic Oxide Film Using Atomic Layer Deposition
US20080199613A1 (en) * 2007-02-21 2008-08-21 Micron Technology, Inc. Thermal chemical vapor deposition methods, and thermal chemical vapor deposition systems
US20080286491A1 (en) * 2007-01-31 2008-11-20 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US20100012036A1 (en) * 2008-07-11 2010-01-21 Hugo Silva Isolation for multi-single-wafer processing apparatus
US20110067632A1 (en) * 2009-09-21 2011-03-24 Sierra Solar Power, Inc. Stackable multi-port gas nozzles
DE102011104132B3 (en) * 2011-06-14 2012-11-29 Oliver Feddersen-Clausen Plasma assisted atomic layer deposition useful for forming thin layer on substrate, in reaction zone, comprises carrying out coating cycles, rinsing reaction area and converting adsorbed fraction of layer-forming process gas into thin layer
WO2013016532A1 (en) * 2011-07-28 2013-01-31 Mks Instruments, Inc. Systems for and methods of controlling time-multiplexed deep reactive-ion etching processes
US20130203267A1 (en) * 2012-02-06 2013-08-08 Asm Ip Holding B.V. Multiple vapor sources for vapor deposition
US20130237063A1 (en) * 2012-03-09 2013-09-12 Seshasayee Varadarajan Split pumping method, apparatus, and system
US20140014742A1 (en) * 2012-07-13 2014-01-16 Omniprobe, Inc. Gas injection system for energetic-beam instruments
US20140302346A1 (en) * 2006-06-08 2014-10-09 Hoya Corporation Glass for use as substrate for information recording medium, substrate for information recording medium and information recording medium, and their production methods
US20150000707A1 (en) * 2013-06-28 2015-01-01 Tokyo Electron Limited Cleaning method and processing apparatus
US20150087159A1 (en) * 2013-09-26 2015-03-26 Hitachi Kokusai Electric Inc. Substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer readable recording medium
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US20150206713A1 (en) * 2014-01-20 2015-07-23 Tokyo Electron Limited Plasma processing apparatus
US9240513B2 (en) 2010-05-14 2016-01-19 Solarcity Corporation Dynamic support system for quartz process chamber
US9267605B2 (en) 2011-11-07 2016-02-23 Lam Research Corporation Pressure control valve assembly of plasma processing chamber and rapid alternating process
US9391230B1 (en) 2015-02-17 2016-07-12 Solarcity Corporation Method for improving solar cell manufacturing yield
US9390841B2 (en) 2012-11-19 2016-07-12 Samsung Display Co., Ltd. Vapor deposition apparatus, method of forming thin film using the same and method of manufacturing organic light-emitting display apparatus
US9441295B2 (en) 2010-05-14 2016-09-13 Solarcity Corporation Multi-channel gas-delivery system
US9748434B1 (en) 2016-05-24 2017-08-29 Tesla, Inc. Systems, method and apparatus for curing conductive paste
US9954136B2 (en) 2016-08-03 2018-04-24 Tesla, Inc. Cassette optimized for an inline annealing system
US9972740B2 (en) 2015-06-07 2018-05-15 Tesla, Inc. Chemical vapor deposition tool and process for fabrication of photovoltaic structures
US20180171477A1 (en) * 2016-12-19 2018-06-21 Asm Ip Holding B.V. Substrate processing apparatus
US10115856B2 (en) 2016-10-31 2018-10-30 Tesla, Inc. System and method for curing conductive paste using induction heating
US20190368038A1 (en) * 2018-06-01 2019-12-05 Asm Ip Holding B.V. Systems and methods for controlling vapor phase processing
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10720331B2 (en) 2016-11-01 2020-07-21 ASM IP Holdings, B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10734223B2 (en) 2017-10-10 2020-08-04 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10741385B2 (en) 2016-07-28 2020-08-11 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10784102B2 (en) 2016-12-22 2020-09-22 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10787741B2 (en) 2014-08-21 2020-09-29 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10832903B2 (en) 2011-10-28 2020-11-10 Asm Ip Holding B.V. Process feed management for semiconductor substrate processing
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US10844486B2 (en) 2009-04-06 2020-11-24 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10851456B2 (en) 2016-04-21 2020-12-01 Asm Ip Holding B.V. Deposition of metal borides
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10943771B2 (en) 2016-10-26 2021-03-09 Asm Ip Holding B.V. Methods for thermally calibrating reaction chambers
USD913980S1 (en) 2018-02-01 2021-03-23 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11004977B2 (en) 2017-07-19 2021-05-11 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11094546B2 (en) 2017-10-05 2021-08-17 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US11094582B2 (en) 2016-07-08 2021-08-17 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11101370B2 (en) 2016-05-02 2021-08-24 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11168395B2 (en) 2018-06-29 2021-11-09 Asm Ip Holding B.V. Temperature-controlled flange and reactor system including same
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11387120B2 (en) 2017-09-28 2022-07-12 Asm Ip Holding B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11410851B2 (en) 2017-02-15 2022-08-09 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US11417545B2 (en) 2017-08-08 2022-08-16 Asm Ip Holding B.V. Radiation shield
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11447861B2 (en) * 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11501956B2 (en) 2012-10-12 2022-11-15 Asm Ip Holding B.V. Semiconductor reaction chamber showerhead
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11610775B2 (en) 2016-07-28 2023-03-21 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11649546B2 (en) 2016-07-08 2023-05-16 Asm Ip Holding B.V. Organic reactants for atomic layer deposition
US11658030B2 (en) 2017-03-29 2023-05-23 Asm Ip Holding B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11676812B2 (en) 2016-02-19 2023-06-13 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top/bottom portions
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11742189B2 (en) 2015-03-12 2023-08-29 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11788190B2 (en) 2019-07-05 2023-10-17 Asm Ip Holding B.V. Liquid vaporizer
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11802338B2 (en) 2017-07-26 2023-10-31 Asm Ip Holding B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11848200B2 (en) 2017-05-08 2023-12-19 Asm Ip Holding B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11923190B2 (en) 2018-07-03 2024-03-05 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11946136B2 (en) 2019-09-20 2024-04-02 Asm Ip Holding B.V. Semiconductor processing device
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11952658B2 (en) 2022-10-24 2024-04-09 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070224708A1 (en) * 2006-03-21 2007-09-27 Sowmya Krishnan Mass pulse sensor and process-gas system and method
WO2009142905A1 (en) * 2008-05-20 2009-11-26 Sundew Technologies, Llc Deposition method and apparatus
US9388494B2 (en) 2012-06-25 2016-07-12 Novellus Systems, Inc. Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region
JP6167673B2 (en) 2013-05-31 2017-07-26 東京エレクトロン株式会社 Film forming apparatus, film forming method, and storage medium
JP6258657B2 (en) * 2013-10-18 2018-01-10 東京エレクトロン株式会社 Film forming method and film forming apparatus
KR101535155B1 (en) * 2014-01-09 2015-07-09 주식회사 유진테크 Apparatus for processing substrate
US9617638B2 (en) * 2014-07-30 2017-04-11 Lam Research Corporation Methods and apparatuses for showerhead backside parasitic plasma suppression in a secondary purge enabled ALD system
US20180046206A1 (en) * 2016-08-13 2018-02-15 Applied Materials, Inc. Method and apparatus for controlling gas flow to a process chamber
KR102065243B1 (en) * 2017-05-01 2020-01-10 도쿄엘렉트론가부시키가이샤 Film forming method and film forming apparatus
US10927459B2 (en) * 2017-10-16 2021-02-23 Asm Ip Holding B.V. Systems and methods for atomic layer deposition
KR102283500B1 (en) * 2017-12-21 2021-07-29 주식회사 원익아이피에스 Method of depositing thin film
KR102269347B1 (en) * 2017-12-21 2021-06-28 주식회사 원익아이피에스 Method of depositing thin film
KR102414102B1 (en) * 2018-11-08 2022-06-30 주식회사 원익아이피에스 Method for Depositing Thin Film
CN109518164A (en) * 2018-12-20 2019-03-26 北京北方华创微电子装备有限公司 Atomic layer deposition apparatus and method
JP7300898B2 (en) * 2019-06-11 2023-06-30 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
CN110318040B (en) * 2019-07-29 2021-11-30 陕西煤业化工技术研究院有限责任公司 Atomic layer deposition system
CN112992741A (en) * 2021-03-04 2021-06-18 长江存储科技有限责任公司 Semiconductor processing apparatus and exhaust method

Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4747367A (en) * 1986-06-12 1988-05-31 Crystal Specialties, Inc. Method and apparatus for producing a constant flow, constant pressure chemical vapor deposition
US5070813A (en) * 1989-02-10 1991-12-10 Tokyo Electron Limited Coating apparatus
US5091207A (en) * 1989-07-20 1992-02-25 Fujitsu Limited Process and apparatus for chemical vapor deposition
US5500256A (en) * 1994-08-16 1996-03-19 Fujitsu Limited Dry process apparatus using plural kinds of gas
US5565038A (en) * 1991-05-16 1996-10-15 Intel Corporation Interhalogen cleaning of process equipment
US5993555A (en) * 1997-01-16 1999-11-30 Seh America, Inc. Apparatus and process for growing silicon epitaxial layer
US6022483A (en) * 1998-03-10 2000-02-08 Intergrated Systems, Inc. System and method for controlling pressure
US6217937B1 (en) * 1998-07-15 2001-04-17 Cornell Research Foundation, Inc. High throughput OMVPE apparatus
US6228773B1 (en) * 1998-04-14 2001-05-08 Matrix Integrated Systems, Inc. Synchronous multiplexed near zero overhead architecture for vacuum processes
US6277763B1 (en) * 1999-12-16 2001-08-21 Applied Materials, Inc. Plasma processing of tungsten using a gas mixture comprising a fluorinated gas and oxygen
US20010054377A1 (en) * 2000-04-14 2001-12-27 Sven Lindfors Method of growing a thin film onto a substrate
US20020007790A1 (en) * 2000-07-22 2002-01-24 Park Young-Hoon Atomic layer deposition (ALD) thin film deposition equipment having cleaning apparatus and cleaning method
US20020076508A1 (en) * 2000-12-15 2002-06-20 Chiang Tony P. Varying conductance out of a process region to control gas flux in an ALD reactor
US20030013320A1 (en) * 2001-05-31 2003-01-16 Samsung Electronics Co., Ltd. Method of forming a thin film using atomic layer deposition
US6911092B2 (en) * 2002-01-17 2005-06-28 Sundew Technologies, Llc ALD apparatus and method
US6949144B2 (en) * 2001-10-18 2005-09-27 Matsushita Electric Industrial Co., Ltd. Low pressure plasma processing apparatus and method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6545819B1 (en) 1999-08-31 2003-04-08 Canon Kabushiki Kaisha Zoom lens and optical apparatus having the same

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4747367A (en) * 1986-06-12 1988-05-31 Crystal Specialties, Inc. Method and apparatus for producing a constant flow, constant pressure chemical vapor deposition
US5070813A (en) * 1989-02-10 1991-12-10 Tokyo Electron Limited Coating apparatus
US5091207A (en) * 1989-07-20 1992-02-25 Fujitsu Limited Process and apparatus for chemical vapor deposition
US5565038A (en) * 1991-05-16 1996-10-15 Intel Corporation Interhalogen cleaning of process equipment
US5500256A (en) * 1994-08-16 1996-03-19 Fujitsu Limited Dry process apparatus using plural kinds of gas
US5993555A (en) * 1997-01-16 1999-11-30 Seh America, Inc. Apparatus and process for growing silicon epitaxial layer
US6022483A (en) * 1998-03-10 2000-02-08 Intergrated Systems, Inc. System and method for controlling pressure
US6228773B1 (en) * 1998-04-14 2001-05-08 Matrix Integrated Systems, Inc. Synchronous multiplexed near zero overhead architecture for vacuum processes
US6217937B1 (en) * 1998-07-15 2001-04-17 Cornell Research Foundation, Inc. High throughput OMVPE apparatus
US6277763B1 (en) * 1999-12-16 2001-08-21 Applied Materials, Inc. Plasma processing of tungsten using a gas mixture comprising a fluorinated gas and oxygen
US20010054377A1 (en) * 2000-04-14 2001-12-27 Sven Lindfors Method of growing a thin film onto a substrate
US20020007790A1 (en) * 2000-07-22 2002-01-24 Park Young-Hoon Atomic layer deposition (ALD) thin film deposition equipment having cleaning apparatus and cleaning method
US20020076508A1 (en) * 2000-12-15 2002-06-20 Chiang Tony P. Varying conductance out of a process region to control gas flux in an ALD reactor
US20030013320A1 (en) * 2001-05-31 2003-01-16 Samsung Electronics Co., Ltd. Method of forming a thin film using atomic layer deposition
US6949144B2 (en) * 2001-10-18 2005-09-27 Matsushita Electric Industrial Co., Ltd. Low pressure plasma processing apparatus and method
US6911092B2 (en) * 2002-01-17 2005-06-28 Sundew Technologies, Llc ALD apparatus and method

Cited By (386)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133161A1 (en) * 2002-07-08 2005-06-23 Carpenter Craig M. Apparatus and method for depositing materials onto microelectronic workpieces
US20050022739A1 (en) * 2002-07-08 2005-02-03 Carpenter Craig M. Apparatus and method for depositing materials onto microelectronic workpieces
US20040083962A1 (en) * 2002-08-15 2004-05-06 Applied Materials, Inc. Clog-resistant gas delivery system
US20050016984A1 (en) * 2002-08-15 2005-01-27 Dando Ross S. Reactors with isolated gas connectors and methods for depositing materials onto micro-device workpieces
US7192486B2 (en) * 2002-08-15 2007-03-20 Applied Materials, Inc. Clog-resistant gas delivery system
US20060154383A1 (en) * 2002-08-30 2006-07-13 Tokyo Electron Limited Processing apparatus and processing method
US20090214758A1 (en) * 2002-08-30 2009-08-27 Tokyo Electron Limited A processing method for processing a substrate placed on a placement stage in a process chamber
US20050028734A1 (en) * 2003-02-11 2005-02-10 Carpenter Craig M. Reactors with isolated gas connectors and methods for depositing materials onto micro-device workpieces
US20050016453A1 (en) * 2003-04-23 2005-01-27 Seidel Thomas E. Collection of unused precursors in ALD
US20040226507A1 (en) * 2003-04-24 2004-11-18 Carpenter Craig M. Methods for controlling mass flow rates and pressures in passageways coupled to reaction chambers and systems for depositing material onto microfeature workpieces in reaction chambers
US20050039680A1 (en) * 2003-08-21 2005-02-24 Beaman Kevin L. Methods and apparatus for processing microfeature workpieces; methods for conditioning ALD reaction chambers
US20060198955A1 (en) * 2003-08-21 2006-09-07 Micron Technology, Inc. Microfeature workpiece processing apparatus and methods for batch deposition of materials on microfeature workpieces
US20050045102A1 (en) * 2003-08-28 2005-03-03 Zheng Lingyi A. Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces
US20060205187A1 (en) * 2003-08-28 2006-09-14 Micron Technology, Inc. Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces
US7056806B2 (en) * 2003-09-17 2006-06-06 Micron Technology, Inc. Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces
US20060115957A1 (en) * 2003-09-17 2006-06-01 Cem Basceri Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces
US20050059261A1 (en) * 2003-09-17 2005-03-17 Cem Basceri Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces
US20080029028A1 (en) * 2003-09-18 2008-02-07 Micron Technology, Inc. Systems and methods for depositing material onto microfeature workpieces in reaction chambers
US20080050927A1 (en) * 2003-09-30 2008-02-28 Intel Corporation Variable temperature and dose atomic layer deposition
US7306956B2 (en) * 2003-09-30 2007-12-11 Intel Corporation Variable temperature and dose atomic layer deposition
US20050070121A1 (en) * 2003-09-30 2005-03-31 Kuse Ronald John Variable temperature and dose atomic layer deposition
US20050087302A1 (en) * 2003-10-10 2005-04-28 Mardian Allen P. Apparatus and methods for manufacturing microfeatures on workpieces using plasma vapor processes
US8518184B2 (en) 2003-12-10 2013-08-27 Micron Technology, Inc. Methods and systems for controlling temperature during microfeature workpiece processing, E.G., CVD deposition
US7771537B2 (en) 2003-12-10 2010-08-10 Micron Technology, Inc. Methods and systems for controlling temperature during microfeature workpiece processing, E.G. CVD deposition
US20050126489A1 (en) * 2003-12-10 2005-06-16 Beaman Kevin L. Methods and systems for controlling temperature during microfeature workpiece processing, e.g., CVD deposition
US20060204649A1 (en) * 2003-12-10 2006-09-14 Micron Technology, Inc. Methods and systems for controlling temperature during microfeature workpiece processing, E.G. CVD deposition
US7273819B2 (en) * 2004-02-02 2007-09-25 Asm International N.V. Method and apparatus for processing semiconductor substrates
US20050170662A1 (en) * 2004-02-02 2005-08-04 Oosterlaken Theodorus G.M. Method and apparatus for processing semiconductor substrates
US7749918B2 (en) 2004-02-02 2010-07-06 Asm International N.V. Method and apparatus for processing semiconductor substrates
US20080008975A1 (en) * 2004-02-02 2008-01-10 Asm International N.V. Method and apparatus for processing semiconductor substrates
US20050249873A1 (en) * 2004-05-05 2005-11-10 Demetrius Sarigiannis Apparatuses and methods for producing chemically reactive vapors used in manufacturing microelectronic devices
US8133554B2 (en) 2004-05-06 2012-03-13 Micron Technology, Inc. Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces
US20050249887A1 (en) * 2004-05-06 2005-11-10 Dando Ross S Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces
US9023436B2 (en) 2004-05-06 2015-05-05 Micron Technology, Inc. Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces
US7699932B2 (en) 2004-06-02 2010-04-20 Micron Technology, Inc. Reactors, systems and methods for depositing thin films onto microfeature workpieces
US20050268856A1 (en) * 2004-06-02 2005-12-08 Miller Matthew W Reactors, systems and methods for depositing thin films onto microfeature workpieces
US7846499B2 (en) * 2004-12-30 2010-12-07 Asm International N.V. Method of pulsing vapor precursors in an ALD reactor
US20060147626A1 (en) * 2004-12-30 2006-07-06 Blomberg Tom E Method of pulsing vapor precursors in an ALD reactor
US20060165873A1 (en) * 2005-01-25 2006-07-27 Micron Technology, Inc. Plasma detection and associated systems and methods for controlling microfeature workpiece deposition processes
US20060237138A1 (en) * 2005-04-26 2006-10-26 Micron Technology, Inc. Apparatuses and methods for supporting microelectronic devices during plasma-based fabrication processes
US8138104B2 (en) 2005-05-26 2012-03-20 Applied Materials, Inc. Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ UV cure
US8753989B2 (en) 2005-05-26 2014-06-17 Applied Materials, Inc. Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure
US20080020591A1 (en) * 2005-05-26 2008-01-24 Applied Materials, Inc. Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ uv cure
US20060269693A1 (en) * 2005-05-26 2006-11-30 Applied Materials, Inc. Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure
US8129290B2 (en) * 2005-05-26 2012-03-06 Applied Materials, Inc. Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure
WO2007081686A3 (en) * 2006-01-11 2008-10-02 Lam Res Corp Gas switching section including valves having different flow coefficients for gas distribution system
US8772171B2 (en) 2006-01-11 2014-07-08 Lam Research Corporation Gas switching section including valves having different flow coefficients for gas distribution system
US8313611B2 (en) 2006-01-11 2012-11-20 Lam Research Corporation Gas switching section including valves having different flow coefficients for gas distribution system
WO2007081686A2 (en) * 2006-01-11 2007-07-19 Lam Research Corporation Gas switching section including valves having different flow coefficients for gas distribution system
US20070158025A1 (en) * 2006-01-11 2007-07-12 Lam Research Corporation Gas switching section including valves having different flow coefficients for gas distribution system
US8088248B2 (en) * 2006-01-11 2012-01-03 Lam Research Corporation Gas switching section including valves having different flow coefficients for gas distribution system
WO2007099490A1 (en) * 2006-02-28 2007-09-07 Nxp B.V. Processing assembly and method for processing a batch of wafers
US20070259110A1 (en) * 2006-05-05 2007-11-08 Applied Materials, Inc. Plasma, uv and ion/neutral assisted ald or cvd in a batch tool
US20070259111A1 (en) * 2006-05-05 2007-11-08 Singh Kaushal K Method and apparatus for photo-excitation of chemicals for atomic layer deposition of dielectric film
US7798096B2 (en) 2006-05-05 2010-09-21 Applied Materials, Inc. Plasma, UV and ion/neutral assisted ALD or CVD in a batch tool
WO2007142850A2 (en) * 2006-06-02 2007-12-13 Applied Materials Gas flow control by differential pressure measurements
US20080000530A1 (en) * 2006-06-02 2008-01-03 Applied Materials, Inc. Gas flow control by differential pressure measurements
WO2007142850A3 (en) * 2006-06-02 2008-02-21 Applied Materials Inc Gas flow control by differential pressure measurements
US9236077B2 (en) * 2006-06-08 2016-01-12 Hoya Corporation Glass for use as substrate for information recording medium, substrate for information recording medium and information recording medium, and their production methods
TWI455902B (en) * 2006-06-08 2014-10-11 Hoya Corp Galss for substrate for information recording medium, substrate for information recording medium, information recording medium and method for making the galss, substrate and information recording medium
US20140302346A1 (en) * 2006-06-08 2014-10-09 Hoya Corporation Glass for use as substrate for information recording medium, substrate for information recording medium and information recording medium, and their production methods
WO2008011579A3 (en) * 2006-07-21 2008-03-27 Aixtron Inc Small volume symmetric flow single wafer ald apparatus
WO2008011579A2 (en) * 2006-07-21 2008-01-24 Aixtron, Inc. Small volume symmetric flow single wafer ald apparatus
US20080075881A1 (en) * 2006-07-26 2008-03-27 Won Seok-Jun Method of Forming A Metallic Oxide Film Using Atomic Layer Deposition
US8043659B2 (en) * 2007-01-31 2011-10-25 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US20080286491A1 (en) * 2007-01-31 2008-11-20 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US7976897B2 (en) * 2007-02-21 2011-07-12 Micron Technology, Inc Thermal chemical vapor deposition methods, and thermal chemical vapor deposition systems
US20080199613A1 (en) * 2007-02-21 2008-08-21 Micron Technology, Inc. Thermal chemical vapor deposition methods, and thermal chemical vapor deposition systems
US20100012036A1 (en) * 2008-07-11 2010-01-21 Hugo Silva Isolation for multi-single-wafer processing apparatus
US10844486B2 (en) 2009-04-06 2020-11-24 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US8968473B2 (en) * 2009-09-21 2015-03-03 Silevo, Inc. Stackable multi-port gas nozzles
US20110067632A1 (en) * 2009-09-21 2011-03-24 Sierra Solar Power, Inc. Stackable multi-port gas nozzles
US9441295B2 (en) 2010-05-14 2016-09-13 Solarcity Corporation Multi-channel gas-delivery system
US9240513B2 (en) 2010-05-14 2016-01-19 Solarcity Corporation Dynamic support system for quartz process chamber
DE102011104132B3 (en) * 2011-06-14 2012-11-29 Oliver Feddersen-Clausen Plasma assisted atomic layer deposition useful for forming thin layer on substrate, in reaction zone, comprises carrying out coating cycles, rinsing reaction area and converting adsorbed fraction of layer-forming process gas into thin layer
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
WO2013016532A1 (en) * 2011-07-28 2013-01-31 Mks Instruments, Inc. Systems for and methods of controlling time-multiplexed deep reactive-ion etching processes
US10832903B2 (en) 2011-10-28 2020-11-10 Asm Ip Holding B.V. Process feed management for semiconductor substrate processing
US9267605B2 (en) 2011-11-07 2016-02-23 Lam Research Corporation Pressure control valve assembly of plasma processing chamber and rapid alternating process
US9873942B2 (en) 2012-02-06 2018-01-23 Asm Ip Holding B.V. Methods of vapor deposition with multiple vapor sources
US20130203267A1 (en) * 2012-02-06 2013-08-08 Asm Ip Holding B.V. Multiple vapor sources for vapor deposition
US9238865B2 (en) * 2012-02-06 2016-01-19 Asm Ip Holding B.V. Multiple vapor sources for vapor deposition
US20130237063A1 (en) * 2012-03-09 2013-09-12 Seshasayee Varadarajan Split pumping method, apparatus, and system
US20140014742A1 (en) * 2012-07-13 2014-01-16 Omniprobe, Inc. Gas injection system for energetic-beam instruments
US20150318141A1 (en) * 2012-07-13 2015-11-05 Omniprobe, Inc. Gas injection system for energetic-beam instruments
US9097625B2 (en) * 2012-07-13 2015-08-04 Omniprobe, Inc. Gas injection system for energetic-beam instruments
US11501956B2 (en) 2012-10-12 2022-11-15 Asm Ip Holding B.V. Semiconductor reaction chamber showerhead
US9390841B2 (en) 2012-11-19 2016-07-12 Samsung Display Co., Ltd. Vapor deposition apparatus, method of forming thin film using the same and method of manufacturing organic light-emitting display apparatus
US10446753B2 (en) 2012-11-19 2019-10-15 Samsung Display Co., Ltd. Vapor deposition apparatus including a blocking gas flow generation unit
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US10607819B2 (en) * 2013-06-28 2020-03-31 Tokyo Electron Limited Cleaning method and processing apparatus
KR102228484B1 (en) 2013-06-28 2021-03-15 도쿄엘렉트론가부시키가이샤 Cleaning method and processing apparatus
KR20150002496A (en) * 2013-06-28 2015-01-07 도쿄엘렉트론가부시키가이샤 Cleaning method and processing apparatus
US20150000707A1 (en) * 2013-06-28 2015-01-01 Tokyo Electron Limited Cleaning method and processing apparatus
US9508531B2 (en) * 2013-09-26 2016-11-29 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device by alternatively increasing and decreasing pressure of process chamber
US20150087159A1 (en) * 2013-09-26 2015-03-26 Hitachi Kokusai Electric Inc. Substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer readable recording medium
US20150206713A1 (en) * 2014-01-20 2015-07-23 Tokyo Electron Limited Plasma processing apparatus
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US10787741B2 (en) 2014-08-21 2020-09-29 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US11795545B2 (en) 2014-10-07 2023-10-24 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9391230B1 (en) 2015-02-17 2016-07-12 Solarcity Corporation Method for improving solar cell manufacturing yield
US11742189B2 (en) 2015-03-12 2023-08-29 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US9972740B2 (en) 2015-06-07 2018-05-15 Tesla, Inc. Chemical vapor deposition tool and process for fabrication of photovoltaic structures
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11676812B2 (en) 2016-02-19 2023-06-13 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top/bottom portions
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10851456B2 (en) 2016-04-21 2020-12-01 Asm Ip Holding B.V. Deposition of metal borides
US11101370B2 (en) 2016-05-02 2021-08-24 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10074765B2 (en) 2016-05-24 2018-09-11 Tesla, Inc. Systems, method and apparatus for curing conductive paste
US9748434B1 (en) 2016-05-24 2017-08-29 Tesla, Inc. Systems, method and apparatus for curing conductive paste
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US11094582B2 (en) 2016-07-08 2021-08-17 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11649546B2 (en) 2016-07-08 2023-05-16 Asm Ip Holding B.V. Organic reactants for atomic layer deposition
US11749562B2 (en) 2016-07-08 2023-09-05 Asm Ip Holding B.V. Selective deposition method to form air gaps
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US11107676B2 (en) 2016-07-28 2021-08-31 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US11610775B2 (en) 2016-07-28 2023-03-21 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11694892B2 (en) 2016-07-28 2023-07-04 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10741385B2 (en) 2016-07-28 2020-08-11 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9954136B2 (en) 2016-08-03 2018-04-24 Tesla, Inc. Cassette optimized for an inline annealing system
US10943771B2 (en) 2016-10-26 2021-03-09 Asm Ip Holding B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10115856B2 (en) 2016-10-31 2018-10-30 Tesla, Inc. System and method for curing conductive paste using induction heating
US11810788B2 (en) 2016-11-01 2023-11-07 Asm Ip Holding B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10720331B2 (en) 2016-11-01 2020-07-21 ASM IP Holdings, B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US11396702B2 (en) 2016-11-15 2022-07-26 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
US11851755B2 (en) 2016-12-15 2023-12-26 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11447861B2 (en) * 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11001925B2 (en) * 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US20180171477A1 (en) * 2016-12-19 2018-06-21 Asm Ip Holding B.V. Substrate processing apparatus
US11251035B2 (en) 2016-12-22 2022-02-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10784102B2 (en) 2016-12-22 2020-09-22 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US11410851B2 (en) 2017-02-15 2022-08-09 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US11658030B2 (en) 2017-03-29 2023-05-23 Asm Ip Holding B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10950432B2 (en) 2017-04-25 2021-03-16 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US11848200B2 (en) 2017-05-08 2023-12-19 Asm Ip Holding B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11695054B2 (en) 2017-07-18 2023-07-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11164955B2 (en) 2017-07-18 2021-11-02 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11004977B2 (en) 2017-07-19 2021-05-11 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11802338B2 (en) 2017-07-26 2023-10-31 Asm Ip Holding B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US11417545B2 (en) 2017-08-08 2022-08-16 Asm Ip Holding B.V. Radiation shield
US11587821B2 (en) 2017-08-08 2023-02-21 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11581220B2 (en) 2017-08-30 2023-02-14 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11387120B2 (en) 2017-09-28 2022-07-12 Asm Ip Holding B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US11094546B2 (en) 2017-10-05 2021-08-17 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10734223B2 (en) 2017-10-10 2020-08-04 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11682572B2 (en) 2017-11-27 2023-06-20 Asm Ip Holdings B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11501973B2 (en) 2018-01-16 2022-11-15 Asm Ip Holding B.V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
USD913980S1 (en) 2018-02-01 2021-03-23 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11735414B2 (en) 2018-02-06 2023-08-22 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11387106B2 (en) 2018-02-14 2022-07-12 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11939673B2 (en) 2018-02-23 2024-03-26 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11398382B2 (en) 2018-03-27 2022-07-26 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11908733B2 (en) 2018-05-28 2024-02-20 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11891693B2 (en) 2018-06-01 2024-02-06 Asm Ip Holding B.V. Systems and methods for controlling vapor phase processing
US10774422B2 (en) 2018-06-01 2020-09-15 Asm Ip Holding B.V. Systems and methods for controlling vapor phase processing
US20190368038A1 (en) * 2018-06-01 2019-12-05 Asm Ip Holding B.V. Systems and methods for controlling vapor phase processing
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11837483B2 (en) 2018-06-04 2023-12-05 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US11296189B2 (en) 2018-06-21 2022-04-05 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11814715B2 (en) 2018-06-27 2023-11-14 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US11168395B2 (en) 2018-06-29 2021-11-09 Asm Ip Holding B.V. Temperature-controlled flange and reactor system including same
US11923190B2 (en) 2018-07-03 2024-03-05 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11646197B2 (en) 2018-07-03 2023-05-09 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11804388B2 (en) 2018-09-11 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus and method
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11735445B2 (en) 2018-10-31 2023-08-22 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11866823B2 (en) 2018-11-02 2024-01-09 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US11244825B2 (en) 2018-11-16 2022-02-08 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US11411088B2 (en) 2018-11-16 2022-08-09 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US11798999B2 (en) 2018-11-16 2023-10-24 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11769670B2 (en) 2018-12-13 2023-09-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11615980B2 (en) 2019-02-20 2023-03-28 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11798834B2 (en) 2019-02-20 2023-10-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11901175B2 (en) 2019-03-08 2024-02-13 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11453946B2 (en) 2019-06-06 2022-09-27 Asm Ip Holding B.V. Gas-phase reactor system including a gas detector
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11908684B2 (en) 2019-06-11 2024-02-20 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11746414B2 (en) 2019-07-03 2023-09-05 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11788190B2 (en) 2019-07-05 2023-10-17 Asm Ip Holding B.V. Liquid vaporizer
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11876008B2 (en) 2019-07-31 2024-01-16 Asm Ip Holding B.V. Vertical batch furnace assembly
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11898242B2 (en) 2019-08-23 2024-02-13 Asm Ip Holding B.V. Methods for forming a polycrystalline molybdenum film over a surface of a substrate and related structures including a polycrystalline molybdenum film
US11827978B2 (en) 2019-08-23 2023-11-28 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11946136B2 (en) 2019-09-20 2024-04-02 Asm Ip Holding B.V. Semiconductor processing device
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11837494B2 (en) 2020-03-11 2023-12-05 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11798830B2 (en) 2020-05-01 2023-10-24 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
US11961741B2 (en) 2021-03-04 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
US11959168B2 (en) 2021-04-26 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
US11956977B2 (en) 2021-08-31 2024-04-09 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11959171B2 (en) 2022-07-18 2024-04-16 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11952658B2 (en) 2022-10-24 2024-04-09 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material

Also Published As

Publication number Publication date
JP4734231B2 (en) 2011-07-27
KR20050114234A (en) 2005-12-05
EP1613792A2 (en) 2006-01-11
WO2004083485A2 (en) 2004-09-30
WO2004083485A3 (en) 2005-01-27
KR101416781B1 (en) 2014-07-08
CN1777696A (en) 2006-05-24
EP1613792B1 (en) 2014-01-01
JP2006520433A (en) 2006-09-07
CN1777696B (en) 2011-04-20

Similar Documents

Publication Publication Date Title
US20050016956A1 (en) Methods and apparatus for cycle time improvements for atomic layer deposition
US20220316057A1 (en) Combination CVD/ALD method, source and pulse profile modification
US7923069B2 (en) Multi-station deposition apparatus and method
US6875271B2 (en) Simultaneous cyclical deposition in different processing regions
US7273526B2 (en) Thin-film deposition apparatus
US6773507B2 (en) Apparatus and method for fast-cycle atomic layer deposition
US7422635B2 (en) Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces
US6042652A (en) Atomic layer deposition apparatus for depositing atomic layer on multiple substrates
US20060196538A1 (en) Systems for depositing material onto workpieces in reaction chambers and methods for removing byproducts from reaction chambers
US6902620B1 (en) Atomic layer deposition systems and methods
US20030070609A1 (en) Apparatus and process of improving atomic layer deposition chamber performance
KR20120028305A (en) Method and apparatus for growing a thin film onto a substrate
JP2000212752A (en) Reaction chamber gas flowing method and shower head used therefor
US11948813B2 (en) Showerhead device for semiconductor processing system
KR100434493B1 (en) Apparatus for atomic layer deposition and method for operating the same
EP4321648A1 (en) Plasma enhanced atomic layer deposition apparatus and method
US20080026148A1 (en) Film Forming System And Method For Forming Film
US20140193579A1 (en) Combination CVD/ALD method and source
US20050016453A1 (en) Collection of unused precursors in ALD
CN116356285A (en) Semiconductor processing apparatus and method
TW202126846A (en) Substrate processing apparatus and method

Legal Events

Date Code Title Description
AS Assignment

Owner name: GENUS, INC., CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIU, XINYE;SEIDEL, THOMAS E.;LEE, EDWARD;AND OTHERS;REEL/FRAME:015856/0456;SIGNING DATES FROM 20040908 TO 20040930

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION

AS Assignment

Owner name: AIXTRON, INC., CALIFORNIA

Free format text: CHANGE OF NAME;ASSIGNOR:GENUS, INC.;REEL/FRAME:042524/0283

Effective date: 20060331