US20030029715A1 - An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems - Google Patents
An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems Download PDFInfo
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- US20030029715A1 US20030029715A1 US09/916,234 US91623401A US2003029715A1 US 20030029715 A1 US20030029715 A1 US 20030029715A1 US 91623401 A US91623401 A US 91623401A US 2003029715 A1 US2003029715 A1 US 2003029715A1
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
- C23C14/564—Means for minimising impurities in the coating chamber such as dust, moisture, residual gases
- C23C14/566—Means for minimising impurities in the coating chamber such as dust, moisture, residual gases using a load-lock chamber
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/54—Apparatus specially adapted for continuous coating
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
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- H01L21/76855—After-treatment introducing at least one additional element into the layer
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
Definitions
- the present invention relates to the fabrication of semiconductor devices and to the deposition and annealing of materials on a semiconductor substrate.
- ULSI circuits include metal oxide semiconductor (MOS) devices, such as complementary metal oxide semiconductor (CMOS) field effect transistors (FETs).
- MOS metal oxide semiconductor
- CMOS complementary metal oxide semiconductor
- FETs field effect transistors
- the transistors can include semiconductor gates disposed between source and drain regions.
- MOS devices using polysilicon gate electrodes, it has become the practice to provide a metal silicide layer over the polysilicon gate electrode, and over the source and drain regions of the silicon substrate, to facilitate lower resistance and improve device performance by electrically connecting the source and drain regions to metal interconnects.
- CMOS processing technology One important processing technique currently used in CMOS processing technology is the Self-Aligned Silicidation (salicide) of refractory metals such as titanium and cobalt.
- siicide refractory metals
- refractory metals such as titanium and cobalt.
- Co cobalt
- the source and drain and polysilicon gate resistances are reduced by forming a high conductivity overlayer and the contact resistance is reduced by increasing the effective contact area of the source and drain with subsequently formed metal interconnects.
- Salicide processing technology seeks to exploit the principle that a refractory metal such as cobalt deposited on a patterned silicon substrate will selectively react with exposed silicon under specific processing conditions, and will not react with silicon oxide material.
- a layer of cobalt is sputtered onto silicon, typically patterned on a substrate surface, and then subjected to a thermal annealing process to form cobalt silicide (CoSi 2 ).
- Unreacted cobalt such as cobalt deposited outside the patterned silicon or on a protective layer of silicon oxide, can thereafter be selectively etched away.
- the selective reaction of cobalt silicide will result in maskless, self-aligned formation of a low-resistivity refractory metal silicide in source, drain, and polysilicon gate regions formed on the substrate surface and in interconnecting conductors of the semiconductor device.
- further processing of the substrate may occur, such as additional thermal annealing, which may be used to further reduce the sheet resistance of the silicide material.
- Oxide formation on the surface of the substrate can result in increasing the resistance of silicide layers as well reducing the reliability of the overall circuit.
- oxidation of the deposited cobalt material may result in cobalt agglomeration and irregular growth of the silicide layer.
- the agglomeration and irregular growth of the cobalt layer may result in device malformation, such as source and drain electrodes having different thicknesses and surface areas.
- excess cobalt silicide growth on substrate surface may form conductive paths between devices, which may result in short circuits and device failure.
- One solution to limiting cobalt and silicon contamination is to sputter a capping film of titanium or titanium nitride on the cobalt and silicon film prior to transferring the substrate between chambers.
- the capping film is then removed after annealing the substrate and prior to further processing of the substrate.
- titanium nitride deposition and removal processes increase the number of processing steps required for silicide formation, thereby reducing process efficiency, increasing processing complexity, and reducing substrate through-put.
- Embodiments of the invention described herein generally provide methods and apparatus for forming a metal suicide layer using a deposition and annealing process.
- a system for processing a substrate including a load lock chamber, an intermediate substrate transfer region connected to the load lock chamber, the intermediate substrate transfer region comprising a first substrate transfer chamber and a second substrate transfer chamber, wherein the first substrate transfer chamber is coupled to the load lock chamber and the second substrate transfer chamber is coupled to the first substrate transfer chamber, a physical vapor deposition (PVD) processing chamber disposed on the first substrate transfer chamber and an annealing chamber disposed on the second substrate transfer chamber.
- PVD physical vapor deposition
- a method for forming a silicide layer on a substrate including positioning a substrate having silicon material disposed thereon on a substrate support disposed in a deposition chamber having a metal target disposed therein, applying a current to the substrate support to heat the substrate to a first temperature, introducing an inert gas into the deposition chamber, generating a plasma by applying a bias between a metal target and the substrate support in the inert gas environment to sputter material from the metal target, depositing the sputtered material on at least the silicon material, providing a backside gas between the substrate pedestal and the substrate, and annealing the substrate in situ at a second temperature greater than the first temperature to form a metal silicide layer.
- a method for processing a substrate including introducing a substrate having silicon material disposed thereon into a load lock, transferring the substrate to a first transfer chamber having a physical vapor deposition processing chamber disposed thereon, the first transfer chamber is connected to the loadlock and the depositing chamber has a metal target and heating pedestal disposed therein, positioning the substrate into the physical vapor deposition chamber, depositing a metal layer on the silicon material, annealing the substrate prior to transferring the substrate to a second transfer chamber having an annealing chamber disposed thereon, wherein the second transfer chamber is connected to the first transfer chamber, and annealing the substrate in the annealing chamber to form a metal silicide layer.
- FIG. 1 is schematic top view of one embodiment of an integrated multi-chamber apparatus suitable for depositing a conformal PVD layer on a semiconductor substrate and suitable for annealing the deposited layer;
- FIG. 2 is schematic top view of another embodiment of an integrated multi-chamber apparatus suitable for depositing a conformal PVD layer on a semiconductor substrate and suitable for annealing the deposited layer
- FIG. 3 is a cross-sectional view of one embodiment of a sputtering chamber included within the invention.
- FIG. 4 is an expanded view of FIG. 3 including upper area of the shields near the target;
- FIG. 5 is a plan view of one embodiment of a ring collimator
- FIG. 6 is a partial plan view of one embodiment of a honeycomb collimator
- FIG. 7A is a cross-sectional view of one embodiment of a pedestal for annealing a substrate
- FIG. 7B is a cross-sectional view of another embodiment of a pedestal for annealing a substrate.
- FIG. 8 is a simplified sectional view of a silicide material used as a contact with a transistor.
- Embodiments of the invention described herein provide methods and apparatus for forming a metal silicide layer in a deposition chamber or substrate processing system.
- PVD physical vapor deposition
- One embodiment described below in reference to a physical vapor deposition (PVD) process is provided to illustrate the invention, and should not be construed or interpreted as limiting the scope of the invention. Aspects of the invention may be used to advantage in other processes, such as chemical vapor deposition, in which an anneal is desired for forming metal silicide layers.
- FIG. 1 is schematic top view of one embodiment of an integrated multi-chamber substrate processing system suitable for performing at least one embodiment the metal deposition and annealing processes described herein.
- the deposition and annealing processes may be performed in a multi-chamber processing system or cluster tool having a PVD chamber disposed thereon.
- One processing platform that may be used to advantage is an EnduraTM processing platform commercially available from Applied Materials, Inc., located in Santa Clara, Calif.
- the processing platform 35 typically includes a cluster of process chambers including two transfer chambers 48 , 50 and at least one long throw physical vapor deposition (PVD) chamber 36 , additional processing chambers 38 and 40 , and an annealing chamber 41 .
- the annealing chambers 41 and the PVD chambers 36 are disposed in separate transfer chambers, which are operated at different vacuum pressures.
- Chambers 38 and 40 may include PVD chambers or chemical vapor deposition (CVD) chambers for depositing other materials as desired by the operator.
- Rapid thermal annealing (RTA) chambers that can anneal substrates at vacuum pressures may be used for the annealing chamber 41 on transfer chamber 48 or 50 based upon the configuration desired by the operator.
- the processing platform 35 may further comprise one or more pre-clean chambers 42 , such as PreClean II chambers available from Applied Materials, for removing contaminants, two degas chambers 44 , and two load lock chambers 46 .
- the processing platform 35 typically includes transfer robots 49 , 51 , disposed in transfer chambers 48 , 50 respectfully, and two cooldown or pre-heating chambers 52 separating the transfer chambers 48 , 50 .
- the processing platform 35 is automated by programming a microprocessor controller 54 .
- RTA chambers (not shown) may also be disposed on the first transfer chamber 48 of the processing platform 35 to provide post deposition annealing processes prior to substrate removal from the platform 35 .
- a plurality of vacuum pumps are disposed in fluid communication with each transfer chamber and each of the processing chambers to independently regulate pressures in the respective chambers.
- the pumps may establish a vacuum gradient of increasing pressure across the apparatus from the load lock chamber to the processing chambers.
- FIG. 2 is a schematic top view of another embodiment of an integrated multi-chamber substrate processing system suitable for performing at least one embodiment the metal deposition and annealing processes described herein.
- two PVD deposition chamber are disposed on the first transfer chamber 48 with two degas chambers 44 , and two load lock chambers 46 .
- One of the PVD deposition chambers may be substitute with a vacuum annealing chamber or a pre-clean chamber 42 , such as the PreClean II chamber.
- Two annealing chambers 41 are disposed on the second transfer chamber 50 .
- the operating pressure of the first transfer chamber 48 is generally lower than that for the second transfer chamber 50 since high vacuum PVD processes are performed on the first transfer chamber 48 and high pressure processes, such as atmosphere annealing processes, are performed on the second transfer chamber 50 .
- FIG. 3 illustrates one embodiment of a long throw physical vapor deposition chamber.
- suitable long throw PVD chambers are ALPS plusTM and SIPTM PVD processing chambers, both commercially available from Applied Materials, Inc., Santa Clara, Calif.
- the long throw PVD chamber 36 contains a sputtering source, such as a target 142 , and a substrate support pedestal 152 for receiving a semiconductor substrate 154 thereon and located within a grounded enclosure wall 150 , which may be a chamber wall as shown or a grounded shield.
- a sputtering source such as a target 142
- a substrate support pedestal 152 for receiving a semiconductor substrate 154 thereon and located within a grounded enclosure wall 150 , which may be a chamber wall as shown or a grounded shield.
- the chamber 36 includes a target 142 supported on and sealed by O-rings to a grounded conductive aluminum adapter 144 through a dielectric isolator 146 .
- the target 142 may be a bonded composite of a metallic cobalt surface layer and a backing plate of a more workable metal.
- the target 142 comprises the material to be deposited on the substrate surface during sputtering.
- the target may include, for example, materials including cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, which are used in forming metal silicide layers.
- targets comprising elemental cobalt, nickel cobalt alloys, or nickel iron alloys may be used as the target 142 .
- a controllable DC power source 148 applies a negative voltage or bias to the target 142 , typically between about between about 0 V and about 2400 V to the target 142 to excite the gas into a plasma state.
- the adapter 144 in turn is sealed and grounded to an aluminum chamber sidewall 150 . Ions from the plasma bombard the target 142 to sputter atoms and larger particles onto the substrate 154 disposed below. While, the power supplied is expressed in voltage, power may also be expressed as kilowatts or a power density (W/cm 2 ). The amount of power supplied to the chamber may be varied depending upon the amount of sputtering and the size of the substrate size being processed.
- a pedestal 152 supports a substrate 154 to be sputter coated in planar opposition to the principal face of the target 142 .
- the substrate support pedestal 152 has a planar substrate receiving surface disposed generally parallel to the sputtering surface of the target 142 .
- the substrate 154 is positioned on the substrate support pedestal 152 and plasma is generated in the chamber 36 .
- a long throw distance of at least about 90 mm separates the target 142 and the substrate.
- the substrate support pedestal 152 and the target 142 may be separated by a distance between about 100 mm and about 300 mm for a 200 mm substrate.
- the substrate support pedestal 152 and the target 142 may be separated by a distance between about 150 mm and about 400 mm for a 300 mm substrate. Any separation between the substrate and target that is greater than 50% of the substrate diameter is considered a long throw processing chamber.
- a RF power supply 156 in some applications is connected to the pedestal electrode 152 in order to induce a negative DC self-bias on the substrate 154 , but in other applications the pedestal 152 is grounded or left electrically floating.
- the D.C. power supply 148 or another power supply may be used to apply a negative bias, for example, between about 0 V and about 500 V, to the substrate support pedestal 152 .
- the pedestal 152 is vertically movable through a bellows 158 connected to a lower chamber wall 160 to allow the substrate 154 to be transferred onto the pedestal 152 through an load lock valve (not shown) in the lower portion of the chamber and thereafter raised to a deposition position.
- Processing working gas is supplied from a gas source 162 through a mass flow controller 164 into the lower part of the chamber.
- a vacuum pumping system 166 connected through a pumping port 168 in the lower chamber is capable of maintaining the chamber at a base pressure of less than 10 ⁇ 6 Torr, but the processing pressure within the chamber is typically maintained at between 0.2 and 2 milliTorr, preferably less than 1 milliTorr, for cobalt sputtering.
- the processing gas includes non-reactive or inert species such as argon (Ar), xenon (Xe), helium (He), or combinations thereof.
- a rotatable magnetron 170 is positioned in back of the target 142 and includes a plurality of horseshoe magnets 172 supported by a base plate 174 connected to a rotation shaft 176 coincident with the central axis of the chamber 140 and the substrate 154 .
- the horseshoe magnets 172 are arranged in closed pattern typically having a kidney shape. They produce a magnetic field within the chamber, generally parallel and close to the front face of the target 142 to trap electrons and thereby increase the local plasma density, which in turn increases the sputtering rate.
- the magnets 172 are rotated so as to more uniformly sputter the target 142 and coat the substrate 154 .
- the chamber 36 of the invention includes a grounded bottom shield 180 having, as is more clearly illustrated in the exploded cross-sectional view of FIG. 4, an upper flange 182 supported on and electrically connected to a ledge 184 of the adapter 144 .
- a dark space shield 186 is supported on the flange 182 of the bottom shield 180 , and screws (not shown) recessed in the upper surface of the dark space shield 186 fix it and the flange 182 to the adapter ledge 184 having tapped holes receiving the screws.
- This metallic threaded connection grounds the two shields 180 , 186 to the adapter 144 .
- Both shields 180 , 186 are typically formed from hard, non-magnetic stainless steel.
- the dark space shield 186 has an upper portion that closely fits an annular side recess of the target 142 with a narrow gap 188 between the dark space shield 186 and the target 142 which is sufficiently narrow to prevent the plasma to penetrate, hence protecting the ceramic isolator 146 from being sputter coated with a metal layer, which would electrically short the target 142 .
- the dark space shield 186 also includes a downwardly projecting tip 190 , which prevents the interface between the bottom shield 180 and dark space shield 186 from becoming bonded by sputter deposited metal.
- the bottom shield 180 extends downwardly in a upper generally tubular portion 194 of a first diameter and a lower generally tubular portion 196 of a smaller second diameter to extend generally along the walls of the adapter 144 and the chamber body 150 to below the top surface of the pedestal 152 . It also has a bowl-shaped bottom including a radially extending bottom portion 198 and an upwardly extending inner portion 100 just outside of the pedestal 152 .
- a cover ring 102 rests on the top of the upwardly extending inner portion 100 of the bottom shield 180 when the pedestal 152 is in its lower, loading position but rests on the outer periphery of the pedestal 152 when it is in its upper, deposition position to protect the pedestal 152 from sputter deposition.
- An additional deposition ring (not shown) may be used to shield the periphery of the substrate 154 from deposition.
- the chamber 36 may also be adapted to provide a more directional sputtering of material onto a substrate.
- directional sputtering may be achieved by positioning a collimator 110 positioned between the target 142 and the substrate support pedestal 152 to provide a more uniform and symmetrical flux of deposition material on the substrate 154 .
- a metallic ring collimator 110 rests on the ledge portion 106 of the lower shield, thereby grounding the collimator 110 .
- the ring collimator 110 includes, as better illustrated in the plan view of FIG. 5, three concentric tubular sections 112 , 114 , 116 linked by cross struts 118 , 120 .
- the outer tubular section 116 rests on the ledge portion 106 of the lower shield 180 .
- the use of the lower shield 180 to support the collimator 110 simplifies the design and maintenance of the chamber.
- At least the two inner tubular sections 112 , 114 are sufficiently high to define high aspect-ratio apertures that partially collimate the sputtered particles.
- the upper surface of the collimator 110 acts as a ground plane in opposition to the biased target 142 , particularly keeping plasma electrons away from the substrate 154 .
- FIG. 6 Another type of collimator usable with the invention is a honeycomb collimator 124 , partially illustrated in the plan view of FIG. 6 having a mesh structure with hexagonal walls 126 separating hexagonal apertures 128 in a close-packed arrangement.
- An advantage of the honeycomb collimator 124 is, if desired, the thickness of the collimator 124 can be varied from the center to the periphery of the collimator, usually in a convex shape, so that the apertures 128 have aspect ratios that are likewise varying across the collimator 124 .
- the collimator may have one or more convex sides. This allows the sputter flux density to be tailored across the substrate, permitting increased uniformity of deposition. Collimators that may be used in the PVD chamber are described in U.S. Pat. No. 5,650,052, issued Jul. 22, 1997, which is hereby incorporated by reference herein to the extent not inconsistent with aspects of the invention and claims described herein.
- embodiments of the substrate support pedestal 152 may be heated by resistive heaters electrically coupled to a power source and may be cooled by a thermal medium passing through fluid conductors connected fluid source, i.e., a liquid heat exchanger.
- a thermal medium passing through fluid conductors connected fluid source i.e., a liquid heat exchanger.
- Embodiments of the substrate support pedestal 152 are described below, and are provided for illustrative purposes and should not be construed or interpreted as limiting the scope of the invention.
- FIG. 7A One embodiment of a substrate support pedestal 152 is shown in FIG. 7A.
- the substrate support pedestal 152 is suitable for use in a high temperature high vacuum annealing process.
- the substrate support pedestal 152 includes a heating portion 210 disposed on a base 240 coupled to a shaft 245 .
- the heating portion 210 generally includes heating elements 250 disposed in a thermally conducting material 220 and a substrate support surface 275 .
- the thermally conducting material 220 may be any material that has sufficient thermal conductance at operating temperatures for efficient heat transfer between the heating elements 250 and a substrate support surface 275 .
- An example of the conducting material is steel.
- the substrate support surface 275 may include a dielectric material and typically includes a substantially planar receiving surface for a substrate 280 disposed thereon.
- the heating elements 250 may be resistive heating elements, such as electrically conducting wires having leads embedded within the conducting material 220 , and are provided to complete an electrical circuit by which electricity is passed through the conducting material 220 .
- An example of a heating element 250 includes a discrete heating coil disposed in the thermally conducting material 220 . Electrical wires connect a voltage source (not shown) to the ends of the electrically resistive heating coil to provide energy sufficient to heat the coil.
- the coil may take any shape that covers the area of the substrate support pedestal 152 . More than one coil may be used to provide additional heating capability, if needed.
- the body provides support for the heating portion and includes fluid channels 290 disposed therein.
- the fluid channels 290 are generally coupled to a surface of the heating portion 210 and may provide for either heating or cooling of the substrate support pedestal 152 .
- the combination of heating elements 250 and fluid channels 290 generally achieve temperature control of the surface of the substrate support pedestal 152 .
- the fluid channels 290 may include a concentric ring or series of rings, or other desired configuration, having fluid inlets and outlets for circulating a liquid from a remotely located source (not shown).
- the fluid channels 290 are connected to the fluid source 294 by fluid passage 292 formed in the shaft 245 of substrate support pedestal 152 .
- the heating elements 250 can heat the substrate on the substrate support pedestal up to about 900° C. and the fluid channels may cool the substrate to a temperature of about 0° C.
- the combination of heating elements 250 and the fluid channels 290 are generally used to control the temperature of a substrate 280 between about 10° C. and about 900° C., subject to properties of materials used in substrate support pedestal 152 and the process parameters used for processing a substrate in the chamber 36 .
- Temperature sensors 260 may be attached to or embedded in the substrate support pedestal 152 , such as adjacent the heating portion 210 , to monitor temperature in a conventional manner. For example, measured temperature may be used in a feedback loop to control electric current applied to the resistive heaters from a power supply, such that substrate temperature can be maintained or controlled at a desired temperature or within a desired temperature range.
- a control unit (not shown) may be used to receive a signal from temperature sensor and control the heat power supply or a fluid source in response.
- the power supply and the fluid supply of the heating and cooling components are generally located external of the chamber 36 .
- each of the resistive heaters communicate via voltage sources by wires disposed through utility passages (not shown) formed in the base 240 and shaft 245 of the substrate support pedestal 152 and are coupled to utility sources, such as power, located externally to the chamber 36 .
- the utility passages, including the fluid passage 294 are disposed axially along the base 240 and shaft 245 of the substrate support pedestal 152 .
- a protective, flexible sheath 295 is disposed around the shaft 245 and extends from the substrate support pedestal 152 to the chamber wall (not shown) to prevent contamination between the substrate support pedestal 152 and the inside of the chamber.
- the substrate support pedestal 152 may further contain gas channels (not shown) fluidly connecting with the substrate receiving surface 275 of the heating portion 210 to a source of backside gas (not shown).
- the fluid channels 270 define a backside gas passage control passage of a heat transfer gas or masking gas between the heating portion and the substrate 280 .
- a support pedestal disposed in the chamber may include an electrostatic chuck for supporting a substrate during deposition.
- electrostatic chucks include MCATM Electrostatic E-chuck or Pyrolytic Boron Nitride Electrostatic E-Chuck, both available from Applied Materials, Inc., of Santa Clara, Calif.
- FIG. 7B illustrates another embodiment of the substrate support pedestal 152 having an electrostatic chuck 210 mounted to or forming the heating portion of the substrate support pedestal 152 .
- the electrostatic chuck 210 includes an electrode 230 and a substrate receiving surface 275 coated with a dielectric material 235 . Electrically conducting wires (not shown) couple the electrodes 230 to a voltage source (not shown).
- a substrate 280 may be placed in contact with the dielectric material 235 , and a direct current voltage is placed on the electrode 230 to create the electrostatic attractive force to grip the substrate.
- the electrodes 230 are disposed in the thermally conducting material 220 in a spaced relationship with the heating elements 250 disposed therein.
- the heating elements 250 are generally disposed in a vertically spaced and parallel manner from the electrodes 230 in the thermally conducting material 220 .
- the electrodes are disposed between the heating elements and the substrate receiving surface 275 though other configurations may be used.
- Fluid channels 290 disposed on a bottom portion of the electrostatic chuck 210 may also be used to achieve temperature control of the substrate support pedestal 152 and are connected to the fluid source by fluid passage 292 formed in the substrate support pedestal base 240 .
- Temperature sensors 260 are attached to or embedded in the electrostatic chuck 210 to monitor temperature.
- the electrostatic chuck 210 may further contain channels 270 formed in the substrate support pedestal 152 fluidly connecting with the substrate receiving surface 275 of the electrostatic chuck 210 to a source of backside gas (not shown).
- the fluid channels 270 define a backside gas passage control passage of a heat transfer gas or masking gas between the electrostatic chuck 210 and the substrate 280 .
- the embodiments of the substrate support pedestals 152 described above may be used to form a high vacuum anneal chamber.
- the high vacuum anneal chamber may include substrate support pedestals 152 disposed in a PVD chamber, such as the long throw chamber 36 described herein, with a blank target disposed therein or without a target and without bias coupled to either the target or substrate support pedestal.
- a substrate is disposed on the substrate support pedestal, and the substrate is heated, with or without the presence of a backside gas, by the heating elements 250 to the desired processing temperature, processed for sufficient time to anneal the substrate for the desired anneal results, and then removed from the chamber.
- substrate support pedestal 152 may be used to anneal the substrate
- commercially available anneal chambers such as rapid thermal anneal (RTA) chambers may also be used to anneal the substrate to form the silicide films.
- RTA rapid thermal anneal
- the invention contemplates utilizing a variety of thermal anneal chamber designs, including hot plate designs and heated lamp designs, to enhance the electroplating results.
- One particular thermal anneal chamber useful for the present invention is the WxZTM chamber available from Applied materials, Inc., located in Santa Clara, Calif.
- One particular hot plate thermal anneal chamber useful for the present invention is the RTP XEplus Centura® thermal processing chamber available from Applied Materials, Inc., located in Santa Clara, Calif.
- One particular lamp anneal chamber is the RadianceTM thermal processing chamber available from Applied Materials, Inc., located in Santa Clara, Calif.
- Anneal chambers capable of operating at vacuum pressures may be disposed on the PVD transfer chamber 50 , to allow post deposition annealing without breaking vacuum.
- Anneal chamber that are capable of operating at near atmosphere pressures may be disposed on the first transfer chamber 48 .
- PVD deposition chambers with cobalt targets are disposed on the first transfer chamber 48 and the anneal chambers 41 that are capable of operating at near atmosphere pressures may be disposed on the second transfer chamber 50 .
- the deposition and annealing step used in forming a metal silicide layer may be formed in situ, such as in a deposition chamber or in a processing system without breaking vacuum.
- In situ is broadly defined herein as performing two or more processes in the same chamber or in the same processing system without breaking vacuum.
- in situ annealing may be performed in the same processing chamber as the metal deposition.
- in situ annealing may be performed in a chamber adjacent to the deposition chamber, both of which are coupled to a transfer chamber, and the vacuum on the transfer chamber is not broken during processing.
- in situ annealing may be performed on the same processing system at separate processing pressures, such as processing a substrate in processing chambers and annealing chambers disposed on the first and second transfer chambers 48 , 50 , respectfully, in system 35 without breaking the vacuum on the system 35 or tranfer of th substrate to another processing system.
- the invention contemplates the use of other materials, including titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, to form the metal silicide material as described herein.
- a metal layer may be deposited on a silicon substrate disposed in chamber 36 and annealed on the substrate pedestal 152 to form the metal silicide layer without breaking vacuum.
- Metal for forming the metal silicide layer is deposited using the PVD chamber 36 described above.
- the target 142 of material, such as cobalt, to be deposited is disposed in the upper portion of the chamber 36 .
- a substrate 154 is provided to the chamber 36 and disposed on the substrate support pedestal 152 .
- the substrate 154 includes silicon material disposed thereon and is generally patterned to define features into which metal silicide films will be formed.
- a processing gas is introduced into the chamber 38 at a flow rate of between about 5 sccm and about 30 sccm.
- the chamber pressure is maintained below about 5 milliTorr to promote deposition of conformal PVD metal layers.
- a chamber pressure between about 0.2 milliTorr and about 2 milliTorr may be used during deposition. More preferably, a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr has been observed to be sufficient for sputtering cobalt onto a substrate.
- a plasma is generated by applying a power level to the target 142 between about 0 volts (V) and about 2400 V.
- a power level is delivered to the target 142 at between about 0 V and about 1000 V to sputter material on a 200 mm substrate.
- a power level between about 0 V and about 500 V may be applied to the substrate support pedestal 152 to improve directionality of the sputtered material to the substrate surface.
- the substrate is maintained at a temperature between about 10° C. and about 500° C. during the deposition process.
- An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the target 142 to excite the gas into a plasma state, maintaining the substrate at a temperature between about 10° C. and about 500° C., preferably about 50° C. and about 300° C., and most preferably, between about 50° C. and about 100° C.
- an inert gas such as argon
- Cobalt may be deposited on the silicon material at a rate between about 300 ⁇ /min and about 2000 ⁇ /min using this process.
- the cobalt and silicon layer is then annealed in situ at a temperature between about 300° C. and about 900° C. for between about 10 seconds and about 600 seconds to form the metal silicide layer.
- the annealing process may be performed under an inert gas environment in the deposition chamber by first introducing an inert gas into the chamber at a flow rate between about 0 sccm (Le., no backside gas) and about 15 sccm, maintaining a chamber pressure between of about 2 milliTorr or less, heating the substrate to a temperature between about 300° C. and about 900° C. for between about 5 seconds and about 600 seconds to form the metal silicide layer.
- the metal may be deposited at substrate temperature of 200° C. or less, and then rapidly annealed on the substrate support pedestal 152 at temperatures of about 400° C. or greater by introducing a backside gas flow.
- An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the target 142 to excite the gas into a plasma state, maintaining the substrate at a temperature of about 200° C., and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate.
- an inert gas such as argon
- the substrate temperature may be maintained at about 200° C. by heating the substrate in the absence of a backside gas at a heating level that would normally heat the substrate to temperatures of 400° C. or greater. This reduced temperature control is achieved by inefficient heat transfer between the pedestal surface and the backside of the substrate at vacuum pressures. Cobalt may be deposited on the silicon material at a rate between about 300 ⁇ /min and about 2000 ⁇ /min using this process.
- the annealing process can then be performed in the deposition chamber by ending the plasma and applying a backside gas to the substrate support to enhance heating of the substrate to a temperature between about 400° C. and 600° C. at the same heating levels used for the deposition process.
- the annealing process is performed at a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds.
- the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- the metal layer may be physical vapor deposited on a silicon substrate in chamber 36 , annealed for a first temperature for a first period of time, transferred to a second chamber, for example chamber 41 , in the system 35 , and annealed at a second temperature for a second period of time to form the metal suicide layer without breaking vacuum.
- the physical vapor deposition of the metal is performed as described above at a temperature of about 200° C. or less, preferably between about 0° C. and about 100° C.
- the first step of the two step in situ annealing process described above may be performed under an inert gas environment in the deposition chamber by first introducing an inert gas into the chamber at a flow rate between about 0 sccm and about 15 sccm, maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr, heating the substrate to a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds.
- the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- the substrate is then removed from the deposition chamber and transferred to a vacuum anneal chamber disposed on the same transfer chamber, such as transfer chamber 48 described above in FIG. 2.
- the high vacuum anneal chamber may include a PVD chamber having a blank target and substrate support pedestal 152 described above or a commercial high vacuum anneal pedestal, such as the High Temperature High Uniformity, HTHUTM substrate support commercially available from Applied Materials Inc., of Santa Clara Calif.
- the second annealing step may then be performed by maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr and heating the substrate to a temperature between about 600° C. and about 900° C. for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer.
- the substrate is annealed in the anneal chamber at 800° C. for between about 60 seconds and 120 seconds.
- the metal layer is deposited according to the process described herein at about 200° C. or less, preferably between about 0° C. and about 100° C., in the deposition chamber.
- the substrate is then annealed in the deposition chamber according to the anneal process described above.
- the substrate may then be transferred to a RTA chamber disposed on transfer chamber 50 in FIG. 2 for a second anneal process.
- Annealing in an RTA anneal chamber may be performed by introducing a process gas including nitrogen (N 2 ), argon (Ar), helium (He), and combinations thereof, with less than about 4% hydrogen (H 2 ), at a process gas flow rate greater than 20 liters/min to control the oxygen content to less than 100 ppm, maintaining a chamber pressure of about ambient, and heating the substrate to a temperature between about 600° C. and about 900° C. for between about 5 seconds and about 300 seconds to form the metal silicide layer.
- the substrate is annealed in the RTA anneal chamber at 800° C. for about 30 seconds.
- the metal layer may be deposited on a silicon substrate in chamber 36 , transferred to a first anneal chamber, such as a vacuum anneal chamber disposed on the same transfer chamber 48 on the system 35 , annealed for a first temperature for a first period of time, transferred to a second anneal chamber, for example chamber 41 , in the system 35 , and annealed at a second temperature for a second period of time to form the metal suicide layer without breaking vacuum.
- a first anneal chamber such as a vacuum anneal chamber disposed on the same transfer chamber 48 on the system 35
- annealed for a first temperature for a first period of time transferred to a second anneal chamber, for example chamber 41 , in the system 35 , and annealed at a second temperature for a second period of time to form the metal suicide layer without breaking vacuum.
- the metal deposition is performed in the deposition chamber according to the process described above at a substrate temperature of about 200° C. or less, preferably between about 0° C. and about 100° C.
- the first step of this embodiment of the annealing process may be performed in situ in a first high vacuum anneal chamber disposed on a processing system by introducing an inert gas into the anneal chamber at a flow rate between about 0 sccm and about 15 sccm, maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr, heating the substrate to a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds.
- the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- the first annealing step is believed to form an oxygen resistant film such as CoSi.
- the substrate may be annealed in situ by transfer to a second high vacuum annealing chamber in the processing system.
- the second annealing step may then be performed by maintaining a chamber pressure of about 2 milliTorr or less and heating the substrate to a temperature between about 600° C. and about 900° C. for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer.
- the substrate is annealed in the anneal chamber at 800° C. for between about 60 seconds and 120 seconds.
- the substrate may be transferred to a second annealing chamber located outside the transfer chamber or processing system, such as an atmosphere pressure RTA chamber.
- Annealing in an RTA anneal chamber may be performed by introducing a process gas including nitrogen (N 2 ), argon (Ar), helium (He), and combinations thereof, with less than about 4% hydrogen (H 2 ), at a process gas flow rate greater than 20 liters/min to control the oxygen content to less than 100 ppm, maintaining a chamber pressure of about ambient, and heating the substrate to a temperature between about 400° C. and about 900° C. for between about 5 seconds and about 300 seconds to form the metal suicide layer.
- the substrate is annealed in the RTA anneal chamber at 800° C. for about 30 seconds.
- the metal may be deposited at a high deposition temperature.
- An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the target 142 to excite the gas into a plasma state, maintaining the substrate at about an annealing temperature, Le., between about 400° C. and about 600° C. by applying a backside gas, and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate.
- the temperature may be maintained at about 200° C. by heating the substrate in the absence of a backside gas.
- Cobalt may be deposited on the silicon material at a rate between about 300 ⁇ /min and about 2000 ⁇ /min using this process.
- the annealing process can then be performed in the deposition chamber by ending the plasma and heating of the substrate to a temperature between about 400° C. and 600° C. at the same heating levels used for the deposition process.
- the annealing process is performed at a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds.
- the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- the second annealing step may then be formed in an annealing chamber without breaking vacuum or in an annealing chamber located on a separate transfer chamber or processing system.
- the second annealing step includes heating the substrate to a temperature between about 600° C. and about 900° C. for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer.
- the substrate is annealed at 800° C. for between about 60 seconds and 120 seconds.
- the metal silicide material including suicides of cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, may be used in the formation of a MOS device shown in FIG. 8.
- N+ source and drain regions 402 and 404 are formed in a P type silicon substrate 400 adjacent field oxide portions 406 .
- a gate oxide layer 408 and a polysilicon gate electrode 410 are formed over silicon substrate 400 in between source and drain regions 402 and 404 with oxide spacers 412 formed on the sidewalls of polysilicon gate electrode 410 .
- a cobalt layer is deposited over the MOS structure, and in particular over the exposed silicon surfaces of source and drain regions 402 and 404 and the exposed top surface of polysilicon gate electrode 410 by the process described herein.
- the cobalt material is deposited to a thickness of at about 1000 ⁇ or less to provide a sufficient amount of cobalt for the subsequent reaction with the underlying silicon at 402 and 404 .
- Cobalt may be deposited to a thickness between about 50 ⁇ and about 500 ⁇ on the silicon material.
- the cobalt layer is then annealed in situ as described herein to form cobalt silicide.
Abstract
Methods and apparatus are provided for annealing of materials deposited in a processing chamber to form silicide layers. In one aspect, a method is provided for treating a substrate surface including positioning a substrate having silicon material disposed thereon on a substrate support in a chamber, forming a metal layer on at least the silicon material, and annealing the substrate in situ to form a metal silicide layer. In another aspect, the method is performed in an apparatus including a load lock chamber, an intermediate substrate transfer region connected to the load lock chamber, the intermediate substrate transfer region comprising a first substrate transfer chamber and a second substrate transfer chamber, a physical vapor deposition processing chamber disposed on the first substrate transfer chamber and an annealing chamber disposed on the second substrate transfer chamber.
Description
- 1. Field of the Invention
- The present invention relates to the fabrication of semiconductor devices and to the deposition and annealing of materials on a semiconductor substrate.
- 2. Description of the Related Art
- Recent improvements in circuitry of ultra-large scale integration (ULSI) on semiconductor substrates indicate that future generations of semiconductor devices will require sub-quarter micron multi-level metallization. The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
- ULSI circuits include metal oxide semiconductor (MOS) devices, such as complementary metal oxide semiconductor (CMOS) field effect transistors (FETs). The transistors can include semiconductor gates disposed between source and drain regions. In the formation of integrated circuit structures, and particularly in the formation of MOS devices using polysilicon gate electrodes, it has become the practice to provide a metal silicide layer over the polysilicon gate electrode, and over the source and drain regions of the silicon substrate, to facilitate lower resistance and improve device performance by electrically connecting the source and drain regions to metal interconnects.
- One important processing technique currently used in CMOS processing technology is the Self-Aligned Silicidation (salicide) of refractory metals such as titanium and cobalt. In a salicide process using cobalt (Co), for example, the source and drain and polysilicon gate resistances are reduced by forming a high conductivity overlayer and the contact resistance is reduced by increasing the effective contact area of the source and drain with subsequently formed metal interconnects. Salicide processing technology seeks to exploit the principle that a refractory metal such as cobalt deposited on a patterned silicon substrate will selectively react with exposed silicon under specific processing conditions, and will not react with silicon oxide material.
- For example, a layer of cobalt is sputtered onto silicon, typically patterned on a substrate surface, and then subjected to a thermal annealing process to form cobalt silicide (CoSi2). Unreacted cobalt, such as cobalt deposited outside the patterned silicon or on a protective layer of silicon oxide, can thereafter be selectively etched away. The selective reaction of cobalt silicide will result in maskless, self-aligned formation of a low-resistivity refractory metal silicide in source, drain, and polysilicon gate regions formed on the substrate surface and in interconnecting conductors of the semiconductor device. After the etch process, further processing of the substrate may occur, such as additional thermal annealing, which may be used to further reduce the sheet resistance of the silicide material.
- However, it has been difficult in integrating cobalt silicide processes into conventional manufacturing equipment. Current processing systems performing cobalt silicide processes require transfer of the substrate between separate chambers for the deposition and annealing process steps. Transfer between chambers may expose the substrate to contamination and potential oxidation of silicon or cobalt deposited on the substrate surface
- Oxide formation on the surface of the substrate can result in increasing the resistance of silicide layers as well reducing the reliability of the overall circuit. For example, oxidation of the deposited cobalt material may result in cobalt agglomeration and irregular growth of the silicide layer. The agglomeration and irregular growth of the cobalt layer may result in device malformation, such as source and drain electrodes having different thicknesses and surface areas. Additionally, excess cobalt silicide growth on substrate surface may form conductive paths between devices, which may result in short circuits and device failure.
- One solution to limiting cobalt and silicon contamination is to sputter a capping film of titanium or titanium nitride on the cobalt and silicon film prior to transferring the substrate between chambers. The capping film is then removed after annealing the substrate and prior to further processing of the substrate. However, the addition of titanium nitride deposition and removal processes increase the number of processing steps required for silicide formation, thereby reducing process efficiency, increasing processing complexity, and reducing substrate through-put.
- Therefore, there is a need for a method and apparatus for forming suicide materials on a substrate while reducing processing complexity and improving processing efficiency and throughput.
- Embodiments of the invention described herein generally provide methods and apparatus for forming a metal suicide layer using a deposition and annealing process. In one aspect, a system is provided for processing a substrate including a load lock chamber, an intermediate substrate transfer region connected to the load lock chamber, the intermediate substrate transfer region comprising a first substrate transfer chamber and a second substrate transfer chamber, wherein the first substrate transfer chamber is coupled to the load lock chamber and the second substrate transfer chamber is coupled to the first substrate transfer chamber, a physical vapor deposition (PVD) processing chamber disposed on the first substrate transfer chamber and an annealing chamber disposed on the second substrate transfer chamber.
- In another aspect, a method is provided for forming a silicide layer on a substrate including positioning a substrate having silicon material disposed thereon on a substrate support disposed in a deposition chamber having a metal target disposed therein, applying a current to the substrate support to heat the substrate to a first temperature, introducing an inert gas into the deposition chamber, generating a plasma by applying a bias between a metal target and the substrate support in the inert gas environment to sputter material from the metal target, depositing the sputtered material on at least the silicon material, providing a backside gas between the substrate pedestal and the substrate, and annealing the substrate in situ at a second temperature greater than the first temperature to form a metal silicide layer.
- In another aspect, a method is provided for processing a substrate including introducing a substrate having silicon material disposed thereon into a load lock, transferring the substrate to a first transfer chamber having a physical vapor deposition processing chamber disposed thereon, the first transfer chamber is connected to the loadlock and the depositing chamber has a metal target and heating pedestal disposed therein, positioning the substrate into the physical vapor deposition chamber, depositing a metal layer on the silicon material, annealing the substrate prior to transferring the substrate to a second transfer chamber having an annealing chamber disposed thereon, wherein the second transfer chamber is connected to the first transfer chamber, and annealing the substrate in the annealing chamber to form a metal silicide layer.
- So that the manner in which the above recited aspects of the invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings.
- It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
- FIG. 1 is schematic top view of one embodiment of an integrated multi-chamber apparatus suitable for depositing a conformal PVD layer on a semiconductor substrate and suitable for annealing the deposited layer;
- FIG. 2 is schematic top view of another embodiment of an integrated multi-chamber apparatus suitable for depositing a conformal PVD layer on a semiconductor substrate and suitable for annealing the deposited layer
- FIG. 3 is a cross-sectional view of one embodiment of a sputtering chamber included within the invention;
- FIG. 4 is an expanded view of FIG. 3 including upper area of the shields near the target;
- FIG. 5 is a plan view of one embodiment of a ring collimator;
- FIG. 6 is a partial plan view of one embodiment of a honeycomb collimator;
- FIG. 7A is a cross-sectional view of one embodiment of a pedestal for annealing a substrate;
- FIG. 7B is a cross-sectional view of another embodiment of a pedestal for annealing a substrate; and
- FIG. 8 is a simplified sectional view of a silicide material used as a contact with a transistor.
- Embodiments of the invention described herein provide methods and apparatus for forming a metal silicide layer in a deposition chamber or substrate processing system. One embodiment described below in reference to a physical vapor deposition (PVD) process is provided to illustrate the invention, and should not be construed or interpreted as limiting the scope of the invention. Aspects of the invention may be used to advantage in other processes, such as chemical vapor deposition, in which an anneal is desired for forming metal silicide layers.
- FIG. 1 is schematic top view of one embodiment of an integrated multi-chamber substrate processing system suitable for performing at least one embodiment the metal deposition and annealing processes described herein. The deposition and annealing processes may be performed in a multi-chamber processing system or cluster tool having a PVD chamber disposed thereon. One processing platform that may be used to advantage is an Endura™ processing platform commercially available from Applied Materials, Inc., located in Santa Clara, Calif.
- The
processing platform 35 typically includes a cluster of process chambers including twotransfer chambers chamber 36,additional processing chambers annealing chamber 41. Generally, theannealing chambers 41 and thePVD chambers 36 are disposed in separate transfer chambers, which are operated at different vacuum pressures.Chambers chamber 41 ontransfer chamber - The
processing platform 35 may further comprise one or more pre-cleanchambers 42, such as PreClean II chambers available from Applied Materials, for removing contaminants, twodegas chambers 44, and twoload lock chambers 46. Theprocessing platform 35 typically includestransfer robots transfer chambers chambers 52 separating thetransfer chambers processing platform 35 is automated by programming amicroprocessor controller 54. RTA chambers (not shown) may also be disposed on thefirst transfer chamber 48 of theprocessing platform 35 to provide post deposition annealing processes prior to substrate removal from theplatform 35. While not shown, a plurality of vacuum pumps are disposed in fluid communication with each transfer chamber and each of the processing chambers to independently regulate pressures in the respective chambers. The pumps may establish a vacuum gradient of increasing pressure across the apparatus from the load lock chamber to the processing chambers. - FIG. 2 is a schematic top view of another embodiment of an integrated multi-chamber substrate processing system suitable for performing at least one embodiment the metal deposition and annealing processes described herein. In this embodiment, two PVD deposition chamber are disposed on the
first transfer chamber 48 with twodegas chambers 44, and twoload lock chambers 46. One of the PVD deposition chambers may be substitute with a vacuum annealing chamber or apre-clean chamber 42, such as the PreClean II chamber. Two annealingchambers 41, are disposed on thesecond transfer chamber 50. The operating pressure of thefirst transfer chamber 48 is generally lower than that for thesecond transfer chamber 50 since high vacuum PVD processes are performed on thefirst transfer chamber 48 and high pressure processes, such as atmosphere annealing processes, are performed on thesecond transfer chamber 50. - FIG. 3 illustrates one embodiment of a long throw physical vapor deposition chamber. Example of suitable long throw PVD chambers are ALPS plus™ and SIP™ PVD processing chambers, both commercially available from Applied Materials, Inc., Santa Clara, Calif.
- Generally, the long
throw PVD chamber 36 contains a sputtering source, such as atarget 142, and asubstrate support pedestal 152 for receiving asemiconductor substrate 154 thereon and located within a groundedenclosure wall 150, which may be a chamber wall as shown or a grounded shield. - The
chamber 36 includes atarget 142 supported on and sealed by O-rings to a groundedconductive aluminum adapter 144 through adielectric isolator 146. Thetarget 142 may be a bonded composite of a metallic cobalt surface layer and a backing plate of a more workable metal. Thetarget 142 comprises the material to be deposited on the substrate surface during sputtering. The target may include, for example, materials including cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, which are used in forming metal silicide layers. For example, targets comprising elemental cobalt, nickel cobalt alloys, or nickel iron alloys may be used as thetarget 142. - A controllable
DC power source 148 applies a negative voltage or bias to thetarget 142, typically between about between about 0 V and about 2400 V to thetarget 142 to excite the gas into a plasma state. Theadapter 144 in turn is sealed and grounded to analuminum chamber sidewall 150. Ions from the plasma bombard thetarget 142 to sputter atoms and larger particles onto thesubstrate 154 disposed below. While, the power supplied is expressed in voltage, power may also be expressed as kilowatts or a power density (W/cm2). The amount of power supplied to the chamber may be varied depending upon the amount of sputtering and the size of the substrate size being processed. - A
pedestal 152 supports asubstrate 154 to be sputter coated in planar opposition to the principal face of thetarget 142. Thesubstrate support pedestal 152 has a planar substrate receiving surface disposed generally parallel to the sputtering surface of thetarget 142. In operation, thesubstrate 154 is positioned on thesubstrate support pedestal 152 and plasma is generated in thechamber 36. A long throw distance of at least about 90 mm separates thetarget 142 and the substrate. Thesubstrate support pedestal 152 and thetarget 142 may be separated by a distance between about 100 mm and about 300 mm for a 200 mm substrate. Thesubstrate support pedestal 152 and thetarget 142 may be separated by a distance between about 150 mm and about 400 mm for a 300 mm substrate. Any separation between the substrate and target that is greater than 50% of the substrate diameter is considered a long throw processing chamber. - A
RF power supply 156 in some applications is connected to thepedestal electrode 152 in order to induce a negative DC self-bias on thesubstrate 154, but in other applications thepedestal 152 is grounded or left electrically floating. TheD.C. power supply 148 or another power supply may be used to apply a negative bias, for example, between about 0 V and about 500 V, to thesubstrate support pedestal 152. Thepedestal 152 is vertically movable through abellows 158 connected to alower chamber wall 160 to allow thesubstrate 154 to be transferred onto thepedestal 152 through an load lock valve (not shown) in the lower portion of the chamber and thereafter raised to a deposition position. - Processing working gas is supplied from a
gas source 162 through amass flow controller 164 into the lower part of the chamber. Avacuum pumping system 166 connected through a pumpingport 168 in the lower chamber is capable of maintaining the chamber at a base pressure of less than 10−6 Torr, but the processing pressure within the chamber is typically maintained at between 0.2 and 2 milliTorr, preferably less than 1 milliTorr, for cobalt sputtering. The processing gas includes non-reactive or inert species such as argon (Ar), xenon (Xe), helium (He), or combinations thereof. - A
rotatable magnetron 170 is positioned in back of thetarget 142 and includes a plurality ofhorseshoe magnets 172 supported by abase plate 174 connected to arotation shaft 176 coincident with the central axis of the chamber 140 and thesubstrate 154. Thehorseshoe magnets 172 are arranged in closed pattern typically having a kidney shape. They produce a magnetic field within the chamber, generally parallel and close to the front face of thetarget 142 to trap electrons and thereby increase the local plasma density, which in turn increases the sputtering rate. Themagnets 172 are rotated so as to more uniformly sputter thetarget 142 and coat thesubstrate 154. - The
chamber 36 of the invention includes a groundedbottom shield 180 having, as is more clearly illustrated in the exploded cross-sectional view of FIG. 4, anupper flange 182 supported on and electrically connected to aledge 184 of theadapter 144. Adark space shield 186 is supported on theflange 182 of thebottom shield 180, and screws (not shown) recessed in the upper surface of thedark space shield 186 fix it and theflange 182 to theadapter ledge 184 having tapped holes receiving the screws. This metallic threaded connection grounds the twoshields adapter 144. Both shields 180, 186 are typically formed from hard, non-magnetic stainless steel. Thedark space shield 186 has an upper portion that closely fits an annular side recess of thetarget 142 with anarrow gap 188 between thedark space shield 186 and thetarget 142 which is sufficiently narrow to prevent the plasma to penetrate, hence protecting theceramic isolator 146 from being sputter coated with a metal layer, which would electrically short thetarget 142. Thedark space shield 186 also includes a downwardly projectingtip 190, which prevents the interface between thebottom shield 180 anddark space shield 186 from becoming bonded by sputter deposited metal. - Returning to the overall view of FIG. 3, the
bottom shield 180 extends downwardly in a upper generallytubular portion 194 of a first diameter and a lower generallytubular portion 196 of a smaller second diameter to extend generally along the walls of theadapter 144 and thechamber body 150 to below the top surface of thepedestal 152. It also has a bowl-shaped bottom including a radially extendingbottom portion 198 and an upwardly extendinginner portion 100 just outside of thepedestal 152. Acover ring 102 rests on the top of the upwardly extendinginner portion 100 of thebottom shield 180 when thepedestal 152 is in its lower, loading position but rests on the outer periphery of thepedestal 152 when it is in its upper, deposition position to protect thepedestal 152 from sputter deposition. An additional deposition ring (not shown) may be used to shield the periphery of thesubstrate 154 from deposition. - The
chamber 36 may also be adapted to provide a more directional sputtering of material onto a substrate. In one aspect, directional sputtering may be achieved by positioning acollimator 110 positioned between thetarget 142 and thesubstrate support pedestal 152 to provide a more uniform and symmetrical flux of deposition material on thesubstrate 154. - A
metallic ring collimator 110 rests on theledge portion 106 of the lower shield, thereby grounding thecollimator 110. Thering collimator 110 includes, as better illustrated in the plan view of FIG. 5, three concentrictubular sections tubular section 116 rests on theledge portion 106 of thelower shield 180. The use of thelower shield 180 to support thecollimator 110 simplifies the design and maintenance of the chamber. At least the two innertubular sections collimator 110 acts as a ground plane in opposition to thebiased target 142, particularly keeping plasma electrons away from thesubstrate 154. - Another type of collimator usable with the invention is a
honeycomb collimator 124, partially illustrated in the plan view of FIG. 6 having a mesh structure withhexagonal walls 126 separatinghexagonal apertures 128 in a close-packed arrangement. An advantage of thehoneycomb collimator 124 is, if desired, the thickness of thecollimator 124 can be varied from the center to the periphery of the collimator, usually in a convex shape, so that theapertures 128 have aspect ratios that are likewise varying across thecollimator 124. The collimator may have one or more convex sides. This allows the sputter flux density to be tailored across the substrate, permitting increased uniformity of deposition. Collimators that may be used in the PVD chamber are described in U.S. Pat. No. 5,650,052, issued Jul. 22, 1997, which is hereby incorporated by reference herein to the extent not inconsistent with aspects of the invention and claims described herein. - Referring to FIGS. 7A and 7B, embodiments of the
substrate support pedestal 152 may be heated by resistive heaters electrically coupled to a power source and may be cooled by a thermal medium passing through fluid conductors connected fluid source, i.e., a liquid heat exchanger. Embodiments of thesubstrate support pedestal 152 are described below, and are provided for illustrative purposes and should not be construed or interpreted as limiting the scope of the invention. - One embodiment of a
substrate support pedestal 152 is shown in FIG. 7A. Thesubstrate support pedestal 152 is suitable for use in a high temperature high vacuum annealing process. Generally, thesubstrate support pedestal 152 includes aheating portion 210 disposed on a base 240 coupled to ashaft 245. - The
heating portion 210 generally includesheating elements 250 disposed in a thermally conductingmaterial 220 and asubstrate support surface 275. The thermally conductingmaterial 220 may be any material that has sufficient thermal conductance at operating temperatures for efficient heat transfer between theheating elements 250 and asubstrate support surface 275. An example of the conducting material is steel. Thesubstrate support surface 275 may include a dielectric material and typically includes a substantially planar receiving surface for asubstrate 280 disposed thereon. - The
heating elements 250 may be resistive heating elements, such as electrically conducting wires having leads embedded within the conductingmaterial 220, and are provided to complete an electrical circuit by which electricity is passed through the conductingmaterial 220. An example of aheating element 250 includes a discrete heating coil disposed in the thermally conductingmaterial 220. Electrical wires connect a voltage source (not shown) to the ends of the electrically resistive heating coil to provide energy sufficient to heat the coil. The coil may take any shape that covers the area of thesubstrate support pedestal 152. More than one coil may be used to provide additional heating capability, if needed. - The body provides support for the heating portion and includes
fluid channels 290 disposed therein. Thefluid channels 290 are generally coupled to a surface of theheating portion 210 and may provide for either heating or cooling of thesubstrate support pedestal 152. The combination ofheating elements 250 andfluid channels 290 generally achieve temperature control of the surface of thesubstrate support pedestal 152. - The
fluid channels 290 may include a concentric ring or series of rings, or other desired configuration, having fluid inlets and outlets for circulating a liquid from a remotely located source (not shown). Thefluid channels 290 are connected to thefluid source 294 byfluid passage 292 formed in theshaft 245 ofsubstrate support pedestal 152. - The
heating elements 250 can heat the substrate on the substrate support pedestal up to about 900° C. and the fluid channels may cool the substrate to a temperature of about 0° C. The combination ofheating elements 250 and thefluid channels 290 are generally used to control the temperature of asubstrate 280 between about 10° C. and about 900° C., subject to properties of materials used insubstrate support pedestal 152 and the process parameters used for processing a substrate in thechamber 36. -
Temperature sensors 260, such as a thermocouple, may be attached to or embedded in thesubstrate support pedestal 152, such as adjacent theheating portion 210, to monitor temperature in a conventional manner. For example, measured temperature may be used in a feedback loop to control electric current applied to the resistive heaters from a power supply, such that substrate temperature can be maintained or controlled at a desired temperature or within a desired temperature range. A control unit (not shown) may be used to receive a signal from temperature sensor and control the heat power supply or a fluid source in response. - The power supply and the fluid supply of the heating and cooling components are generally located external of the
chamber 36. For example, each of the resistive heaters communicate via voltage sources by wires disposed through utility passages (not shown) formed in thebase 240 andshaft 245 of thesubstrate support pedestal 152 and are coupled to utility sources, such as power, located externally to thechamber 36. The utility passages, including thefluid passage 294, are disposed axially along thebase 240 andshaft 245 of thesubstrate support pedestal 152. A protective,flexible sheath 295 is disposed around theshaft 245 and extends from thesubstrate support pedestal 152 to the chamber wall (not shown) to prevent contamination between thesubstrate support pedestal 152 and the inside of the chamber. - The
substrate support pedestal 152 may further contain gas channels (not shown) fluidly connecting with thesubstrate receiving surface 275 of theheating portion 210 to a source of backside gas (not shown). The fluid channels 270 define a backside gas passage control passage of a heat transfer gas or masking gas between the heating portion and thesubstrate 280. - A support pedestal disposed in the chamber may include an electrostatic chuck for supporting a substrate during deposition. Examples of suitable electrostatic chucks that may be used for the support pedestal include MCA™ Electrostatic E-chuck or Pyrolytic Boron Nitride Electrostatic E-Chuck, both available from Applied Materials, Inc., of Santa Clara, Calif.
- FIG. 7B illustrates another embodiment of the
substrate support pedestal 152 having anelectrostatic chuck 210 mounted to or forming the heating portion of thesubstrate support pedestal 152. Theelectrostatic chuck 210 includes anelectrode 230 and asubstrate receiving surface 275 coated with adielectric material 235. Electrically conducting wires (not shown) couple theelectrodes 230 to a voltage source (not shown). Asubstrate 280 may be placed in contact with thedielectric material 235, and a direct current voltage is placed on theelectrode 230 to create the electrostatic attractive force to grip the substrate. - Generally, the
electrodes 230 are disposed in the thermally conductingmaterial 220 in a spaced relationship with theheating elements 250 disposed therein. Theheating elements 250 are generally disposed in a vertically spaced and parallel manner from theelectrodes 230 in the thermally conductingmaterial 220. Typically, the electrodes are disposed between the heating elements and thesubstrate receiving surface 275 though other configurations may be used.Fluid channels 290 disposed on a bottom portion of theelectrostatic chuck 210 may also be used to achieve temperature control of thesubstrate support pedestal 152 and are connected to the fluid source byfluid passage 292 formed in the substratesupport pedestal base 240.Temperature sensors 260 are attached to or embedded in theelectrostatic chuck 210 to monitor temperature. - The
electrostatic chuck 210 may further contain channels 270 formed in thesubstrate support pedestal 152 fluidly connecting with thesubstrate receiving surface 275 of theelectrostatic chuck 210 to a source of backside gas (not shown). The fluid channels 270 define a backside gas passage control passage of a heat transfer gas or masking gas between theelectrostatic chuck 210 and thesubstrate 280. - The embodiments of the substrate support pedestals152 described above may be used to form a high vacuum anneal chamber. The high vacuum anneal chamber may include substrate support pedestals 152 disposed in a PVD chamber, such as the
long throw chamber 36 described herein, with a blank target disposed therein or without a target and without bias coupled to either the target or substrate support pedestal. In operation, a substrate is disposed on the substrate support pedestal, and the substrate is heated, with or without the presence of a backside gas, by theheating elements 250 to the desired processing temperature, processed for sufficient time to anneal the substrate for the desired anneal results, and then removed from the chamber. - While the embodiments of
substrate support pedestal 152 described herein may be used to anneal the substrate, commercially available anneal chambers, such as rapid thermal anneal (RTA) chambers may also be used to anneal the substrate to form the silicide films. The invention contemplates utilizing a variety of thermal anneal chamber designs, including hot plate designs and heated lamp designs, to enhance the electroplating results. One particular thermal anneal chamber useful for the present invention is the WxZ™ chamber available from Applied materials, Inc., located in Santa Clara, Calif. One particular hot plate thermal anneal chamber useful for the present invention is the RTP XEplus Centura® thermal processing chamber available from Applied Materials, Inc., located in Santa Clara, Calif. One particular lamp anneal chamber is the Radiance™ thermal processing chamber available from Applied Materials, Inc., located in Santa Clara, Calif. - Anneal chambers capable of operating at vacuum pressures may be disposed on the
PVD transfer chamber 50, to allow post deposition annealing without breaking vacuum. Anneal chamber that are capable of operating at near atmosphere pressures may be disposed on thefirst transfer chamber 48. In the embodiment shown in FIG. 3, PVD deposition chambers with cobalt targets are disposed on thefirst transfer chamber 48 and theanneal chambers 41 that are capable of operating at near atmosphere pressures may be disposed on thesecond transfer chamber 50. - Metal Silicide Process
- The deposition and annealing step used in forming a metal silicide layer may be formed in situ, such as in a deposition chamber or in a processing system without breaking vacuum. In situ is broadly defined herein as performing two or more processes in the same chamber or in the same processing system without breaking vacuum. For example, in situ annealing may be performed in the same processing chamber as the metal deposition.
- In another example, in situ annealing may performed in a chamber adjacent to the deposition chamber, both of which are coupled to a transfer chamber, and the vacuum on the transfer chamber is not broken during processing. In a further example, in situ annealing may be performed on the same processing system at separate processing pressures, such as processing a substrate in processing chambers and annealing chambers disposed on the first and
second transfer chambers system 35 without breaking the vacuum on thesystem 35 or tranfer of th substrate to another processing system. - While the following material describes the deposition of a cobalt film, the invention contemplates the use of other materials, including titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, to form the metal silicide material as described herein.
- Metal Deposition
- In one embodiment, a metal layer may be deposited on a silicon substrate disposed in
chamber 36 and annealed on thesubstrate pedestal 152 to form the metal silicide layer without breaking vacuum. Metal for forming the metal silicide layer is deposited using thePVD chamber 36 described above. Thetarget 142 of material, such as cobalt, to be deposited is disposed in the upper portion of thechamber 36. Asubstrate 154 is provided to thechamber 36 and disposed on thesubstrate support pedestal 152. Thesubstrate 154 includes silicon material disposed thereon and is generally patterned to define features into which metal silicide films will be formed. - A processing gas is introduced into the
chamber 38 at a flow rate of between about 5 sccm and about 30 sccm. The chamber pressure is maintained below about 5 milliTorr to promote deposition of conformal PVD metal layers. Preferably, a chamber pressure between about 0.2 milliTorr and about 2 milliTorr may be used during deposition. More preferably, a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr has been observed to be sufficient for sputtering cobalt onto a substrate. - A plasma is generated by applying a power level to the
target 142 between about 0 volts (V) and about 2400 V. For example, a power level is delivered to thetarget 142 at between about 0 V and about 1000 V to sputter material on a 200 mm substrate. A power level between about 0 V and about 500 V may be applied to thesubstrate support pedestal 152 to improve directionality of the sputtered material to the substrate surface. The substrate is maintained at a temperature between about 10° C. and about 500° C. during the deposition process. - An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the
target 142 to excite the gas into a plasma state, maintaining the substrate at a temperature between about 10° C. and about 500° C., preferably about 50° C. and about 300° C., and most preferably, between about 50° C. and about 100° C. during the sputtering process, and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate. Cobalt may be deposited on the silicon material at a rate between about 300 Å/min and about 2000 Å/min using this process. - General In-Situ Annealing Process
- The cobalt and silicon layer is then annealed in situ at a temperature between about 300° C. and about 900° C. for between about 10 seconds and about 600 seconds to form the metal silicide layer. The annealing process may be performed under an inert gas environment in the deposition chamber by first introducing an inert gas into the chamber at a flow rate between about 0 sccm (Le., no backside gas) and about 15 sccm, maintaining a chamber pressure between of about 2 milliTorr or less, heating the substrate to a temperature between about 300° C. and about 900° C. for between about 5 seconds and about 600 seconds to form the metal silicide layer.
- Deposition and Annealing Process with Backside Gases in the Deposition Chamber.
- The metal may be deposited at substrate temperature of 200° C. or less, and then rapidly annealed on the
substrate support pedestal 152 at temperatures of about 400° C. or greater by introducing a backside gas flow. An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to thetarget 142 to excite the gas into a plasma state, maintaining the substrate at a temperature of about 200° C., and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate. - The substrate temperature may be maintained at about 200° C. by heating the substrate in the absence of a backside gas at a heating level that would normally heat the substrate to temperatures of 400° C. or greater. This reduced temperature control is achieved by inefficient heat transfer between the pedestal surface and the backside of the substrate at vacuum pressures. Cobalt may be deposited on the silicon material at a rate between about 300 Å/min and about 2000 Å/min using this process.
- The annealing process can then be performed in the deposition chamber by ending the plasma and applying a backside gas to the substrate support to enhance heating of the substrate to a temperature between about 400° C. and 600° C. at the same heating levels used for the deposition process. The annealing process is performed at a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- Low Temperature Deposition and Two-Step In-Situ Annealing Process in Two Chambers
- In another embodiment, the metal layer may be physical vapor deposited on a silicon substrate in
chamber 36, annealed for a first temperature for a first period of time, transferred to a second chamber, forexample chamber 41, in thesystem 35, and annealed at a second temperature for a second period of time to form the metal suicide layer without breaking vacuum. - The physical vapor deposition of the metal is performed as described above at a temperature of about 200° C. or less, preferably between about 0° C. and about 100° C. The first step of the two step in situ annealing process described above may be performed under an inert gas environment in the deposition chamber by first introducing an inert gas into the chamber at a flow rate between about 0 sccm and about 15 sccm, maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr, heating the substrate to a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- The substrate is then removed from the deposition chamber and transferred to a vacuum anneal chamber disposed on the same transfer chamber, such as
transfer chamber 48 described above in FIG. 2. The high vacuum anneal chamber may include a PVD chamber having a blank target andsubstrate support pedestal 152 described above or a commercial high vacuum anneal pedestal, such as the High Temperature High Uniformity, HTHU™ substrate support commercially available from Applied Materials Inc., of Santa Clara Calif. - The second annealing step may then be performed by maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr and heating the substrate to a temperature between about 600° C. and about 900° C. for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed in the anneal chamber at 800° C. for between about 60 seconds and 120 seconds.
- Low Temperature Deposition and Two-Step Anneal Process in Two Chambers
- In an alternative embodiment of the two chamber deposition and anneal process, the metal layer is deposited according to the process described herein at about 200° C. or less, preferably between about 0° C. and about 100° C., in the deposition chamber. The substrate is then annealed in the deposition chamber according to the anneal process described above. The substrate may then be transferred to a RTA chamber disposed on
transfer chamber 50 in FIG. 2 for a second anneal process. - Annealing in an RTA anneal chamber may be performed by introducing a process gas including nitrogen (N2), argon (Ar), helium (He), and combinations thereof, with less than about 4% hydrogen (H2), at a process gas flow rate greater than 20 liters/min to control the oxygen content to less than 100 ppm, maintaining a chamber pressure of about ambient, and heating the substrate to a temperature between about 600° C. and about 900° C. for between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed in the RTA anneal chamber at 800° C. for about 30 seconds.
- Low Temperature Deposition and Two-Step Annealing Process in Three Chambers.
- In another embodiment, the metal layer may be deposited on a silicon substrate in
chamber 36, transferred to a first anneal chamber, such as a vacuum anneal chamber disposed on thesame transfer chamber 48 on thesystem 35, annealed for a first temperature for a first period of time, transferred to a second anneal chamber, forexample chamber 41, in thesystem 35, and annealed at a second temperature for a second period of time to form the metal suicide layer without breaking vacuum. - The metal deposition is performed in the deposition chamber according to the process described above at a substrate temperature of about 200° C. or less, preferably between about 0° C. and about 100° C. The first step of this embodiment of the annealing process may be performed in situ in a first high vacuum anneal chamber disposed on a processing system by introducing an inert gas into the anneal chamber at a flow rate between about 0 sccm and about 15 sccm, maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr, heating the substrate to a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds. The first annealing step is believed to form an oxygen resistant film such as CoSi.
- The substrate may be annealed in situ by transfer to a second high vacuum annealing chamber in the processing system. The second annealing step may then be performed by maintaining a chamber pressure of about 2 milliTorr or less and heating the substrate to a temperature between about 600° C. and about 900° C. for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed in the anneal chamber at 800° C. for between about 60 seconds and 120 seconds.
- Alternatively, the substrate may be transferred to a second annealing chamber located outside the transfer chamber or processing system, such as an atmosphere pressure RTA chamber. Annealing in an RTA anneal chamber may be performed by introducing a process gas including nitrogen (N2), argon (Ar), helium (He), and combinations thereof, with less than about 4% hydrogen (H2), at a process gas flow rate greater than 20 liters/min to control the oxygen content to less than 100 ppm, maintaining a chamber pressure of about ambient, and heating the substrate to a temperature between about 400° C. and about 900° C. for between about 5 seconds and about 300 seconds to form the metal suicide layer. Preferably, the substrate is annealed in the RTA anneal chamber at 800° C. for about 30 seconds.
- High Temperature Deposition and Annealing Process.
- The metal may be deposited at a high deposition temperature. An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the
target 142 to excite the gas into a plasma state, maintaining the substrate at about an annealing temperature, Le., between about 400° C. and about 600° C. by applying a backside gas, and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate. The temperature may be maintained at about 200° C. by heating the substrate in the absence of a backside gas. Cobalt may be deposited on the silicon material at a rate between about 300 Å/min and about 2000 Å/min using this process. - The annealing process can then be performed in the deposition chamber by ending the plasma and heating of the substrate to a temperature between about 400° C. and 600° C. at the same heating levels used for the deposition process. The annealing process is performed at a temperature between about 400° C. and about 600° C. for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500° C. for between about 60 seconds and 120 seconds.
- The second annealing step may then be formed in an annealing chamber without breaking vacuum or in an annealing chamber located on a separate transfer chamber or processing system. The second annealing step includes heating the substrate to a temperature between about 600° C. and about 900° C. for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed at 800° C. for between about 60 seconds and 120 seconds.
- The metal silicide material, including suicides of cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, may be used in the formation of a MOS device shown in FIG. 8. In the illustrated MOS structure, N+ source and drain
regions type silicon substrate 400 adjacentfield oxide portions 406. Agate oxide layer 408 and apolysilicon gate electrode 410 are formed oversilicon substrate 400 in between source and drainregions oxide spacers 412 formed on the sidewalls ofpolysilicon gate electrode 410. - A cobalt layer is deposited over the MOS structure, and in particular over the exposed silicon surfaces of source and drain
regions polysilicon gate electrode 410 by the process described herein. The cobalt material is deposited to a thickness of at about 1000 Å or less to provide a sufficient amount of cobalt for the subsequent reaction with the underlying silicon at 402 and 404. Cobalt may be deposited to a thickness between about 50 Å and about 500 Å on the silicon material. The cobalt layer is then annealed in situ as described herein to form cobalt silicide. - The unreacted cobalt is removed from the substrate surface and the cobalt
Claims (36)
1. A system for processing a substrate, comprising:
a load lock chamber;
an intermediate substrate transfer region connected to the load lock chamber, the intermediate substrate transfer region comprising a first substrate transfer chamber and a second substrate transfer chamber, wherein the first substrate transfer chamber is coupled to the load lock chamber and the second substrate transfer chamber is coupled to the first substrate transfer chamber;
a physical vapor deposition (PVD) processing chamber disposed on the first substrate transfer chamber; and
an annealing chamber disposed on the second substrate transfer chamber.
2. The apparatus of claim 1 , further comprising plurality of vacuum pumps communicating with the intermediate substrate transfer region and each of the processing chambers, wherein the plurality of pumps establish a vacuum gradient of increasing pressure across the apparatus from the load lock chamber to the processing chambers.
3. The apparatus of claim 1 , wherein the second transfer chamber has a higher chamber pressure than the first substrate transfer chamber.
4. The apparatus of claim 1 , wherein the PVD processing chamber has an annealing pedestal disposed therein.
5. The apparatus of claim 1 , wherein the PVD processing chamber has a target of material selected from the group of cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof.
6. The apparatus of claim 1 , wherein the PVD processing chamber comprises a cobalt target and an annealing pedestal disposed therein.
7. The apparatus of claim 1 , wherein the annealing chamber comprises a rapid thermal annealing chamber.
8. The apparatus of claim 1 , further comprising a chemical vapor deposition chamber disposed on the first substrate transfer chamber, the second substrate transfer chamber, or combinations thereof.
9. The apparatus of claim 1 , wherein the apparatus comprises two PVD processing chambers comprising a cobalt target and an annealing pedestal disposed therein are disposed on the first transfer region and two annealing processing chambers are disposed on the second transfer chamber, wherein the second transfer chamber has a higher operating temperature than the first transfer chamber.
10. The apparatus of claim 1 , wherein the physical vapor deposition (PVD) processing chamber comprises:
a chamber enclosing a sputtering source;
a substrate support member disposed generally parallel to the sputtering surface of the sputtering source, the substrate support member comprising:
a generally planar substrate receiving surface configured to receive a substrate thereon;
an electrically resistive heating element disposed in the substrate support member; and
a fluid channel connected to a fluid supply and regulated by a controller; and
a collimator mounted between the sputtering source and the substrate support member.
11. The apparatus of claim 10 , wherein the substrate support member comprises:
an electrostatic chuck having an electrode, an electrical insulator having a generally planar substrate receiving surface disposed on the electrode and configured to receive a substrate thereon;
an electrically resistive heating element disposed in the electrostatic chuck; and
a fluid channel connected to a fluid supply and regulated by a controller.
12. The apparatus of claim 10 , further comprising an electrically conductive lead for coupling the electrically resistive heating elements to a voltage source.
13. The apparatus of claim 12 , further comprising at least one temperature sensor connected to the substrate support member.
14. The apparatus of claim 12 , further comprising a source of gas connected to a channel disposed in the support pedestal, the channel connecting the source of gas to the planar substrate receiving surface.
15. The apparatus of claim 11 , wherein the collimator has upper and lower surfaces and at least one of the surfaces being a convex surface.
16. A method for forming a silicide layer on a substrate, comprising:
positioning a substrate having silicon material disposed thereon on a substrate support disposed in a deposition chamber having a metal target disposed therein;
applying a current to the substrate support to heat the substrate to a first temperature;
introducing an inert gas into the deposition chamber;
generating a plasma by applying a bias between a metal target and the substrate support in the inert gas environment to sputter material from the metal target;
depositing the sputtered material on at least the silicon material;
providing a backside gas between the substrate pedestal and the substrate; and
annealing the substrate in situ at a second temperature greater than the first temperature to form a metal silicide layer.
17. The method of claim 16 , wherein the substrate is positioned between about 90 mm and about 400 mm from the target.
18. The method of claim 16 , wherein the metal material is selected from the group of cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof.
19. The method of claim 16 , further comprising collimating the sputtered material.
20. The method of claim 16 , wherein the first temperature is about 200° C. or less.
21. The method of claim 16 , wherein annealing the substrate in situ at a second temperature comprises annealing the substrate at a temperature between about 300° C. and about 900° C. on the substrate support.
22. The method of claim 21 , wherein the substrate is annealed for between about 10 seconds and about 600 seconds.
23. The method of claim 22 , wherein annealing the substrate in situ comprises annealing the substrate at a second temperature for a first period of time in the deposition chamber, transferring the substrate to an annealing chamber, and annealing the substrate at a third temperature greater than the second temperature for a second period of time without breaking vacuum in a processing system.
24. The method of claim 23 , wherein the second temperature is between about 300° C. and about 500° C. and the third temperature is between about 400° C. and about 900° C.
25. The method of claim 23 , wherein the first period of time is between about 5 second and about 300 seconds and the second period of time is between about 5 seconds and about 300 seconds.
26. The method of claim 23 , wherein annealing the substrate in situ comprises annealing the substrate at a second temperature higher than the first temperature in a first annealing chamber, transferring the substrate to a second annealing chamber, and then annealing the substrate at a third temperature higher than the second temperature for the second period of time without breaking vacuum in a processing system.
27. The method of claim 23 , wherein the substrate surface is treated by annealing the substrate in the deposition chamber at a first temperature for a first period of time, transferring the substrate to the thermal annealing chamber, and annealing the substrate at a second temperature for a second period of time without breaking vacuum in the processing system.
28. A method of processing a substrate, comprising:
introducing a substrate having silicon material disposed thereon into a load lock;
transferring the substrate to a first transfer chamber in vacuum tight communication with the loadlock;
positioning the substrate on a heating pedestal in a physical vapor deposition chamber in vacuum tight communication with the first transfer chamber;
depositing a metal layer on the silicon material;
annealing the substrate prior to transferring the substrate to a second transfer chamber having an annealing chamber disposed thereon, wherein the second transfer chamber is in vacuum tight communication with the first transfer chamber; and
annealing the substrate in the annealing chamber to form a metal silicide layer.
29. The method of claim 28 , wherein annealing the substrate prior to transferring the substrate comprises annealing the substrate in the physical vapor deposition processing chamber.
30. The method of claim 28 , further comprising a vacuum annealing chamber in vacuum tight communication with the first transfer chamber.
31. The method of claim 30 , wherein annealing the substrate in the annealing chamber comprises annealing the substrate in the vacuum annealing chamber.
32. The method of claim 28 , wherein annealing the substrate comprises annealing the substrate at a temperature between about 300° C. and about 900° C. without breaking vacuum.
33. The method of claim 28 , wherein depositing a metal layer comprises sputtering the metal target at a substrate temperature of about 200° C. or less.
34. The method of claim 28 , wherein the second transfer chamber has a higher chamber pressure than the first substrate transfer chamber.
35. The method of claim 28 , wherein the metal target comprises a material selected from the group of cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof.
36. The apparatus of claim 28 , wherein the physical vapor deposition processing chamber comprises a cobalt target and an annealing pedestal disposed therein.
Priority Applications (17)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/916,234 US20030029715A1 (en) | 2001-07-25 | 2001-07-25 | An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems |
US10/044,412 US6740585B2 (en) | 2001-07-25 | 2002-01-09 | Barrier formation using novel sputter deposition method with PVD, CVD, or ALD |
PCT/US2002/023578 WO2003080887A2 (en) | 2001-07-25 | 2002-07-25 | Methods and apparatus for annealing in physical vapor deposition systems |
JP2003578610A JP2006500472A (en) | 2001-07-25 | 2002-07-25 | Annealing method and apparatus in physical vapor deposition system |
JP2003533324A JP2005504885A (en) | 2001-07-25 | 2002-07-25 | Barrier formation using a novel sputter deposition method |
PCT/US2002/023581 WO2003030224A2 (en) | 2001-07-25 | 2002-07-25 | Barrier formation using novel sputter-deposition method |
US10/845,970 US20040211665A1 (en) | 2001-07-25 | 2004-05-14 | Barrier formation using novel sputter-deposition method |
US11/456,073 US7416979B2 (en) | 2001-07-25 | 2006-07-06 | Deposition methods for barrier and tungsten materials |
US11/733,929 US8110489B2 (en) | 2001-07-25 | 2007-04-11 | Process for forming cobalt-containing materials |
US12/111,923 US20090004850A1 (en) | 2001-07-25 | 2008-04-29 | Process for forming cobalt and cobalt silicide materials in tungsten contact applications |
US12/111,930 US20080268635A1 (en) | 2001-07-25 | 2008-04-29 | Process for forming cobalt and cobalt silicide materials in copper contact applications |
US12/171,132 US7611990B2 (en) | 2001-07-25 | 2008-07-10 | Deposition methods for barrier and tungsten materials |
US12/201,976 US9051641B2 (en) | 2001-07-25 | 2008-08-29 | Cobalt deposition on barrier surfaces |
US12/969,445 US8187970B2 (en) | 2001-07-25 | 2010-12-15 | Process for forming cobalt and cobalt silicide materials in tungsten contact applications |
US13/452,237 US8815724B2 (en) | 2001-07-25 | 2012-04-20 | Process for forming cobalt-containing materials |
US13/456,904 US8563424B2 (en) | 2001-07-25 | 2012-04-26 | Process for forming cobalt and cobalt silicide materials in tungsten contact applications |
US14/717,375 US9209074B2 (en) | 2001-07-25 | 2015-05-20 | Cobalt deposition on barrier surfaces |
Applications Claiming Priority (1)
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---|---|---|---|
US09/916,234 US20030029715A1 (en) | 2001-07-25 | 2001-07-25 | An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/044,412 Continuation-In-Part US6740585B2 (en) | 2001-07-25 | 2002-01-09 | Barrier formation using novel sputter deposition method with PVD, CVD, or ALD |
Publications (1)
Publication Number | Publication Date |
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US20030029715A1 true US20030029715A1 (en) | 2003-02-13 |
Family
ID=25436918
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/916,234 Abandoned US20030029715A1 (en) | 2001-07-25 | 2001-07-25 | An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems |
US10/044,412 Expired - Lifetime US6740585B2 (en) | 2001-07-25 | 2002-01-09 | Barrier formation using novel sputter deposition method with PVD, CVD, or ALD |
US12/171,132 Expired - Fee Related US7611990B2 (en) | 2001-07-25 | 2008-07-10 | Deposition methods for barrier and tungsten materials |
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---|---|---|---|
US10/044,412 Expired - Lifetime US6740585B2 (en) | 2001-07-25 | 2002-01-09 | Barrier formation using novel sputter deposition method with PVD, CVD, or ALD |
US12/171,132 Expired - Fee Related US7611990B2 (en) | 2001-07-25 | 2008-07-10 | Deposition methods for barrier and tungsten materials |
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US (3) | US20030029715A1 (en) |
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Also Published As
Publication number | Publication date |
---|---|
WO2003080887A2 (en) | 2003-10-02 |
JP2006500472A (en) | 2006-01-05 |
US20080268636A1 (en) | 2008-10-30 |
US6740585B2 (en) | 2004-05-25 |
WO2003080887A3 (en) | 2004-08-26 |
US7611990B2 (en) | 2009-11-03 |
US20030022487A1 (en) | 2003-01-30 |
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