US20030025213A1 - Device for attaching a semiconductor chip to a chip carrier - Google Patents

Device for attaching a semiconductor chip to a chip carrier Download PDF

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Publication number
US20030025213A1
US20030025213A1 US10/255,838 US25583802A US2003025213A1 US 20030025213 A1 US20030025213 A1 US 20030025213A1 US 25583802 A US25583802 A US 25583802A US 2003025213 A1 US2003025213 A1 US 2003025213A1
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Prior art keywords
semiconductor chip
chip
contact areas
pressure
carrier
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US10/255,838
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Hermann Schmid
Wolfgang Ramin
Nusret Yilmaz
Heinrich Brenninger
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Texas Instruments Inc
Original Assignee
Hermann Schmid
Wolfgang Ramin
Nusret Yilmaz
Heinrich Brenninger
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Priority to US10/255,838 priority Critical patent/US20030025213A1/en
Publication of US20030025213A1 publication Critical patent/US20030025213A1/en
Assigned to TEXAS INSTRUMENTS INCORPORATED reassignment TEXAS INSTRUMENTS INCORPORATED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
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    • H01L2224/75301—Bonding head
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    • H01L2224/75317—Removable auxiliary member
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
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Definitions

  • the invention relates to a device for attaching a semiconductor chip to a chip carrier, thereby producing an electrically conducting connection between contact areas arranged on a surface of the semiconductor chip and contact areas on the chip carrier by means of an anisotropically conducting film or an anisotropically conducting paste.
  • a problem when using such a film or such a paste to produce the electrical connection between the contact areas of the semiconductor chip and the contact areas of the carrier is that very narrow tolerances must be adhered to as regards the tools which are used to press the semiconductor chip against the film or the paste and the carrier, since a reliable electrical connection between the different contact areas of the semiconductor chip and the corresponding contact areas on the carrier can only be achieved when, on the one hand, the pressure applied is evenly distributed and, on the other, the thickness of the film or the paste between the areas in contact with each other is made as uniform as possible.
  • the uniformity of the layer thickness is of great importance for the following reason.
  • the anisotropic conduction behaviour of the film or of the paste used is achieved in that in a material, such as epoxy resin, electrically conductive particles are embedded which are not in contact with each other. In the direction of the surface extension of the film or the paste, respectively, this material therefore offers a very high electric resistance, but it assumes a low-resistance state when as a result of applied pressure it becomes so thin between two contact areas that the particles embedded in the epoxy resin come into contact with both the contact areas at the semiconductor chip and also with the contact areas at the carrier. These particles then produce a conducting connection between the contact areas.
  • a material such as epoxy resin
  • the invention rests of the requirement to produce an embodiment of the device of the type described in the foregoing that will allow the desired electrical connections between the contact areas on the semiconductor chip and the corresponding contact areas on the chip carrier to be realised in a highly reliable way, without the need for stringent demands on the tolerance of the parts involved.
  • a pressure die for the application of pressure to the chip with an adjustable pressing force against the chip carrier
  • a counter-pressure support for receiving the chip carrier with the semiconductor chip arranged on it with the interposition of the anisotropically conducting film or the anisotropically conducting paste
  • an elastic body arranged either between the pressure die and the semiconductor chip or between the chip carrier and the counter-pressure support.
  • the elastic body used in the device according to the invention takes care of the compensation of tolerances and ensures that the semiconductor chip is pressed in precisely plane-parallel alignment against the chip carrier, so that between the contact areas on the semiconductor chip and the corresponding contact areas on the chip carrier equal distances are obtained, which are essential for the establishment of reliable electrical connections between these contact areas.
  • the elastic body can be attached to the face of the pressure die, or else to the surface of the counter-pressure support which receives the chip carrier.
  • the elastic body can advantageously also be an elastic strip extending between the face of the pressure die and the surface of the chip.
  • the counter-pressure support may be heated to enable the anisotropically conducting film used or the anisotropically conducting paste used to set hard in a shorter time.
  • the elastic body may advantageously be made of heat-resistant silicone.
  • FIG. 1 shows a first embodiment of the device according to the invention
  • FIG. 2 is an enlarged section of the device of FIG. 1, before the semiconductor chip is pressed against the chip carrier by means of the pressure die,
  • FIG. 3 is an enlarged section of FIG. 2 after pressure-bonding the semiconductor chip
  • FIG. 4 shows the device according to the invention in a second embodiment
  • FIG. 5 shows the device according to the invention in a third embodiment.
  • a semiconductor chip 10 is to be attached to a chip carrier 12 in such a way that the contact areas located on the lower surface of the semiconductor chip, facing the chip carrier 12 , are to be brought into electrical contact with the contact areas located on the upper surface of the chip carrier 12 , facing the semiconductor chip 10 .
  • the chip carrier 12 can have printed circuit paths on its upper surface, whereby specific areas of these circuit paths constitute the contact areas which are to be connected to the corresponding contact areas of the semiconductor chip.
  • the chip carrier 12 can, for example, be a ceramic substrate, a conventional circuit board, or even a foil printed with circuit paths. In the example described it is assumed that the chip carrier is such a foil with printed circuit paths.
  • the chip carrier 12 is placed on a counter pressure support 14 and a piece of an anisotropically conducting film 16 is placed on its top side, in the area where the semiconductor chip 10 is to be attached.
  • This film also known as ACF (for anisotropic conductive film), consists of epoxy resin in which the electrically conducting particles are embedded. Such films are commercially available from Toshiba and Hitachi.
  • the semiconductor chip 10 is then placed on the film 16 in such a way that the contact areas at its bottom surface come to rest exactly over the chip carrier contact areas with which electric contact is to be made.
  • a pressure die 18 is subsequently lowered onto the top side of the semiconductor chip 10 with a pre-determined, precisely defined force.
  • FIG. 2 shows in an enlarged sectional view, not to scale, how the contact areas 22 , 24 at the bottom surface of the semiconductor chip 10 are positioned in relation to the contact areas 26 , 28 on the chip carrier 12 when the semiconductor chip 10 is in place, after the interposition of the film 16 and before the application of pressure by the pressure die 18 .
  • the film 16 contains electrically conducting particles 30 which are not in contact with respect to each other, so that the film has a very high electric resistance. Only when, after application of pressure, the film becomes so thin as is shown in FIG. 3, the electrically conducting particles establish a connection between the contact areas 22 , 26 and 24 , 28 , respectively. The electric resistance in the direction parallel to the surface expansion of the film, however, still remains high, so that no short circuit can occur between the contact areas separated from each other in this direction.
  • the application of pressure to the top side of the semiconductor chip 10 causes all interstices between the contact areas to be completely filled with the material of the film. Since the elastic body 20 , on application of pressure, also folds around the edges of the semiconductor chip 10 , an accumulation 32 of the material of the film 16 is produced around the entire semiconductor chip 10 , which not only perfectly protects the chip against external influences, but also from separation, even when the chip carrier 12 is subjected to bending stresses.
  • FIG. 4 A further embodiment variant of the here described device is represented in FIG. 4, where the elastic body is not applied to the face of the pressure die 18 , but takes the shape of an elastic strip 34 which extends between the face of the pressure die 18 and the surface of the semiconductor chip 10 .
  • the elastic band 34 is applied, in the same manner as the elastic body 20 in the embodiment shown in FIG. 1, to and around the semiconductor chip 10 , thus producing the same effect as the elastic body 20 .
  • the embodiment of the device represented in FIG. 5 differs from the previously described embodiments in that the elastic body is in the form of an elastic padding 36 , inset in the surface of the counter pressure support 14 , which, just like the elastic bodies described as part of previous embodiments, is able to compensate for any unevenness when a pressure is exerted on the semiconductor chip 10 .
  • anisotropically conducting film 16 in the embodiments described can also be replaced by an anisotropically conducting paste which, like the film, consists of an epoxy resin in which conducting particles are embedded.
  • anisotropically conducting pastes are commercially available, for example from the companies previously mentioned. They are also known by their shortened designation of ACP (for Anisotropic Conductive Paste)

Abstract

Device for attaching a semiconductor chip to a chip carrier In a device for attaching a semiconductor chip (10) to a chip carrier (12), thereby producing an electrically conducting connection between contact areas (22, 24) arranged on a surface of the semiconductor chip (10) and contact areas (26, 28) on the chip carrier (12) by means of an anisotropically conducting film (16) or an anisotropically conducting paste (16), a pressure die (18) is used for the application of the pressure to the chip (10) with an adjustable pressing force against the chip carrier (12). A counter-pressure support (14) accepts the chip carrier (12) with the semiconductor chip (10) arranged on it with the interposition of the anisotropically conducting film (16) or the anisotropically conducting paste (16). An elastic body (20) is arranged either between the pressure die (14) and the semiconductor chip (10) or between the chip carrier (12) and the counter-pressure support (14).

Description

  • The invention relates to a device for attaching a semiconductor chip to a chip carrier, thereby producing an electrically conducting connection between contact areas arranged on a surface of the semiconductor chip and contact areas on the chip carrier by means of an anisotropically conducting film or an anisotropically conducting paste. [0001]
  • In the production of electronic parts, use is more and more frequently made of a new process for producing the electrical connection between a semiconductor chip and the contact areas on a carrier, connected by conductor tracks, whereby the contact areas of the semiconductor chip are brought into direct contact with the contact areas of the carrier. The previously used package, housing the semiconductor chip, and which was provided with its own contact areas used for contact bonding, is hereby dispensed with. To produce the electrical connection between the contact areas of the semiconductor chip and the contact areas on the carrier, use is thereby made of an anisotropically conducting film or an anisotropically conducting paste, that is a material which offers a very low electric resistance in only one direction, whilst it is practically non-conducting in the direction perpendicular to [0002]
  • A problem when using such a film or such a paste to produce the electrical connection between the contact areas of the semiconductor chip and the contact areas of the carrier is that very narrow tolerances must be adhered to as regards the tools which are used to press the semiconductor chip against the film or the paste and the carrier, since a reliable electrical connection between the different contact areas of the semiconductor chip and the corresponding contact areas on the carrier can only be achieved when, on the one hand, the pressure applied is evenly distributed and, on the other, the thickness of the film or the paste between the areas in contact with each other is made as uniform as possible. The uniformity of the layer thickness is of great importance for the following reason. The anisotropic conduction behaviour of the film or of the paste used is achieved in that in a material, such as epoxy resin, electrically conductive particles are embedded which are not in contact with each other. In the direction of the surface extension of the film or the paste, respectively, this material therefore offers a very high electric resistance, but it assumes a low-resistance state when as a result of applied pressure it becomes so thin between two contact areas that the particles embedded in the epoxy resin come into contact with both the contact areas at the semiconductor chip and also with the contact areas at the carrier. These particles then produce a conducting connection between the contact areas. If, however, the semiconductor chip is pressed against the carrier in even a slightly slanting position, because of excessive tolerances, a situation may arise where the conducting particles cannot produce a conducting connection between the contact surfaces because they are not in contact with each other, and that the film or paste material is squeezed out at some contact areas to an extent that no conducting particles remain available between the contact areas to be connected. The desired electrical connection between the contact areas is therefore not realised at these points, so that the unit to be produced has to be scrapped. Especially in the case of semiconductor chips having a plurality of contact areas which are to be connected to the corresponding contact areas of the carrier, this requirement for a uniform contact pressure constitutes a problem that is difficult to solve. [0003]
  • The invention rests of the requirement to produce an embodiment of the device of the type described in the foregoing that will allow the desired electrical connections between the contact areas on the semiconductor chip and the corresponding contact areas on the chip carrier to be realised in a highly reliable way, without the need for stringent demands on the tolerance of the parts involved. [0004]
  • This requirement is satisfied according to the invention in the device described above by a pressure die for the application of pressure to the chip with an adjustable pressing force against the chip carrier, a counter-pressure support for receiving the chip carrier with the semiconductor chip arranged on it with the interposition of the anisotropically conducting film or the anisotropically conducting paste, and an elastic body arranged either between the pressure die and the semiconductor chip or between the chip carrier and the counter-pressure support. [0005]
  • The elastic body used in the device according to the invention takes care of the compensation of tolerances and ensures that the semiconductor chip is pressed in precisely plane-parallel alignment against the chip carrier, so that between the contact areas on the semiconductor chip and the corresponding contact areas on the chip carrier equal distances are obtained, which are essential for the establishment of reliable electrical connections between these contact areas. [0006]
  • In an advantageous embodiment, the elastic body can be attached to the face of the pressure die, or else to the surface of the counter-pressure support which receives the chip carrier. The elastic body can advantageously also be an elastic strip extending between the face of the pressure die and the surface of the chip. To accelerate the solidification of the electrical connection produced, the counter-pressure support may be heated to enable the anisotropically conducting film used or the anisotropically conducting paste used to set hard in a shorter time. The elastic body may advantageously be made of heat-resistant silicone.[0007]
  • The invention shall now be described in exemplified form with reference to the drawing, where [0008]
  • FIG. 1 shows a first embodiment of the device according to the invention, [0009]
  • FIG. 2 is an enlarged section of the device of FIG. 1, before the semiconductor chip is pressed against the chip carrier by means of the pressure die, [0010]
  • FIG. 3 is an enlarged section of FIG. 2 after pressure-bonding the semiconductor chip, [0011]
  • FIG. 4 shows the device according to the invention in a second embodiment, and [0012]
  • FIG. 5 shows the device according to the invention in a third embodiment.[0013]
  • By reference to the device schematically represented in FIG. 1, a [0014] semiconductor chip 10 is to be attached to a chip carrier 12 in such a way that the contact areas located on the lower surface of the semiconductor chip, facing the chip carrier 12, are to be brought into electrical contact with the contact areas located on the upper surface of the chip carrier 12, facing the semiconductor chip 10. The chip carrier 12 can have printed circuit paths on its upper surface, whereby specific areas of these circuit paths constitute the contact areas which are to be connected to the corresponding contact areas of the semiconductor chip. The chip carrier 12 can, for example, be a ceramic substrate, a conventional circuit board, or even a foil printed with circuit paths. In the example described it is assumed that the chip carrier is such a foil with printed circuit paths.
  • The [0015] chip carrier 12 is placed on a counter pressure support 14 and a piece of an anisotropically conducting film 16 is placed on its top side, in the area where the semiconductor chip 10 is to be attached. This film, also known as ACF (for anisotropic conductive film), consists of epoxy resin in which the electrically conducting particles are embedded. Such films are commercially available from Toshiba and Hitachi.
  • The [0016] semiconductor chip 10 is then placed on the film 16 in such a way that the contact areas at its bottom surface come to rest exactly over the chip carrier contact areas with which electric contact is to be made. A pressure die 18 is subsequently lowered onto the top side of the semiconductor chip 10 with a pre-determined, precisely defined force. On the face of this pressure die 18 there is an elastic body 20 of silicone which ensures that the semiconductor chip 10 is pressed against the chip carrier 12 in precise plane-parallel alignment with respect to the surface of the counter pressure support 14. Because of the elasticity of the elastic body 20, any incorrect alignment or any tolerances of the parts moving together, in relation to each other, are thus compensated.
  • FIG. 2 shows in an enlarged sectional view, not to scale, how the [0017] contact areas 22, 24 at the bottom surface of the semiconductor chip 10 are positioned in relation to the contact areas 26, 28 on the chip carrier 12 when the semiconductor chip 10 is in place, after the interposition of the film 16 and before the application of pressure by the pressure die 18. As can be seen, the film 16 contains electrically conducting particles 30 which are not in contact with respect to each other, so that the film has a very high electric resistance. Only when, after application of pressure, the film becomes so thin as is shown in FIG. 3, the electrically conducting particles establish a connection between the contact areas 22, 26 and 24, 28, respectively. The electric resistance in the direction parallel to the surface expansion of the film, however, still remains high, so that no short circuit can occur between the contact areas separated from each other in this direction.
  • As shown in FIG. 3, the application of pressure to the top side of the [0018] semiconductor chip 10 causes all interstices between the contact areas to be completely filled with the material of the film. Since the elastic body 20, on application of pressure, also folds around the edges of the semiconductor chip 10, an accumulation 32 of the material of the film 16 is produced around the entire semiconductor chip 10, which not only perfectly protects the chip against external influences, but also from separation, even when the chip carrier 12 is subjected to bending stresses.
  • A further embodiment variant of the here described device is represented in FIG. 4, where the elastic body is not applied to the face of the pressure die [0019] 18, but takes the shape of an elastic strip 34 which extends between the face of the pressure die 18 and the surface of the semiconductor chip 10. When the pressure die 18 in lowered in the direction of the semiconductor chip 10, the elastic band 34 is applied, in the same manner as the elastic body 20 in the embodiment shown in FIG. 1, to and around the semiconductor chip 10, thus producing the same effect as the elastic body 20.
  • The embodiment of the device represented in FIG. 5 differs from the previously described embodiments in that the elastic body is in the form of an [0020] elastic padding 36, inset in the surface of the counter pressure support 14, which, just like the elastic bodies described as part of previous embodiments, is able to compensate for any unevenness when a pressure is exerted on the semiconductor chip 10.
  • The anisotropically conducting [0021] film 16 in the embodiments described can also be replaced by an anisotropically conducting paste which, like the film, consists of an epoxy resin in which conducting particles are embedded. Such pastes are commercially available, for example from the companies previously mentioned. They are also known by their shortened designation of ACP (for Anisotropic Conductive Paste)
  • For the purpose of accelerating the hardening process of the film or the paste, all embodiments described can be provided with a heated [0022] counter pressure support 14. The consequence of this is that a durable connection between the semiconductor chip 10 and the chip carrier 12 is achieved in only a short time.
  • By the use of the device described, very reliable connections between the contact areas of the semiconductor chip and the corresponding contact areas on the [0023] chip carrier 12 can be achieved, which also applies when a large number of contact areas is present on the underside of the semiconductor chip 10, that are to be connected to the corresponding contact areas of the chip carrier 14.

Claims (6)

1. Device for attaching a semiconductor chip to a chip carrier, thereby producing an electrically conducting connection between contact areas arranged on a surface of the semiconductor chip and contact areas on the chip carrier by means of an anisotropically conducting film (16) or an anisotropically conducting paste (16), characterized by a pressure die (18) for the application of the pressure to the chip (10) with an adjustable pressing force against the chip carrier (12), a counter-pressure support (14), for receiving the chip carrier (12) with the semiconductor chip (10) arranged on it with the interposition of the anisotropically conducting film (16) or the anisotropically conducting paste (16), and an elastic body (20; 34; 36) arranged either between the pressure die (14) and the semiconductor chip (10) or between the chip carrier (12) and the counter-pressure support (14).
2. Device according to claim 1, whereby the elastic body (20) is fitted to the face of the pressure die (18).
3. Device according to claim 1, whereby the elastic body (36) is fitted to the surface of the counter-pressure support (14) which is to receive the chip carrier (12).
4. Device according to claim 1, whereby the elastic body (34) is a band extending between the face of the pressure die (18) and the surface of the semiconductor chip (10).
5. Device according to any one of the previous claims, whereby the counter-pressure support (14) is heated.
6. Device according to any one of the previous claims, whereby the elastic body consists of heat-resistant silicone.
US10/255,838 2000-04-19 2002-09-27 Device for attaching a semiconductor chip to a chip carrier Abandoned US20030025213A1 (en)

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US09/838,053 US6559523B2 (en) 2000-04-19 2001-04-19 Device for attaching a semiconductor chip to a chip carrier
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060009800A1 (en) * 2003-04-11 2006-01-12 Velocimed Pfo, Inc. Closure devices, related delivery methods, and related methods of use
US20100178923A1 (en) * 2002-02-16 2010-07-15 Seung June Yi Method For Relocating SRNS In A Mobile Communication System

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10019443A1 (en) * 2000-04-19 2001-10-31 Texas Instruments Deutschland Device for fastening a semiconductor chip on a chip carrier
DE10151657C1 (en) * 2001-08-02 2003-02-06 Fraunhofer Ges Forschung Process for assembling a chip with contacts on a substrate comprises applying adhesion agent points and an adhesive mark, joining the chip and the substrate, and allowing the adhesives to harden
JP3780214B2 (en) * 2002-01-25 2006-05-31 キヤノン株式会社 IC pressure bonding method
AU2003228259A1 (en) * 2002-08-08 2004-02-25 Nanoink, Inc. Protosubstrates
DE102004014214B3 (en) * 2004-03-23 2005-09-15 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Gluing system for fastening transponder chip to substrate uses thick layer of electrically conducting glue with matrix loaded with conducting particles forming bridges between electrodes
DE102004021633B4 (en) * 2004-05-03 2006-04-06 Infineon Technologies Ag Method for connecting a semiconductor chip to a chip carrier and arrangement with a semiconductor chip and a chip carrier
EP1715521B1 (en) * 2005-04-21 2012-02-22 C.R.F. Società Consortile per Azioni Use of a transparent display having light-emitting diodes (LED) in a motor vehicle
CN101517720A (en) * 2006-09-15 2009-08-26 琳得科株式会社 Process for producing semiconductor device
DE102007037538A1 (en) * 2007-08-09 2009-02-12 Robert Bosch Gmbh Assembly and manufacture of an assembly

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4647959A (en) * 1985-05-20 1987-03-03 Tektronix, Inc. Integrated circuit package, and method of forming an integrated circuit package
US5058796A (en) * 1988-03-03 1991-10-22 Siemens Aktiengesellschaft Apparatus for fastening electronic components to substrates
US5508796A (en) * 1993-03-23 1996-04-16 Canon Kabushiki Kaisha Image forming apparatus with select relation among distances in recording material conveyance path
US5778294A (en) * 1995-09-20 1998-07-07 Hitachi, Ltd. Electrophotographic apparatus and belt fixing device with non-uniform nip pressure
US5910641A (en) * 1997-01-10 1999-06-08 International Business Machines Corporation Selectively filled adhesives for compliant, reworkable, and solder-free flip chip interconnection and encapsulation
US6077382A (en) * 1997-05-09 2000-06-20 Citizen Watch Co., Ltd Mounting method of semiconductor chip
US6269999B1 (en) * 1999-08-06 2001-08-07 Texas Instruments Incorporated Semiconductor chip mounting method utilizing ultrasonic vibrations
US6462284B1 (en) * 1998-07-01 2002-10-08 Seiko Epson Corporation Semiconductor device and method of manufacture thereof
US6559523B2 (en) * 2000-04-19 2003-05-06 Texas Instruments Incorporated Device for attaching a semiconductor chip to a chip carrier

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0642502B2 (en) * 1988-10-19 1994-06-01 松下電器産業株式会社 Method and device for manufacturing semiconductor device
US5115545A (en) * 1989-03-28 1992-05-26 Matsushita Electric Industrial Co., Ltd. Apparatus for connecting semiconductor devices to wiring boards
JPH0367421U (en) * 1989-11-02 1991-07-01
US5136365A (en) * 1990-09-27 1992-08-04 Motorola, Inc. Anisotropic conductive adhesive and encapsulant material
US5605547A (en) * 1995-03-27 1997-02-25 Micron Technology, Inc. Method and apparatus for mounting a component to a substrate using an anisotropic adhesive, a compressive cover film, and a conveyor
DE19536005B4 (en) * 1995-09-28 2006-02-02 INSTITUT FüR MIKROTECHNIK MAINZ GMBH Device for the highly accurate detection and positioning of micro devices
DE19610112C2 (en) * 1996-03-14 2000-04-06 Tech Gmbh Antriebstechnik Und Process for soldering semiconductor chips
JPH09321097A (en) * 1996-06-03 1997-12-12 Matsushita Electric Ind Co Ltd Depressing equipment of work provided with bumps
JPH09326422A (en) * 1996-06-06 1997-12-16 Matsushita Electric Ind Co Ltd Bumped-work pressing device
JPH10173007A (en) * 1996-12-11 1998-06-26 Mitsubishi Electric Corp Bare chip-mounting apparatus
JPH10303256A (en) * 1997-04-30 1998-11-13 Matsushita Electric Ind Co Ltd Tape carrier connection method
JP3030271B2 (en) * 1997-05-19 2000-04-10 富士通株式会社 How to mount semiconductor components
JPH11345825A (en) * 1998-06-02 1999-12-14 Sony Corp Mounting device for semiconductor chip
JP3514649B2 (en) * 1999-01-27 2004-03-31 シャープ株式会社 Flip chip connection structure and connection method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4647959A (en) * 1985-05-20 1987-03-03 Tektronix, Inc. Integrated circuit package, and method of forming an integrated circuit package
US5058796A (en) * 1988-03-03 1991-10-22 Siemens Aktiengesellschaft Apparatus for fastening electronic components to substrates
US5508796A (en) * 1993-03-23 1996-04-16 Canon Kabushiki Kaisha Image forming apparatus with select relation among distances in recording material conveyance path
US5778294A (en) * 1995-09-20 1998-07-07 Hitachi, Ltd. Electrophotographic apparatus and belt fixing device with non-uniform nip pressure
US5910641A (en) * 1997-01-10 1999-06-08 International Business Machines Corporation Selectively filled adhesives for compliant, reworkable, and solder-free flip chip interconnection and encapsulation
US6077382A (en) * 1997-05-09 2000-06-20 Citizen Watch Co., Ltd Mounting method of semiconductor chip
US6462284B1 (en) * 1998-07-01 2002-10-08 Seiko Epson Corporation Semiconductor device and method of manufacture thereof
US6269999B1 (en) * 1999-08-06 2001-08-07 Texas Instruments Incorporated Semiconductor chip mounting method utilizing ultrasonic vibrations
US6559523B2 (en) * 2000-04-19 2003-05-06 Texas Instruments Incorporated Device for attaching a semiconductor chip to a chip carrier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100178923A1 (en) * 2002-02-16 2010-07-15 Seung June Yi Method For Relocating SRNS In A Mobile Communication System
US20060009800A1 (en) * 2003-04-11 2006-01-12 Velocimed Pfo, Inc. Closure devices, related delivery methods, and related methods of use

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US20020153598A1 (en) 2002-10-24
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DE10019443A1 (en) 2001-10-31
US6559523B2 (en) 2003-05-06

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