US20020081844A1 - Method of manufacturing a barrier metal layer using atomic layer deposition - Google Patents

Method of manufacturing a barrier metal layer using atomic layer deposition Download PDF

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US20020081844A1
US20020081844A1 US10/084,193 US8419302A US2002081844A1 US 20020081844 A1 US20020081844 A1 US 20020081844A1 US 8419302 A US8419302 A US 8419302A US 2002081844 A1 US2002081844 A1 US 2002081844A1
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time
point
source gas
barrier metal
metal layer
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In-Sang Jeon
Sang-Bom Kang
Hyun-Seok Lim
Gil-heyun Choi
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45531Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations specially adapted for making ternary or higher compositions
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562Selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/7685Barrier, adhesion or liner layers the layer covering a conductive structure

Definitions

  • the present invention relates to a method of manufacturing semiconductor devices. More particularly, the present invention relates to a method of manufacturing a barrier metal layer using atomic layer deposition.
  • a barrier metal layer (for example, a TiN layer, a TaN layer, a WN layer) may be formed between adjacent material layers in order to prevent mutual diffusion or a chemical reaction from occurring between the adjacent material layers.
  • barrier metal layers are typically interposed between a lower electrode of a capacitor and a contact plug, between a dielectric layer of a capacitor and an upper electrode of the capacitor, between a conductive line and an insulating layer, and between a via contact and an insulating layer.
  • CVD chemical vapor deposition
  • a precursor including a halogen, such as Cl is used as a typical metal source gas.
  • the manufacturing process of a CVD barrier metal layer has an advantage in that the barrier metal is deposited rapidly, and a drawback in that the halogen of the precursor fails to fall out of the barrier metal layer and remains as an impurity within the barrier metal layer.
  • the halogen remaining within the barrier metal layer as described above may cause an adjacent material layer (for example, an aluminum conductive line) to erode, and may increase the resistivity of the barrier metal layer.
  • the amount of halogen remaining within the barrier metal layer must be reduced so as to decrease the resistivity of the barrier metal layer.
  • the CVD barrier metal layer manufacturing process must be performed at a high temperature.
  • a deposition temperature of at least 675° C. is required to obtain a resistivity of 200 ⁇ -cm or less.
  • a barrier metal layer is fabricated at a deposition temperature of 600° C. or greater, the thermal budget of an underlayer formed below the barrier metal layer is quite high, and secondary problems such as the generation of thermal stress are created.
  • a CVD barrier metal layer must be formed over an Si contact or a via contact at a deposition temperature of 500° C. or less if the Si contact or via contact are not to be unduly thermally stressed. That is, the CVD barrier metal layer manufacturing process must be performed at a low temperature.
  • a method of adding methylhydrazine (MH) to a metal source gas TiCl 4 can be used to facilitate the deposition of the barrier metal at a low temperature.
  • this technique has a drawback in that the step coverage of the barrier metal layer is compromised.
  • the problems in the CVD barrier metal layer manufacturing process posed by using a metal source gas such as TiCL 4 as a precursor can be overcome by a technique of flushing the entire surface of a semiconductor substrate with an impurity-removing gas after the barrier metal layer is formed.
  • the rate at which the impurity-removing gas must flow to flush the surface of the semiconductor substrate is several tens to several hundreds of times greater than that at which the reaction gas flows into the reaction chamber. Accordingly, this technique requires controlling the process conditions prevailing in the reaction chamber, such as the pressure of the chamber and the like. Effecting such a control takes time and thus, increases the total time of the manufacturing process.
  • ALD atomic layer deposition
  • the conventional barrier metal layer forming method using ALD has an advantage in that it can be performed at a low temperature while minimizing the content of Cl in the barrier metal layer.
  • the mechanism by which the barrier metal is deposited in ALD is chemical adsorption. Therefore, the conventional barrier metal layer forming method using ALD has a drawback in that the deposition rate is too slow for use in manufacturing semiconductor devices.
  • the deposition rate of a typical CVD process used to form a TiN layer is approximately several hundreds of ⁇ /min.
  • the deposition rate at which a TiN layer can be formed using the conventional ALD process is less than 100 ⁇ /min, which is very slow compared to when the CVD process is used.
  • a first object of the present invention is to provide a method of manufacturing a barrier metal layer that makes use of atomic layer deposition (ALD) but in which the deposition rate is not too slow.
  • ALD atomic layer deposition
  • a second object of the present invention is to provide a method of manufacturing a barrier metal layer using ALD, and by which the deposition rate at which the ALD occurs can be increased without an accompanying increase in the amount of impurities being left in the barrier metal layer.
  • the present invention provides a method of manufacturing a barrier metal layer including: (a) supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse having a duration lasting from a point in time A 1 to a point in time A 2 , and (b) supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time A 3 to a point in time A 4 , wherein A 3 is at least as early in time as A 1 and no later in time than A 2 .
  • point in time A 4 is no earlier than point in time A 2 .
  • points in time the pulse of the first source gas begins and ends can be the same as those at which the pulse of the second source gas begins and ends. That is, point in time A 1 can coincide with point in time A 3 , and point in time A 2 can coincide with point in time A 4 .
  • a purge gas can be used to discharge by-products of the reaction between the first and second source gases.
  • the purge gas is supplied onto the entire surface of the semiconductor substrate beginning at a point in time that is earlier than or that coincides with point in time A 1 .
  • the purge gas can be supplied onto the entire surface of the semiconductor substrate beginning at a point in time that is later than point in time A 1 and is no later than point in time A 3 .
  • An impurity-removing gas can be additionally used to free any impurities that have managed to become trapped within the barrier metal layer.
  • the method includes a step (c) of supplying an impurity-removing gas onto the entire surface of the semiconductor substrate for a predetermined period of time, after point in time A 4 and while the purge gas is still being supplied.
  • the gas supply scheme comprising the steps (a), (b) and (c) constitutes a cycle of operation, and the cycle can be repeated at least once to increase the thickness of the barrier metal layer a desired amount.
  • the first source gas can include a gas of the halogen element family and a refractory metallic element, and the second source gas can include nitrogen.
  • the purge gas can be an inert gas such as argon.
  • the impurity removing gas can be NH 3 .
  • the present invention provides a method of manufacturing a barrier metal layer, including: (a) supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse having a duration lasting from a point in time B 1 to a point in time B 2 , (b) supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B 3 to a point in time B 4 , whereby a barrier metal layer is formed, and (c) supplying an impurity-removing gas onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B 5 to a point in time B 6 to remove impurities from the barrier metal layer, wherein B 3 is later in time than B 2 , and B 5 is later in time than B 4 .
  • a purge gas can also be supplied onto the entire surface of the semiconductor substrate, beginning at a point in time that is earlier than or coincides with point in time B 1 , or that is later than B 1 and no later than point in time B 2 , to remove all of the first source gas that is physically adsorbed at the surface of the semiconductor substrate before the second source gas is supplied and/or to discharge by-products of the reaction between the first and second source gases.
  • FIG. 1 is a timing diagram of the gas supply scheme of a first embodiment of a method of fabricating a barrier metal layer using atomic layer deposition (ALD) according to the present invention
  • FIG. 2 is a timing diagram of an alternative gas supply scheme of the first embodiment of a method of fabricating a barrier metal layer using atomic layer deposition (ALD) according to the present invention.
  • FIG. 3 is a timing diagram of the gas supply scheme of a second embodiment of a method of fabricating a barrier metal layer using atomic layer deposition (ALD) according to the present invention.
  • ALD atomic layer deposition
  • a semiconductor substrate is loaded into a processing chamber of an ALD apparatus.
  • the semiconductor substrate may have a feature having a predetermined aspect ratio.
  • the feature may be a word line, a conductive line such as a bit line, a contact plug, a via contact, a capacitor upper electrode, or the like.
  • first and second source gases and a purge gas are supplied to the chamber according to the scheme shown in FIG. 1 to form a barrier metal layer on a prescribed feature of the semiconductor substrate.
  • the barrier metal layer is typically formed of a binary or larger compound including a refractory metal and nitrogen.
  • TiN is representative of the material of the barrier metal layer. Therefore, the first embodiment will be described in connection with the formation of a Ti-containing layer as a barrier metal layer.
  • a first source gas is pulsed onto the surface of a semiconductor substrate for a duration lasting from a point in time A 1 to a point in time A 2 .
  • the pulse of the first source gas is chemically and physically adsorbed by the entire surface of the semiconductor substrate according to the surface topology thereof.
  • some of the first source gas that has been physically adsorbed is then removed by the purge gas because the purge gas is being directed onto the entire surface of the semiconductor substrate while the first source gas is being physically adsorbed.
  • the purge gas and the source gas entrained therein are discharged to the outside of the processing chamber.
  • FIG. 1 shows that the continuous supplying of the purge gas is initiated at point in time A 1 .
  • the continuous supplying of the purge gas can be initiated before point in time A 1 , or at a point in time A 3 that is as early as point in time A 1 but no later than point in time A 2 .
  • the purge gas is an inert gas, such as argon.
  • a gas comprising a refractory metal is used as the first source gas.
  • Ti a refractory metal
  • TiCl 4 is used as the first source gas.
  • other source gases containing the barrier metal and capable of reacting with a second source gas can be used.
  • a metallo-organic gas such as tetrakis diethyl amino titanium (TDEAT) or tetrakis dimethyl amino titanium (TDMAT) can be used as the first source gas.
  • a pulse of the second source gas is directed onto the surface of the semiconductor substrate for a duration lasting from point in time A 3 to a point in time A 4 , and while the purge gas continues to be supplied onto the entire surface of the semiconductor substrate. Note, at point in time A 3 some of the first source gas is still being supplied and thus, not all of the first source gas physically adsorbed at the surface of the semiconductor substrate has been removed at this time by the purge gas.
  • a 4 is a point in time that occurs no earlier than point in time A 2 but occurs some time after point in time A 3 .
  • the points in time under which the scheme of the gas supply is established are related as follows: (A 1 ⁇ A 3 ⁇ A 2 , A 2 ⁇ A 4 , A 1 ⁇ A 2 , and A 3 ⁇ A 4 ).
  • point in time A 1 can coincide with point in time A 3
  • point in time A 2 can coincide with point in time A 4
  • the first and second source gases would be pulsed beginning at the same time and continuing for the same duration.
  • the pulsing of the second source gas is initiated before or at the same time the pulsing of the first source gas terminates.
  • the pulse of the second source gas terminates after or at the same time the pulsing of the first source gas terminates.
  • the purge gas is supplied along the entire surface of the semiconductor substrate for a duration lasting from point in time A 4 to a point in time A 5 , thereby discharging by-products of the reaction of the first and second source gases.
  • a gas including a non-metallic element (N) of the barrier metal layer (TiN) is used as the second source gas.
  • N non-metallic element
  • TiN barrier metal layer
  • NH 3 is used as the second source gas.
  • other gases which react with the first source gas and contain nitrogen, such as N 2 can be used as the second source gas.
  • the mechanism by which the barrier metal (TiN) is deposited no longer consists of ALD because the first source gas physically adsorbed at the surface of the semiconductor substrate has not been completely removed by the purge gas. Accordingly, the second source gas reacts with not only that part of the first source gas that has been chemically adsorbed at the surface of the semiconductor substrate but also that part of the first source gas that has been physically adsorbed.
  • ALD results from the reaction between that part of the first source gas chemically adsorbed at the surface of the semiconductor substrate and the second source gas
  • CVD results from the reaction between that part of the first source gas physically adsorbed and the second source gas. Consequently, the ALD that takes place provides a 100% step coverage and the CVD that takes place provides a high deposition rate.
  • impurities (Cl) are present in a barrier metal layer (TiN) when the barrier metal layer is formed by CVD.
  • impurity-containing gases HCl and TiCl x generated as by-products are discharged from the processing chamber by flushing the entire surface of the semiconductor substrate with an inert gas while the first and second source gases react with each other (A 3 -A 4 ) and for a predetermined period of time (that is, for a duration of A 4 -A 5 ) after the pulse of the second source gas terminates. Consequently, impurities (Cl) are prevented from being entrapped within the deposited material.
  • the method of the present invention can be performed at a low temperature (for example, 450 to 500° C.) without producing a high level of impurities in the barrier metal layer because the present invention also employs ALD.
  • the present invention also suppresses thermal stress and thereby decreases the thermal budget of the layer (underlayer) beneath the barrier metal layer.
  • the duration of A 1 , to A 5 is a cycle T 1 , and a barrier metal layer can be formed to a desired thickness by repeating the cycle T 1 a predetermined number of times.
  • the method can also comprise a step of pulsing an impurity-removing gas to further ensure that impurities (Cl) are prevented from being trapped within the barrier metal layer (TiN).
  • the thickness of the TiN layer formed after one cycle is established by the process recipe under which the first and second source gases, and the purge gas (and impurity-removing gas) are supplied into the processing chamber.
  • the impurity-removing gas can be supplied for a duration beginning at point in time A 6 and ending at point in time A 7 , while the purge gas is being directed onto the surface of a semiconductor substrate and after the pulse of the second source gas terminates.
  • the impurity-removing gas reacts with impurities trapped in the barrier metal layer during the reaction of the first and second source gases, and frees the impurities from the barrier metal layer.
  • the impurity-removing gas reduces the impurities to their constituent elements.
  • the impurity-removing gas can easily diffuse into the metal barrier layer and thereby react with the impurities because the thickness of the barrier metal layer formed during the time period from A 1 to A 4 is very thin (about 10 to 20 ⁇ ).
  • the technique of the present invention in which impurity-removing gas is supplied after one of a plurality of cycles can remove impurities (Cl) from the barrier metal layer using only a tiny flow of the impurity-removing gas.
  • NH 3 can be used as the impurity-removing gas.
  • the processing apparatus does not need a separate gas supply line dedicated to the impurity-removing gas because the impurity-removing gas and the second source gas are the same. Rather, another pulse of the second source gas can be supplied from the time period A 6 -A 7 (see reference character I).
  • gases other than NH 3 can be used as the impurity-removing gas. In these cases, a separate gas supply line dedicated to the impurity-removing gas is required.
  • the impurity-removing gas is NH 3
  • the impurity-removing gas diffuses into the barrier metal layer that was formed during the time period of from A 1 to A 4 and reacts with impurities (Cl) within the layer according to the following chemical equation, and frees the impurities (Cl) from the barrier metal layer in the form of gas (HCl).
  • the second embodiment of the present invention can also reduce the amount of impurities remaining in a barrier metal layer to a greater extent than the conventional ALD method without seriously compromising the deposition rate.
  • the second embodiment will also be described as applied to the forming of a TiN barrier metal layer.
  • a semiconductor substrate is loaded into a processing chamber of an ALD apparatus.
  • a first source gas is supplied in the form of a pulse, beginning at a point in time B 1 and terminating at a point in time B 2 , while a purge gas is being continuously supplied onto the entire surface of the semiconductor substrate.
  • the first source gas is chemically and physically adsorbed at the surface of the semiconductor substrate according to the topology of the surface.
  • FIG. 3 shows that the flow of purge gas is initiated at the point in time B 1 .
  • the flow of the purge gas can be initiated prior to the point in time B 1 , or from any point in time as early as B 1 and no later than B 2 .
  • the physically-adsorbed part of the first source gas is removed by the purge gas from the point in time B 2 to a point in time B 3 .
  • the second source gas is supplied in the form of a pulse beginning from the point in time B 3 and terminating at the point in time B 4 while the purge gas continuous to be supplied onto the entire surface of the semiconductor substrate.
  • the purge gas is supplied, whereby by-products generated by the reaction of the first and second source gases are discharged from the chamber.
  • the impurity-removing gas is supplied in the form of a pulse beginning from the point in time B 5 and terminating at a point in time B 6 while the purge gas continuous to be supplied onto the entire surface of the semiconductor substrate.
  • the first and second source gases and the impurity-removing gas can be the same as those used in the first embodiment.
  • the impurity-removing gas and the second source gas can be of the same type, whereby the processing apparatus does not require a separate gas supply line dedicated to the impurity-removing gas. That is, another pulse of the second source gas can be supplied during the time period of B 5 -B 6 (see reference character II).
  • a separate gas supply line dedicated to the impurity-removing gas is required.
  • impurities formed during the period of time from B 1 to B 4 are removed from the barrier metal layer by the impurity-removing gas. Thereafter, from the point in time B 6 to a point in time B 7 , the purge gas discharges by-products of the reaction between the impurity-removing gas and the impurities.
  • the time period of B 1 to B 7 represents a cycle T 2 , and the barrier metal layer can be formed to a desired thickness by repeating the cycle T 2 .
  • the impurity-removing gas is supplied after the supply of the second source gas is terminated, so that fewer impurities remain within the barrier metal layer than when the prior art method is used.
  • the deposition rate of the barrier metal in ALD can be typically controlled by adjusting the process recipe under which the first and second source gases are supplied. That is, the deposition rate of the barrier metal can be increased by controlling the supply of the first and second source gases.
  • increasing the deposition rate of the barrier metal in this way is normally accompanied by a corresponding increase in the amount of impurities within the barrier metal layer. That is, there is a limit to ALD in changing the process recipe to increase the deposition rate of the barrier metal.
  • the use of the impurity-removing gas allows the process recipe under which the first and second source gases are supplied to be adjusted for increasing the deposition rate of the barrier metal without giving rise to a corresponding increase in the amount of impurities remaining within the barrier metal layer.
  • the second embodiment provides a significant degree of freedom in adjusting the process recipe under which the first and second source gases are supplied.
  • first and second embodiments of the present invention are applied to the manufacture of a binary barrier metal layer (TiN) will now be described in detail.
  • the present invention is not limited to the manufacture of a TiN binary metal layer. Rather, the present invention is also applicable to the manufacture of other binary barrier metal layers such as a TaN layer, a WN layer, an AlN layer, a CrN layer and a BN layer.
  • the type of first and second source gases and impurity-removing gas to be used when manufacturing barrier metal layers other than the TiN barrier layer will be readily apparent to those of ordinary skill in the art.
  • the barrier metal layer is formed of AlN
  • an AlClx gas can be used as the first source gas
  • NH 3 can be used as the second source gas and as the impurity-removing gas.
  • the present invention is not applicable only to the manufacture of binary barrier metal layers, but can also be applied to the manufacture of barrier metal layers formed of larger compounds.
  • the present invention can also be applied to the manufacture of a TiBN layer, a TaBN layer, a TiAlN layer, a TaAlN layer, a TiSiN layer, a TaSiN layer, a TiCN layer, a WBN layer, and the like.
  • a first source gas for example, TiCl 4
  • a second source gas for example, trimethyl aluminum (TMA)
  • a third source gas for example, NH 3
  • the duration of the pulse of the first source gas is from a point in time C 1 to a point in time C 2
  • the duration of the pulse of the second source gas is from a point in time C 3 to a point in time C 4
  • the duration of the pulse of the third source gas is from a point in time C 5 to a point in time C 6 .
  • the purge gas is directed onto the entire surface of the semiconductor substrate for a predetermined period of time, thereby completing the cycle.
  • the cycle is repeated a predetermined number of times to form a barrier metal layer (TiAlN) having a desired thickness.
  • the barrier metal layer of TiAlN can also be formed using the second embodiment of the present invention, under the schemes set forth above.
  • the deposition mechanism includes CVD along with ALD.
  • the second embodiment will also exhibit a higher deposition rate than the prior art.
  • the purge gas is continuously supplied onto the entire surface of the semiconductor substrate while the source gases are being supplied.
  • the amount of impurities remaining within the barrier metal layer are minimal even though the process is carried at a temperature as low as that used to carry out the conventional ALD process.
  • an impurity-removing gas can be supplied in the form of a pulse after the first through third source gases are suppled, as in the first embodiment, thereby reducing the amount of impurities within the barrier metal layer.
  • the barrier metal layer is formed by ALD and CVD, so that the deposition rate of the barrier metal is greater than if the barrier metal layer were formed only through ALD. Also, a purge gas is continuously supplied onto the entire surface of the semiconductor substrate during the manufacture of the barrier metal layer, so that the amount of impurities remaining within the barrier metal layer is minimized despite the fact that the method is carried out at a low temperature suitable for ALD.
  • the barrier metal layer is formed only through ALD.
  • an impurity-removing gas is supplied during the process to free impurities that have been trapped in the barrier metal layer. Therefore, the process recipe for the source gases has a high degree of freedom, can be changed to a great extent to increase the deposition rate of the barrier metal. Therefore, even though the barrier metal layer is formed only through ALD, the barrier metal can be deposited at higher and higher rates without corresponding increases in the impurity content of the barrier metal layer.

Abstract

A method of manufacturing a barrier metal layer uses atomic layer deposition (ALD) as the mechanism for depositing the barrier metal. The method includes supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse, and supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse. In a first embodiment, the pulses overlap in time so that the second source gas reacts with part of the first source gas physically adsorbed at the surface of the semiconductor substrate to thereby form part of the barrier metal layer by chemical vapor deposition whereas another part of the second source gas reacts with the first source gas chemically adsorbed at the surface of the semiconductor substrate to thereby form part of the barrier metal layer by atomic layer deposition. Thus, the deposition rate is greater than if the barrier metal layer were only formed by ALD. In the second embodiment, an impurity-removing gas is used to remove impurities in the barrier metal layer. Thus, even if the gas supply scheme is set up to only use ALD in creating the barrier metal layer, the deposition rate can be increased without the usual accompanying increase in the impurity content of the barrier metal layer.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to a method of manufacturing semiconductor devices. More particularly, the present invention relates to a method of manufacturing a barrier metal layer using atomic layer deposition. [0002]
  • 2. Description of the Related Art [0003]
  • In the manufacture of semiconductor devices, a barrier metal layer (for example, a TiN layer, a TaN layer, a WN layer) may be formed between adjacent material layers in order to prevent mutual diffusion or a chemical reaction from occurring between the adjacent material layers. For example, in the manufacture of a semiconductor memory device having a capacitor over bit-line (COB) structure, barrier metal layers are typically interposed between a lower electrode of a capacitor and a contact plug, between a dielectric layer of a capacitor and an upper electrode of the capacitor, between a conductive line and an insulating layer, and between a via contact and an insulating layer. [0004]
  • However, as the integration density of semiconductor devices increases, the topography of the surface on which a barrier metal layer is to be deposited becomes more rugged. When a barrier metal layer is formed on a rugged surface by a physical deposition process such as sputtering, the step coverage of the barrier metal layer is poor. Accordingly, a process providing excellent step coverage must be used to form a barrier metal layer on a deposition surface having a rugged topography. To this end, chemical vapor deposition (CVD) has been proposed. Hereinafter, a barrier metal layer formed by CVD will be referred to as a CVD barrier metal layer. [0005]
  • In the process of manufacturing a CVD barrier metal layer, a precursor including a halogen, such as Cl, is used as a typical metal source gas. The manufacturing process of a CVD barrier metal layer has an advantage in that the barrier metal is deposited rapidly, and a drawback in that the halogen of the precursor fails to fall out of the barrier metal layer and remains as an impurity within the barrier metal layer. The halogen remaining within the barrier metal layer as described above may cause an adjacent material layer (for example, an aluminum conductive line) to erode, and may increase the resistivity of the barrier metal layer. Thus, the amount of halogen remaining within the barrier metal layer must be reduced so as to decrease the resistivity of the barrier metal layer. In order to achieve this, the CVD barrier metal layer manufacturing process must be performed at a high temperature. [0006]
  • For example, in a CVD barrier metal layer manufacturing process using TiCl[0007] 4 as a metal source gas, a deposition temperature of at least 675° C. is required to obtain a resistivity of 200 μΩ-cm or less. However, when a barrier metal layer is fabricated at a deposition temperature of 600° C. or greater, the thermal budget of an underlayer formed below the barrier metal layer is quite high, and secondary problems such as the generation of thermal stress are created. For instance, a CVD barrier metal layer must be formed over an Si contact or a via contact at a deposition temperature of 500° C. or less if the Si contact or via contact are not to be unduly thermally stressed. That is, the CVD barrier metal layer manufacturing process must be performed at a low temperature. A method of adding methylhydrazine (MH) to a metal source gas TiCl4 can be used to facilitate the deposition of the barrier metal at a low temperature. However, this technique has a drawback in that the step coverage of the barrier metal layer is compromised.
  • The above-described problem of thermal stress, prevailing in the method of forming a CVD barrier metal layer manufacturing using a metal source gas such as TiCl[0008] 4 as a precursor, can be overcome by using an organometallic precursor such as tetrakis diethylamino Ti (TDEAT) or tetrakis dimethylamino Ti (TDMAT). That is, this so-called MOCVD barrier metal layer manufacturing process can be performed at a low temperature compared to the CVD barrier metal layer manufacturing process. However, a MOCVD barrier metal layer includes a large quantity of carbon impurities and therefore, exhibits a high resistivity. Also, the MOCVD barrier metal layer has worse step coverage than a barrier metal layer that is formed using a metal source gas such as TiCl4 as a precursor.
  • Alternatively, the problems in the CVD barrier metal layer manufacturing process posed by using a metal source gas such as TiCL[0009] 4 as a precursor can be overcome by a technique of flushing the entire surface of a semiconductor substrate with an impurity-removing gas after the barrier metal layer is formed. However, the rate at which the impurity-removing gas must flow to flush the surface of the semiconductor substrate is several tens to several hundreds of times greater than that at which the reaction gas flows into the reaction chamber. Accordingly, this technique requires controlling the process conditions prevailing in the reaction chamber, such as the pressure of the chamber and the like. Effecting such a control takes time and thus, increases the total time of the manufacturing process.
  • Also, a method of forming a barrier metal layer using an atomic layer deposition (ALD) process has been used in an attempt to overcome the problems posed by the use of Cl in the CVD barrier metal layer manufacturing process. The conventional barrier metal layer forming method using ALD has an advantage in that it can be performed at a low temperature while minimizing the content of Cl in the barrier metal layer. However, the mechanism by which the barrier metal is deposited in ALD is chemical adsorption. Therefore, the conventional barrier metal layer forming method using ALD has a drawback in that the deposition rate is too slow for use in manufacturing semiconductor devices. As a comparison, the deposition rate of a typical CVD process used to form a TiN layer is approximately several hundreds of Å/min. On the other hand, the deposition rate at which a TiN layer can be formed using the conventional ALD process is less than 100 Å/min, which is very slow compared to when the CVD process is used. [0010]
  • SUMMARY OF THE INVENTION
  • A first object of the present invention is to provide a method of manufacturing a barrier metal layer that makes use of atomic layer deposition (ALD) but in which the deposition rate is not too slow. [0011]
  • A second object of the present invention is to provide a method of manufacturing a barrier metal layer using ALD, and by which the deposition rate at which the ALD occurs can be increased without an accompanying increase in the amount of impurities being left in the barrier metal layer. [0012]
  • To achieve the first above object, the present invention provides a method of manufacturing a barrier metal layer including: (a) supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse having a duration lasting from a point in time A[0013] 1 to a point in time A2, and (b) supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time A3 to a point in time A4, wherein A3 is at least as early in time as A1 and no later in time than A2. Preferably, point in time A4 is no earlier than point in time A2. Moreover, the points in time the pulse of the first source gas begins and ends can be the same as those at which the pulse of the second source gas begins and ends. That is, point in time A1 can coincide with point in time A3, and point in time A2 can coincide with point in time A4.
  • A purge gas can be used to discharge by-products of the reaction between the first and second source gases. The purge gas is supplied onto the entire surface of the semiconductor substrate beginning at a point in time that is earlier than or that coincides with point in time A[0014] 1. Alternatively, the purge gas can be supplied onto the entire surface of the semiconductor substrate beginning at a point in time that is later than point in time A1 and is no later than point in time A3.
  • An impurity-removing gas can be additionally used to free any impurities that have managed to become trapped within the barrier metal layer. In this case, the method includes a step (c) of supplying an impurity-removing gas onto the entire surface of the semiconductor substrate for a predetermined period of time, after point in time A[0015] 4 and while the purge gas is still being supplied.
  • The gas supply scheme comprising the steps (a), (b) and (c) constitutes a cycle of operation, and the cycle can be repeated at least once to increase the thickness of the barrier metal layer a desired amount. [0016]
  • The first source gas can include a gas of the halogen element family and a refractory metallic element, and the second source gas can include nitrogen. The purge gas can be an inert gas such as argon. The impurity removing gas can be NH[0017] 3.
  • To achieve the second object, the present invention provides a method of manufacturing a barrier metal layer, including: (a) supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse having a duration lasting from a point in time B[0018] 1 to a point in time B2, (b) supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B3 to a point in time B4, whereby a barrier metal layer is formed, and (c) supplying an impurity-removing gas onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B5 to a point in time B6 to remove impurities from the barrier metal layer, wherein B3 is later in time than B2, and B5 is later in time than B4.
  • A purge gas can also be supplied onto the entire surface of the semiconductor substrate, beginning at a point in time that is earlier than or coincides with point in time B[0019] 1, or that is later than B1 and no later than point in time B2, to remove all of the first source gas that is physically adsorbed at the surface of the semiconductor substrate before the second source gas is supplied and/or to discharge by-products of the reaction between the first and second source gases.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments thereof made with reference to the attached drawings, of which: [0020]
  • FIG. 1 is a timing diagram of the gas supply scheme of a first embodiment of a method of fabricating a barrier metal layer using atomic layer deposition (ALD) according to the present invention; [0021]
  • FIG. 2 is a timing diagram of an alternative gas supply scheme of the first embodiment of a method of fabricating a barrier metal layer using atomic layer deposition (ALD) according to the present invention; and [0022]
  • FIG. 3 is a timing diagram of the gas supply scheme of a second embodiment of a method of fabricating a barrier metal layer using atomic layer deposition (ALD) according to the present invention.[0023]
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • The preferred embodiments of the present invention will now be described in detail with reference to the attached drawings. [0024]
  • <First Embodiment>[0025]
  • In the first embodiment of a method of fabricating a barrier metal layer according to the present invention, first, a semiconductor substrate is loaded into a processing chamber of an ALD apparatus. The semiconductor substrate may have a feature having a predetermined aspect ratio. The feature may be a word line, a conductive line such as a bit line, a contact plug, a via contact, a capacitor upper electrode, or the like. After the semiconductor substrate is loaded into the processing chamber, first and second source gases and a purge gas are supplied to the chamber according to the scheme shown in FIG. 1 to form a barrier metal layer on a prescribed feature of the semiconductor substrate. [0026]
  • The barrier metal layer is typically formed of a binary or larger compound including a refractory metal and nitrogen. TiN is representative of the material of the barrier metal layer. Therefore, the first embodiment will be described in connection with the formation of a Ti-containing layer as a barrier metal layer. [0027]
  • Referring now to FIG. 1, while a purge gas is continuously directed onto the entire surface of the semiconductor substrate, a first source gas is pulsed onto the surface of a semiconductor substrate for a duration lasting from a point in time A[0028] 1 to a point in time A2. The pulse of the first source gas is chemically and physically adsorbed by the entire surface of the semiconductor substrate according to the surface topology thereof. However, some of the first source gas that has been physically adsorbed is then removed by the purge gas because the purge gas is being directed onto the entire surface of the semiconductor substrate while the first source gas is being physically adsorbed. The purge gas and the source gas entrained therein are discharged to the outside of the processing chamber.
  • Note, FIG. 1 shows that the continuous supplying of the purge gas is initiated at point in time A[0029] 1. However, the continuous supplying of the purge gas can be initiated before point in time A1, or at a point in time A3 that is as early as point in time A1 but no later than point in time A2. Also, the purge gas is an inert gas, such as argon.
  • On the other hand, a gas comprising a refractory metal (in this case, Ti) is used as the first source gas. For example, TiCl[0030] 4 is used as the first source gas. However, other source gases containing the barrier metal and capable of reacting with a second source gas can be used. For instance, considering the present example of a Ti-containing barrier metal layer, a metallo-organic gas such as tetrakis diethyl amino titanium (TDEAT) or tetrakis dimethyl amino titanium (TDMAT) can be used as the first source gas.
  • Next, a pulse of the second source gas is directed onto the surface of the semiconductor substrate for a duration lasting from point in time A[0031] 3 to a point in time A4, and while the purge gas continues to be supplied onto the entire surface of the semiconductor substrate. Note, at point in time A3 some of the first source gas is still being supplied and thus, not all of the first source gas physically adsorbed at the surface of the semiconductor substrate has been removed at this time by the purge gas. A4 is a point in time that occurs no earlier than point in time A2 but occurs some time after point in time A3. Thus, the points in time under which the scheme of the gas supply is established are related as follows: (A1≦A3≦A2, A2≦A4, A1≠A2, and A3≠A4). Under this scheme, point in time A1 can coincide with point in time A3, and point in time A2 can coincide with point in time A4, in which case the first and second source gases would be pulsed beginning at the same time and continuing for the same duration.
  • In any case, the pulsing of the second source gas is initiated before or at the same time the pulsing of the first source gas terminates. The pulse of the second source gas terminates after or at the same time the pulsing of the first source gas terminates. After the pulse of the second source gas terminates, only the purge gas is supplied along the entire surface of the semiconductor substrate for a duration lasting from point in time A[0032] 4 to a point in time A5, thereby discharging by-products of the reaction of the first and second source gases.
  • A gas including a non-metallic element (N) of the barrier metal layer (TiN) is used as the second source gas. For example, NH[0033] 3 is used as the second source gas. However, other gases which react with the first source gas and contain nitrogen, such as N2, can be used as the second source gas.
  • Now, in ALD, that part of the first source gas that has been chemically adsorbed reacts with the second source gas. However, from point in time A[0034] 3 to point in time A4, i.e. the duration of the pulse of the second source gas, the mechanism by which the barrier metal (TiN) is deposited no longer consists of ALD because the first source gas physically adsorbed at the surface of the semiconductor substrate has not been completely removed by the purge gas. Accordingly, the second source gas reacts with not only that part of the first source gas that has been chemically adsorbed at the surface of the semiconductor substrate but also that part of the first source gas that has been physically adsorbed. Thus, although ALD results from the reaction between that part of the first source gas chemically adsorbed at the surface of the semiconductor substrate and the second source gas, CVD results from the reaction between that part of the first source gas physically adsorbed and the second source gas. Consequently, the ALD that takes place provides a 100% step coverage and the CVD that takes place provides a high deposition rate.
  • Moreover, as was described above, a large amount of impurities (Cl) are present in a barrier metal layer (TiN) when the barrier metal layer is formed by CVD. However, in the present invention, impurity-containing gases HCl and TiCl[0035] x generated as by-products are discharged from the processing chamber by flushing the entire surface of the semiconductor substrate with an inert gas while the first and second source gases react with each other (A3-A4) and for a predetermined period of time (that is, for a duration of A4-A5) after the pulse of the second source gas terminates. Consequently, impurities (Cl) are prevented from being entrapped within the deposited material. That is, even though the present invention employs the deposition mechanism of CVD, namely a process in which a high temperature is required to suppress the level of impurities in the barrier metal layer, the method of the present invention can be performed at a low temperature (for example, 450 to 500° C.) without producing a high level of impurities in the barrier metal layer because the present invention also employs ALD. Thus, the present invention also suppresses thermal stress and thereby decreases the thermal budget of the layer (underlayer) beneath the barrier metal layer.
  • In the first embodiment, the duration of A[0036] 1, to A5 is a cycle T1, and a barrier metal layer can be formed to a desired thickness by repeating the cycle T1 a predetermined number of times. Also, the method can also comprise a step of pulsing an impurity-removing gas to further ensure that impurities (Cl) are prevented from being trapped within the barrier metal layer (TiN). The thickness of the TiN layer formed after one cycle is established by the process recipe under which the first and second source gases, and the purge gas (and impurity-removing gas) are supplied into the processing chamber.
  • As shown in FIG. 2, the impurity-removing gas can be supplied for a duration beginning at point in time A[0037] 6 and ending at point in time A7, while the purge gas is being directed onto the surface of a semiconductor substrate and after the pulse of the second source gas terminates. The impurity-removing gas reacts with impurities trapped in the barrier metal layer during the reaction of the first and second source gases, and frees the impurities from the barrier metal layer. For example, the impurity-removing gas reduces the impurities to their constituent elements. Also, the impurity-removing gas can easily diffuse into the metal barrier layer and thereby react with the impurities because the thickness of the barrier metal layer formed during the time period from A1 to A4 is very thin (about 10 to 20 Å). Accordingly, in contrast with the conventional technique of flushing the barrier metal layer with an impurity-removing gas after the barrier metal layer has been completed, the technique of the present invention in which impurity-removing gas is supplied after one of a plurality of cycles can remove impurities (Cl) from the barrier metal layer using only a tiny flow of the impurity-removing gas.
  • NH[0038] 3 can be used as the impurity-removing gas. In this case, the processing apparatus does not need a separate gas supply line dedicated to the impurity-removing gas because the impurity-removing gas and the second source gas are the same. Rather, another pulse of the second source gas can be supplied from the time period A6-A7 (see reference character I). On the other hand, gases other than NH3 can be used as the impurity-removing gas. In these cases, a separate gas supply line dedicated to the impurity-removing gas is required.
  • When the impurity-removing gas is NH[0039] 3, the impurity-removing gas diffuses into the barrier metal layer that was formed during the time period of from A1 to A4 and reacts with impurities (Cl) within the layer according to the following chemical equation, and frees the impurities (Cl) from the barrier metal layer in the form of gas (HCl).
  • [Chemical equation][0040]
  • TiNxCly(S)+NH3(g)→TiN(s)+HCl(g)
  • <Second Embodiment>[0041]
  • Next, a second embodiment of a method of forming a barrier metal layer will be described. Like the first embodiment, the second embodiment of the present invention can also reduce the amount of impurities remaining in a barrier metal layer to a greater extent than the conventional ALD method without seriously compromising the deposition rate. For the sake of convenience, the second embodiment will also be described as applied to the forming of a TiN barrier metal layer. [0042]
  • Referring to FIG. 3, in the second embodiment of the present invention, first, a semiconductor substrate is loaded into a processing chamber of an ALD apparatus. Next, a first source gas is supplied in the form of a pulse, beginning at a point in time B[0043] 1 and terminating at a point in time B2, while a purge gas is being continuously supplied onto the entire surface of the semiconductor substrate. The first source gas is chemically and physically adsorbed at the surface of the semiconductor substrate according to the topology of the surface.
  • FIG. 3 shows that the flow of purge gas is initiated at the point in time B[0044] 1. However, the flow of the purge gas can be initiated prior to the point in time B1, or from any point in time as early as B1 and no later than B2. Then, the physically-adsorbed part of the first source gas is removed by the purge gas from the point in time B2 to a point in time B3. Thereafter, the second source gas is supplied in the form of a pulse beginning from the point in time B3 and terminating at the point in time B4 while the purge gas continuous to be supplied onto the entire surface of the semiconductor substrate. Then, from the point in time B4 to a point in time B5 only the purge gas is supplied, whereby by-products generated by the reaction of the first and second source gases are discharged from the chamber. Then, the impurity-removing gas is supplied in the form of a pulse beginning from the point in time B5 and terminating at a point in time B6 while the purge gas continuous to be supplied onto the entire surface of the semiconductor substrate. Note, the first and second source gases and the impurity-removing gas can be the same as those used in the first embodiment.
  • Also, similar to the first embodiment, the impurity-removing gas and the second source gas can be of the same type, whereby the processing apparatus does not require a separate gas supply line dedicated to the impurity-removing gas. That is, another pulse of the second source gas can be supplied during the time period of B[0045] 5-B6 (see reference character II). On the other hand, when gases other than NH3 are used as the impurity-removing gas, a separate gas supply line dedicated to the impurity-removing gas is required.
  • In this embodiment, impurities formed during the period of time from B[0046] 1 to B4 are removed from the barrier metal layer by the impurity-removing gas. Thereafter, from the point in time B6 to a point in time B7, the purge gas discharges by-products of the reaction between the impurity-removing gas and the impurities.
  • The time period of B[0047] 1 to B7 represents a cycle T2, and the barrier metal layer can be formed to a desired thickness by repeating the cycle T2. In the second embodiment, the impurity-removing gas is supplied after the supply of the second source gas is terminated, so that fewer impurities remain within the barrier metal layer than when the prior art method is used.
  • Consideration of the content of impurities within the barrier metal layer aside, the deposition rate of the barrier metal in ALD can be typically controlled by adjusting the process recipe under which the first and second source gases are supplied. That is, the deposition rate of the barrier metal can be increased by controlling the supply of the first and second source gases. However, increasing the deposition rate of the barrier metal in this way is normally accompanied by a corresponding increase in the amount of impurities within the barrier metal layer. That is, there is a limit to ALD in changing the process recipe to increase the deposition rate of the barrier metal. However, in the second embodiment of the present invention, the use of the impurity-removing gas allows the process recipe under which the first and second source gases are supplied to be adjusted for increasing the deposition rate of the barrier metal without giving rise to a corresponding increase in the amount of impurities remaining within the barrier metal layer. In other words, the second embodiment provides a significant degree of freedom in adjusting the process recipe under which the first and second source gases are supplied. [0048]
  • A case in which the first and second embodiments of the present invention are applied to the manufacture of a binary barrier metal layer (TiN) will now be described in detail. However, the present invention is not limited to the manufacture of a TiN binary metal layer. Rather, the present invention is also applicable to the manufacture of other binary barrier metal layers such as a TaN layer, a WN layer, an AlN layer, a CrN layer and a BN layer. The type of first and second source gases and impurity-removing gas to be used when manufacturing barrier metal layers other than the TiN barrier layer will be readily apparent to those of ordinary skill in the art. [0049]
  • For example, when the barrier metal layer is formed of AlN, an AlClx gas can be used as the first source gas, and NH[0050] 3 can be used as the second source gas and as the impurity-removing gas.
  • Also, the present invention is not applicable only to the manufacture of binary barrier metal layers, but can also be applied to the manufacture of barrier metal layers formed of larger compounds. For example, the present invention can also be applied to the manufacture of a TiBN layer, a TaBN layer, a TiAlN layer, a TaAlN layer, a TiSiN layer, a TaSiN layer, a TiCN layer, a WBN layer, and the like. [0051]
  • For example, when the barrier metal layer is formed of TiAlN using the first embodiment of the present invention, a first source gas (for example, TiCl[0052] 4), a second source gas (for example, trimethyl aluminum (TMA)) and a third source gas (for example, NH3) can be supplied according to the following schemes. Note, in these schemes, the duration of the pulse of the first source gas is from a point in time C1 to a point in time C2, the duration of the pulse of the second source gas is from a point in time C3 to a point in time C4, and the duration of the pulse of the third source gas is from a point in time C5 to a point in time C6.
  • [first scheme][0053]
  • C1≦C3≦C2 and C1≦C5≦C2
  • [second scheme][0054]
  • C1≦C3≦C2 and C3≦C5≦C4
  • After the first through third source gases are supplied according to any one of the above schemes, the purge gas is directed onto the entire surface of the semiconductor substrate for a predetermined period of time, thereby completing the cycle. The cycle is repeated a predetermined number of times to form a barrier metal layer (TiAlN) having a desired thickness. [0055]
  • The barrier metal layer of TiAlN can also be formed using the second embodiment of the present invention, under the schemes set forth above. In this case, the deposition mechanism includes CVD along with ALD. Thus, the second embodiment will also exhibit a higher deposition rate than the prior art. Also, the purge gas is continuously supplied onto the entire surface of the semiconductor substrate while the source gases are being supplied. Thus, the amount of impurities remaining within the barrier metal layer are minimal even though the process is carried at a temperature as low as that used to carry out the conventional ALD process. Furthermore, in the second embodiment, an impurity-removing gas can be supplied in the form of a pulse after the first through third source gases are suppled, as in the first embodiment, thereby reducing the amount of impurities within the barrier metal layer. [0056]
  • According to one aspect of the present invention, the barrier metal layer is formed by ALD and CVD, so that the deposition rate of the barrier metal is greater than if the barrier metal layer were formed only through ALD. Also, a purge gas is continuously supplied onto the entire surface of the semiconductor substrate during the manufacture of the barrier metal layer, so that the amount of impurities remaining within the barrier metal layer is minimized despite the fact that the method is carried out at a low temperature suitable for ALD. [0057]
  • According to another aspect of the present invention, the barrier metal layer is formed only through ALD. However, an impurity-removing gas is supplied during the process to free impurities that have been trapped in the barrier metal layer. Therefore, the process recipe for the source gases has a high degree of freedom, can be changed to a great extent to increase the deposition rate of the barrier metal. Therefore, even though the barrier metal layer is formed only through ALD, the barrier metal can be deposited at higher and higher rates without corresponding increases in the impurity content of the barrier metal layer. [0058]
  • Although the present invention has been described with reference to the preferred embodiments thereof, various modifications thereof will be apparent to those of ordinary skill in the art. All such modifications are seen to be within the true spirit and scope of the invention as defined by the appended claims. [0059]

Claims (17)

What is claimed is:
1. A method of manufacturing a barrier metal layer, comprising the steps of:
loading a semiconductor substrate into a processing chamber;
supplying a first source gas, containing a metal, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time A1 to a point in time A2, whereby the first source gas is chemically and physically adsorbed at the surface; and
supplying a second source gas, that is reactive with the first source gas to form the barrier metal, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time A3 to a point in time A4, wherein said point in time A3 is no earlier than said point in time A1 and no later than said point in time A2, whereby one portion of the second source gas reacts with that part of the first source gas physically adsorbed at the surface of the semiconductor substrate to thereby form the barrier metal layer by chemical vapor deposition whereas another part of the second source gas reacts with that part of the first source gas chemically adsorbed at the surface of the semiconductor substrate to thereby form the barrier metal layer by atomic layer deposition.
2. The method of claim 1, wherein said point in time A4 is no later in time than said point in time A2.
3. The method of claim 1, and further comprising supplying a purge gas onto the entire surface of the semiconductor substrate beginning at a point in time that is no later than said point in time A1.
4. The method of claim 1, and further comprising supplying a purge gas onto the entire surface of the semiconductor substrate beginning at a point in time that is later than said point in time A1 and no later than said point in time A3.
5. The method of claim 1, wherein the first source gas includes an element of the halogen family and a refractory metal, and the second source gas includes nitrogen.
6. The method of claim 1, and further comprising supplying a purge gas onto the entire surface of the semiconductor substrate for a predetermined period of time after said point in time A4 to discharge by-products of the reaction between the first and second source gases.
7. The method of claim 6, wherein said steps of supplying the first source gas in the form of a pulse, supplying the second source gas in the form of a pulse, and supplying the purge gas for a predetermined period of time are repeated at least once to increase the thickness of the barrier metal layer.
8. The method of claim 1, wherein the reaction of the first and second source gases produces an impurity trapped in the barrier metal layer, and further comprising supplying a purge gas onto the entire surface of the semiconductor substrate, and supplying an impurity-removing gas, capable of reacting with the impurity, onto the entire surface of the semiconductor substrate for a predetermined period of time beginning after point in time A4 and while the purge gas is being supplied, in order to remove impurities from the barrier metal layer.
9. The method of claim 8, wherein the impurity removing-gas is NH3.
10. The method of claim 8, wherein said steps of supplying the first source gas in the form of a pulse, supplying the second source gas in the form of a pulse, and supplying the impurity-removing gas are repeated at least once to increase the thickness of the barrier metal layer.
11. The method of claim 11, wherein said point in time A1 coincides with said point in time A3, and said point in time A2 coincides with said point in time A4.
12. A method of manufacturing a barrier metal layer, comprising the steps of:
loading a semiconductor substrate into a processing chamber;
supplying a first source gas, containing a metal, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B1 to a point in time B2, whereby the first source gas is chemically and physically adsorbed at the surface;
supplying a second source gas, that is reactive with the first source gas to form the barrier metal, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B3 to a point in time B4, whereby part of the second source gas reacts with that part of the first source gas chemically adsorbed at the surface of the semiconductor substrate to thereby form the barrier metal layer by atomic layer deposition; and
supplying an impurity-removing gas onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time B5 that is later than said point in time B4, to a point in time B6 to thereby remove impurities from the barrier metal layer.
13. The method of claim 12, wherein said point in time B3 is later in time than said point in time B2, and further comprising supplying a purge gas onto the entire surface of the semiconductor substrate beginning at a point in time that is no later than said point in time B1 to purge the substrate of the first source gas physically adsorbed at the surface thereof before the second source gas is supplied.
14. The method of claim 12, wherein said point in time B3 is later in time than said point in time B2, and further comprising supplying a purge gas onto the entire surface of the semiconductor substrate beginning at a point in time that is later than said point in time B1 and is no later than aid point in time B2 to purge the substrate of the first source gas physically adsorbed at the surface thereof before the second source gas is supplied.
15. The method of claim 12, wherein the first source gas includes an element of the halogen family and a refractory metal, and the second source gas includes nitrogen.
16. The method of claim 12, wherein said steps of supplying the first source gas in the form of a pulse, supplying the second source gas in the form of a pulse, and supplying the impurity-removing gas in the form of a pulse are repeated at least once to increase the thickness of the barrier metal layer.
17. The method of claim 12, wherein the impurity-removing gas is NH3.
US10/084,193 2000-04-20 2002-02-28 Method of manufacturing a barrier metal layer using atomic layer deposition Abandoned US20020081844A1 (en)

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Cited By (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020036780A1 (en) * 2000-09-27 2002-03-28 Hiroaki Nakamura Image processing apparatus
US20030013300A1 (en) * 2001-07-16 2003-01-16 Applied Materials, Inc. Method and apparatus for depositing tungsten after surface treatment to improve film characteristics
US20030082301A1 (en) * 2001-10-26 2003-05-01 Applied Materials, Inc. Enhanced copper growth with ultrathin barrier layer for high performance interconnects
US20030108674A1 (en) * 2001-12-07 2003-06-12 Applied Materials, Inc. Cyclical deposition of refractory metal silicon nitride
US20030106490A1 (en) * 2001-12-06 2003-06-12 Applied Materials, Inc. Apparatus and method for fast-cycle atomic layer deposition
US20030172872A1 (en) * 2002-01-25 2003-09-18 Applied Materials, Inc. Apparatus for cyclical deposition of thin films
US20030190497A1 (en) * 2002-04-08 2003-10-09 Applied Materials, Inc. Cyclical deposition of a variable content titanium silicon nitride layer
US20030232501A1 (en) * 2002-06-14 2003-12-18 Kher Shreyas S. Surface pre-treatment for enhancement of nucleation of high dielectric constant materials
US20030232511A1 (en) * 2002-06-14 2003-12-18 Applied Materials, Inc. ALD metal oxide deposition process using direct oxidation
US20030232506A1 (en) * 2002-06-14 2003-12-18 Applied Materials, Inc. System and method for forming a gate dielectric
US20030235961A1 (en) * 2002-04-17 2003-12-25 Applied Materials, Inc. Cyclical sequential deposition of multicomponent films
US20040018304A1 (en) * 2002-07-10 2004-01-29 Applied Materials, Inc. Method of film deposition using activated precursor gases
US20040071897A1 (en) * 2002-10-11 2004-04-15 Applied Materials, Inc. Activated species generator for rapid cycle deposition processes
US20040077183A1 (en) * 2002-06-04 2004-04-22 Hua Chung Titanium tantalum nitride silicide layer
US20040187304A1 (en) * 2003-01-07 2004-09-30 Applied Materials, Inc. Enhancement of Cu line reliability using thin ALD TaN film to cap the Cu line
US20040197492A1 (en) * 2001-05-07 2004-10-07 Applied Materials, Inc. CVD TiSiN barrier for copper integration
US20040198069A1 (en) * 2003-04-04 2004-10-07 Applied Materials, Inc. Method for hafnium nitride deposition
US6821563B2 (en) 2002-10-02 2004-11-23 Applied Materials, Inc. Gas distribution system for cyclical layer deposition
US6831004B2 (en) 2000-06-27 2004-12-14 Applied Materials, Inc. Formation of boride barrier layers using chemisorption techniques
US20040256351A1 (en) * 2003-01-07 2004-12-23 Hua Chung Integration of ALD/CVD barriers with porous low k materials
US20050009325A1 (en) * 2003-06-18 2005-01-13 Hua Chung Atomic layer deposition of barrier materials
US20050008779A1 (en) * 2002-04-08 2005-01-13 Yang Michael Xi Multiple precursor cyclical depositon system
US20050155551A1 (en) * 2004-01-19 2005-07-21 Byoung-Jae Bae Deposition apparatus and related methods including a pulse fluid supplier having a buffer
US6930013B2 (en) * 2001-05-29 2005-08-16 Samsung Electronics Co., Ltd. Method of forming a capacitor of an integrated circuit device
US20060040461A1 (en) * 2002-07-19 2006-02-23 Hynix Semiconductor Inc. Method of forming a capacitor
US20060046378A1 (en) * 2004-08-26 2006-03-02 Samsung Electronics Co., Ltd. Methods of fabricating MIM capacitor employing metal nitride layer as lower electrode
US20060165890A1 (en) * 2005-01-26 2006-07-27 Tokyo Electron Limited Method and apparatus for monolayer deposition (MLD)
US20060292456A1 (en) * 2005-06-24 2006-12-28 Pary Baluswamy Reticle constructions, and methods for photo-processing photo-imageable material
US20070052103A1 (en) * 2005-09-06 2007-03-08 Samsung Electronics Co., Ltd. TiN layer structures for semiconductor devices, methods of forming the same, semiconductor devices having TiN layer structures and methods of fabricating the same
US20070082468A1 (en) * 2005-10-06 2007-04-12 Blalock Guy T Atomic layer deposition methods
US7220673B2 (en) 2000-06-28 2007-05-22 Applied Materials, Inc. Method for depositing tungsten-containing layers by vapor deposition techniques
US7279432B2 (en) 2002-04-16 2007-10-09 Applied Materials, Inc. System and method for forming an integrated barrier layer
US20070234953A1 (en) * 2006-03-31 2007-10-11 Tokyo Electron Limited Monitoring a monolayer deposition (mld) system using a built-in self test (bist) table
US20070259285A1 (en) * 2006-03-31 2007-11-08 Tokyo Electron Limited Method for creating a built-in self test (bist) table for monitoring a monolayer deposition (mld) system
US20080085611A1 (en) * 2006-10-09 2008-04-10 Amit Khandelwal Deposition and densification process for titanium nitride barrier layers
US7439191B2 (en) * 2002-04-05 2008-10-21 Applied Materials, Inc. Deposition of silicon layers for active matrix liquid crystal display (AMLCD) applications
US7659158B2 (en) 2008-03-31 2010-02-09 Applied Materials, Inc. Atomic layer deposition processes for non-volatile memory devices
US7670945B2 (en) 1998-10-01 2010-03-02 Applied Materials, Inc. In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
US7674715B2 (en) 2000-06-28 2010-03-09 Applied Materials, Inc. Method for forming tungsten materials during vapor deposition processes
US7682946B2 (en) 2005-11-04 2010-03-23 Applied Materials, Inc. Apparatus and process for plasma-enhanced atomic layer deposition
US7732325B2 (en) 2002-01-26 2010-06-08 Applied Materials, Inc. Plasma-enhanced cyclic layer deposition process for barrier layers
US7745329B2 (en) 2002-02-26 2010-06-29 Applied Materials, Inc. Tungsten nitride atomic layer deposition processes
US7745333B2 (en) 2000-06-28 2010-06-29 Applied Materials, Inc. Methods for depositing tungsten layers employing atomic layer deposition techniques
US7779784B2 (en) 2002-01-26 2010-08-24 Applied Materials, Inc. Apparatus and method for plasma assisted deposition
US7794544B2 (en) 2004-05-12 2010-09-14 Applied Materials, Inc. Control of gas flow and delivery to suppress the formation of particles in an MOCVD/ALD system
US7798096B2 (en) 2006-05-05 2010-09-21 Applied Materials, Inc. Plasma, UV and ion/neutral assisted ALD or CVD in a batch tool
US20110039419A1 (en) * 2009-07-17 2011-02-17 Applied Materials, Inc. Methods for forming dielectric layers
US7972978B2 (en) 2005-08-26 2011-07-05 Applied Materials, Inc. Pretreatment processes within a batch ALD reactor
US8110489B2 (en) 2001-07-25 2012-02-07 Applied Materials, Inc. Process for forming cobalt-containing materials
US8119210B2 (en) 2004-05-21 2012-02-21 Applied Materials, Inc. Formation of a silicon oxynitride layer on a high-k dielectric material
US8187970B2 (en) 2001-07-25 2012-05-29 Applied Materials, Inc. Process for forming cobalt and cobalt silicide materials in tungsten contact applications
US8323754B2 (en) 2004-05-21 2012-12-04 Applied Materials, Inc. Stabilization of high-k dielectric materials
US8491967B2 (en) 2008-09-08 2013-07-23 Applied Materials, Inc. In-situ chamber treatment and deposition process
US20140175046A1 (en) * 2012-12-20 2014-06-26 Tokyo Electron Limited Method for forming copper wiring
US9051641B2 (en) 2001-07-25 2015-06-09 Applied Materials, Inc. Cobalt deposition on barrier surfaces
US9368418B2 (en) 2013-08-22 2016-06-14 Tokyo Electron Limited Copper wiring structure forming method
US9418890B2 (en) 2008-09-08 2016-08-16 Applied Materials, Inc. Method for tuning a deposition rate during an atomic layer deposition process

Families Citing this family (164)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6861356B2 (en) * 1997-11-05 2005-03-01 Tokyo Electron Limited Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film
JPH11195621A (en) * 1997-11-05 1999-07-21 Tokyo Electron Ltd Barrier metal, its formation, gate electrode, and its formation
US7829144B2 (en) * 1997-11-05 2010-11-09 Tokyo Electron Limited Method of forming a metal film for electrode
US6391785B1 (en) * 1999-08-24 2002-05-21 Interuniversitair Microelektronica Centrum (Imec) Method for bottomless deposition of barrier layers in integrated circuit metallization schemes
US6727169B1 (en) 1999-10-15 2004-04-27 Asm International, N.V. Method of making conformal lining layers for damascene metallization
US6319766B1 (en) 2000-02-22 2001-11-20 Applied Materials, Inc. Method of tantalum nitride deposition by tantalum oxide densification
US6482733B2 (en) * 2000-05-15 2002-11-19 Asm Microchemistry Oy Protective layers prior to alternating layer deposition
US7964505B2 (en) 2005-01-19 2011-06-21 Applied Materials, Inc. Atomic layer deposition of tungsten materials
US7732327B2 (en) 2000-06-28 2010-06-08 Applied Materials, Inc. Vapor deposition of tungsten materials
US6765178B2 (en) 2000-12-29 2004-07-20 Applied Materials, Inc. Chamber for uniform substrate heating
US6825447B2 (en) 2000-12-29 2004-11-30 Applied Materials, Inc. Apparatus and method for uniform substrate heating and contaminate collection
US6951804B2 (en) 2001-02-02 2005-10-04 Applied Materials, Inc. Formation of a tantalum-nitride layer
KR101050377B1 (en) 2001-02-12 2011-07-20 에이에스엠 아메리카, 인코포레이티드 Improved process for deposition of semiconductor films
US6613656B2 (en) * 2001-02-13 2003-09-02 Micron Technology, Inc. Sequential pulse deposition
US6878206B2 (en) 2001-07-16 2005-04-12 Applied Materials, Inc. Lid assembly for a processing system to facilitate sequential deposition techniques
US6660126B2 (en) 2001-03-02 2003-12-09 Applied Materials, Inc. Lid assembly for a processing system to facilitate sequential deposition techniques
US6734020B2 (en) 2001-03-07 2004-05-11 Applied Materials, Inc. Valve control system for atomic layer deposition chamber
KR100519376B1 (en) * 2001-06-12 2005-10-07 주식회사 하이닉스반도체 Method for Forming Barrier Layer of Semiconductor Device
US6849545B2 (en) * 2001-06-20 2005-02-01 Applied Materials, Inc. System and method to form a composite film stack utilizing sequential deposition techniques
US6511867B2 (en) * 2001-06-30 2003-01-28 Ovonyx, Inc. Utilizing atomic layer deposition for programmable device
US7211144B2 (en) 2001-07-13 2007-05-01 Applied Materials, Inc. Pulsed nucleation deposition of tungsten layers
TW581822B (en) * 2001-07-16 2004-04-01 Applied Materials Inc Formation of composite tungsten films
KR100427030B1 (en) * 2001-08-27 2004-04-14 주식회사 하이닉스반도체 Method for forming film with muli-elements and fabricating capacitor using the same
JP4178776B2 (en) * 2001-09-03 2008-11-12 東京エレクトロン株式会社 Deposition method
US6718126B2 (en) * 2001-09-14 2004-04-06 Applied Materials, Inc. Apparatus and method for vaporizing solid precursor for CVD or atomic layer deposition
US7049226B2 (en) * 2001-09-26 2006-05-23 Applied Materials, Inc. Integration of ALD tantalum nitride for copper metallization
TW589684B (en) * 2001-10-10 2004-06-01 Applied Materials Inc Method for depositing refractory metal layers employing sequential deposition techniques
US7780785B2 (en) 2001-10-26 2010-08-24 Applied Materials, Inc. Gas delivery apparatus for atomic layer deposition
KR100760291B1 (en) * 2001-11-08 2007-09-19 에이에스엠지니텍코리아 주식회사 Method for forming thin film
US6729824B2 (en) 2001-12-14 2004-05-04 Applied Materials, Inc. Dual robot processing system
KR20030050672A (en) * 2001-12-19 2003-06-25 주식회사 하이닉스반도체 Method for forming TiN by atomic layer deposition and method for fabricating metallization using the same
US6809026B2 (en) 2001-12-21 2004-10-26 Applied Materials, Inc. Selective deposition of a barrier layer on a metal film
US6939801B2 (en) * 2001-12-21 2005-09-06 Applied Materials, Inc. Selective deposition of a barrier layer on a dielectric material
US6620670B2 (en) 2002-01-18 2003-09-16 Applied Materials, Inc. Process conditions and precursors for atomic layer deposition (ALD) of AL2O3
US6827978B2 (en) 2002-02-11 2004-12-07 Applied Materials, Inc. Deposition of tungsten films
US6972267B2 (en) 2002-03-04 2005-12-06 Applied Materials, Inc. Sequential deposition of tantalum nitride using a tantalum-containing precursor and a nitrogen-containing precursor
KR100449028B1 (en) * 2002-03-05 2004-09-16 삼성전자주식회사 Method for forming thin film using ALD
US6825134B2 (en) * 2002-03-26 2004-11-30 Applied Materials, Inc. Deposition of film layers by alternately pulsing a precursor and high frequency power in a continuous gas flow
KR20030081144A (en) 2002-04-11 2003-10-17 가부시키가이샤 히다치 고쿠사이 덴키 Vertical semiconductor manufacturing apparatus
US6932871B2 (en) 2002-04-16 2005-08-23 Applied Materials, Inc. Multi-station deposition apparatus and method
US20030215570A1 (en) * 2002-05-16 2003-11-20 Applied Materials, Inc. Deposition of silicon nitride
US20040013803A1 (en) * 2002-07-16 2004-01-22 Applied Materials, Inc. Formation of titanium nitride films using a cyclical deposition process
US6955211B2 (en) 2002-07-17 2005-10-18 Applied Materials, Inc. Method and apparatus for gas temperature control in a semiconductor processing system
US7186385B2 (en) 2002-07-17 2007-03-06 Applied Materials, Inc. Apparatus for providing gas to a processing chamber
US7066194B2 (en) * 2002-07-19 2006-06-27 Applied Materials, Inc. Valve design and configuration for fast delivery system
US6772072B2 (en) * 2002-07-22 2004-08-03 Applied Materials, Inc. Method and apparatus for monitoring solid precursor delivery
KR100464855B1 (en) * 2002-07-26 2005-01-06 삼성전자주식회사 method for forming a thin film, and method for forming a capacitor and a transistor of a semiconductor device using the same
US6915592B2 (en) 2002-07-29 2005-07-12 Applied Materials, Inc. Method and apparatus for generating gas to a processing chamber
KR100486637B1 (en) * 2002-08-07 2005-05-03 학교법인 포항공과대학교 Deposition of multi-component thin layer using an atomic layer chemical vapor deposition
US7186630B2 (en) 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
US6897106B2 (en) 2002-08-16 2005-05-24 Samsung Electronics Co., Ltd. Capacitor of semiconductor memory device that has composite Al2O3/HfO2 dielectric layer and method of manufacturing the same
KR100450681B1 (en) * 2002-08-16 2004-10-02 삼성전자주식회사 Capacitor of semiconductor memory device and manufacturing method thereof
US20040036129A1 (en) * 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
US20050181212A1 (en) * 2004-02-17 2005-08-18 General Electric Company Composite articles having diffusion barriers and devices incorporating the same
US7540920B2 (en) * 2002-10-18 2009-06-02 Applied Materials, Inc. Silicon-containing layer deposition with silicon compounds
EP1420080A3 (en) 2002-11-14 2005-11-09 Applied Materials, Inc. Apparatus and method for hybrid chemical deposition processes
KR100476482B1 (en) * 2002-12-14 2005-03-21 동부전자 주식회사 Method For Forming Barrier Metal
US6753248B1 (en) 2003-01-27 2004-06-22 Applied Materials, Inc. Post metal barrier/adhesion film
JP4214795B2 (en) * 2003-02-20 2009-01-28 東京エレクトロン株式会社 Deposition method
TW200506093A (en) * 2003-04-21 2005-02-16 Aviza Tech Inc System and method for forming multi-component films
US20050070126A1 (en) * 2003-04-21 2005-03-31 Yoshihide Senzaki System and method for forming multi-component dielectric films
US7833580B2 (en) * 2003-07-04 2010-11-16 Samsung Electronics Co., Ltd. Method of forming a carbon nano-material layer using a cyclic deposition technique
KR100560666B1 (en) * 2003-07-07 2006-03-16 삼성전자주식회사 Metal layer deposition system for semiconductor device fabrication and method of operating the same
US7235482B2 (en) * 2003-09-08 2007-06-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing a contact interconnection layer containing a metal and nitrogen by atomic layer deposition for deep sub-micron semiconductor technology
DE102004021578A1 (en) * 2003-09-17 2005-04-21 Aixtron Ag Method and apparatus for depositing mono- or multi-component layers and layer sequences using non-continuous injection of liquid and dissolved starting substances via a multi-channel injection unit
EP1664380A2 (en) * 2003-09-17 2006-06-07 Aixtron AG Method and device for depositing single component or multicomponent layers and series of layers using non-continuous injection of liquid and dissolved starting material by a multi-channel injection unit
US7169713B2 (en) * 2003-09-26 2007-01-30 Taiwan Semiconductor Manufacturing Co., Ltd. Atomic layer deposition (ALD) method with enhanced deposition rate
US20050067103A1 (en) * 2003-09-26 2005-03-31 Applied Materials, Inc. Interferometer endpoint monitoring device
US7094712B2 (en) 2003-09-30 2006-08-22 Samsung Electronics Co., Ltd. High performance MIS capacitor with HfO2 dielectric
US7166528B2 (en) * 2003-10-10 2007-01-23 Applied Materials, Inc. Methods of selective deposition of heavily doped epitaxial SiGe
US20050109276A1 (en) * 2003-11-25 2005-05-26 Applied Materials, Inc. Thermal chemical vapor deposition of silicon nitride using BTBAS bis(tertiary-butylamino silane) in a single wafer chamber
US7067409B2 (en) * 2004-05-10 2006-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance
US7378744B2 (en) * 2004-05-10 2008-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance
JP2006024668A (en) * 2004-07-07 2006-01-26 Fujitsu Ltd Process for fabricating semiconductor device
US7241686B2 (en) * 2004-07-20 2007-07-10 Applied Materials, Inc. Atomic layer deposition of tantalum-containing materials using the tantalum precursor TAIMATA
US20060019032A1 (en) * 2004-07-23 2006-01-26 Yaxin Wang Low thermal budget silicon nitride formation for advance transistor fabrication
KR100714269B1 (en) * 2004-10-14 2007-05-02 삼성전자주식회사 Method for forming metal layer used the manufacturing semiconductor device
US20060084283A1 (en) * 2004-10-20 2006-04-20 Paranjpe Ajit P Low temperature sin deposition methods
US7312128B2 (en) * 2004-12-01 2007-12-25 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US7682940B2 (en) 2004-12-01 2010-03-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
US7560352B2 (en) * 2004-12-01 2009-07-14 Applied Materials, Inc. Selective deposition
US7429402B2 (en) 2004-12-10 2008-09-30 Applied Materials, Inc. Ruthenium as an underlayer for tungsten film deposition
KR100596495B1 (en) * 2004-12-13 2006-07-04 삼성전자주식회사 Method of depositing a metal compound and apparatus for performing the same
US7235492B2 (en) 2005-01-31 2007-06-26 Applied Materials, Inc. Low temperature etchant for treatment of silicon-containing surfaces
US7438760B2 (en) * 2005-02-04 2008-10-21 Asm America, Inc. Methods of making substitutionally carbon-doped crystalline Si-containing materials by chemical vapor deposition
KR100622609B1 (en) * 2005-02-16 2006-09-19 주식회사 하이닉스반도체 Thin film deposition method
KR100640638B1 (en) 2005-03-10 2006-10-31 삼성전자주식회사 Method for forming high dielectric film by atomic layer deposition and method of fabricating semiconductor device having high dielectric film
KR100597322B1 (en) * 2005-03-16 2006-07-06 주식회사 아이피에스 A method for depositing thin film on wafer using impulse ald
TW200731404A (en) * 2005-04-07 2007-08-16 Aviza Tech Inc Multilayer, multicomponent high-k films and methods for depositing the same
US7651955B2 (en) * 2005-06-21 2010-01-26 Applied Materials, Inc. Method for forming silicon-containing materials during a photoexcitation deposition process
US20060286774A1 (en) * 2005-06-21 2006-12-21 Applied Materials. Inc. Method for forming silicon-containing materials during a photoexcitation deposition process
US7648927B2 (en) 2005-06-21 2010-01-19 Applied Materials, Inc. Method for forming silicon-containing materials during a photoexcitation deposition process
US7473637B2 (en) 2005-07-20 2009-01-06 Micron Technology, Inc. ALD formed titanium nitride films
US20070082507A1 (en) * 2005-10-06 2007-04-12 Applied Materials, Inc. Method and apparatus for the low temperature deposition of doped silicon nitride films
US7658802B2 (en) * 2005-11-22 2010-02-09 Applied Materials, Inc. Apparatus and a method for cleaning a dielectric film
KR20080089403A (en) * 2005-12-22 2008-10-06 에이에스엠 아메리카, 인코포레이티드 Epitaxial deposition of doped semiconductor materials
KR100706810B1 (en) * 2006-02-07 2007-04-12 삼성전자주식회사 Cleaning of a thin film deposition apparatus forming of a thin film using the cleaning
US7709402B2 (en) 2006-02-16 2010-05-04 Micron Technology, Inc. Conductive layers for hafnium silicon oxynitride films
US20070234956A1 (en) * 2006-04-05 2007-10-11 Dalton Jeremie J Method and apparatus for providing uniform gas delivery to a reactor
US7674337B2 (en) * 2006-04-07 2010-03-09 Applied Materials, Inc. Gas manifolds for use during epitaxial film formation
KR101242562B1 (en) * 2006-04-27 2013-03-19 주식회사 원익아이피에스 Method of depositing thin film
US8278176B2 (en) 2006-06-07 2012-10-02 Asm America, Inc. Selective epitaxial formation of semiconductor films
US7501355B2 (en) * 2006-06-29 2009-03-10 Applied Materials, Inc. Decreasing the etch rate of silicon nitride by carbon addition
CN101496153A (en) * 2006-07-31 2009-07-29 应用材料股份有限公司 Methods of forming carbon-containing silicon epitaxial layers
JP5175285B2 (en) * 2006-07-31 2013-04-03 アプライド マテリアルズ インコーポレイテッド Method for controlling morphology during epitaxial layer formation
US20080099436A1 (en) * 2006-10-30 2008-05-01 Michael Grimbergen Endpoint detection for photomask etching
US20080176149A1 (en) * 2006-10-30 2008-07-24 Applied Materials, Inc. Endpoint detection for photomask etching
US7692222B2 (en) * 2006-11-07 2010-04-06 Raytheon Company Atomic layer deposition in the formation of gate structures for III-V semiconductor
US7897495B2 (en) * 2006-12-12 2011-03-01 Applied Materials, Inc. Formation of epitaxial layer containing silicon and carbon
US20080145536A1 (en) * 2006-12-13 2008-06-19 Applied Materials, Inc. METHOD AND APPARATUS FOR LOW TEMPERATURE AND LOW K SiBN DEPOSITION
US9064960B2 (en) * 2007-01-31 2015-06-23 Applied Materials, Inc. Selective epitaxy process control
US7923068B2 (en) * 2007-02-12 2011-04-12 Lotus Applied Technology, Llc Fabrication of composite materials using atomic layer deposition
US7759199B2 (en) 2007-09-19 2010-07-20 Asm America, Inc. Stressor for engineered strain on channel
US7585762B2 (en) 2007-09-25 2009-09-08 Applied Materials, Inc. Vapor deposition processes for tantalum carbide nitride materials
US7678298B2 (en) 2007-09-25 2010-03-16 Applied Materials, Inc. Tantalum carbide nitride materials by vapor deposition processes
US7824743B2 (en) 2007-09-28 2010-11-02 Applied Materials, Inc. Deposition processes for titanium nitride barrier and aluminum
US7939447B2 (en) * 2007-10-26 2011-05-10 Asm America, Inc. Inhibitors for selective deposition of silicon containing films
US8993051B2 (en) 2007-12-12 2015-03-31 Technische Universiteit Delft Method for covering particles, especially a battery electrode material particles, and particles obtained with such method and a battery comprising such particle
US7655543B2 (en) * 2007-12-21 2010-02-02 Asm America, Inc. Separate injection of reactive species in selective formation of films
US7767572B2 (en) * 2008-02-21 2010-08-03 Applied Materials, Inc. Methods of forming a barrier layer in an interconnect structure
US7618893B2 (en) * 2008-03-04 2009-11-17 Applied Materials, Inc. Methods of forming a layer for barrier applications in an interconnect structure
US8383525B2 (en) 2008-04-25 2013-02-26 Asm America, Inc. Plasma-enhanced deposition process for forming a metal oxide thin film and related structures
US8146896B2 (en) 2008-10-31 2012-04-03 Applied Materials, Inc. Chemical precursor ampoule for vapor deposition processes
US20100151676A1 (en) * 2008-12-16 2010-06-17 Applied Materials, Inc. Densification process for titanium nitride layer for submicron applications
US8486191B2 (en) * 2009-04-07 2013-07-16 Asm America, Inc. Substrate reactor with adjustable injectors for mixing gases within reaction chamber
US8367528B2 (en) 2009-11-17 2013-02-05 Asm America, Inc. Cyclical epitaxial deposition and etch
JP2011168881A (en) * 2010-01-25 2011-09-01 Hitachi Kokusai Electric Inc Method of manufacturing semiconductor device and substrate processing apparatus
US8778204B2 (en) 2010-10-29 2014-07-15 Applied Materials, Inc. Methods for reducing photoresist interference when monitoring a target layer in a plasma process
JP2012174953A (en) * 2011-02-23 2012-09-10 Toshiba Corp Semiconductor storage device, and method of manufacturing the same
JP5986591B2 (en) 2011-03-04 2016-09-06 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Methods for cleaning contacts
US8912096B2 (en) 2011-04-28 2014-12-16 Applied Materials, Inc. Methods for precleaning a substrate prior to metal silicide fabrication process
US8809170B2 (en) 2011-05-19 2014-08-19 Asm America Inc. High throughput cyclical epitaxial deposition and etch process
US9218961B2 (en) 2011-09-19 2015-12-22 Applied Materials, Inc. Methods of forming a metal containing layer on a substrate with high uniformity and good profile control
US8961804B2 (en) 2011-10-25 2015-02-24 Applied Materials, Inc. Etch rate detection for photomask etching
US8808559B2 (en) 2011-11-22 2014-08-19 Applied Materials, Inc. Etch rate detection for reflective multi-material layers etching
US8927423B2 (en) 2011-12-16 2015-01-06 Applied Materials, Inc. Methods for annealing a contact metal layer to form a metal silicidation layer
US8900469B2 (en) 2011-12-19 2014-12-02 Applied Materials, Inc. Etch rate detection for anti-reflective coating layer and absorber layer etching
US8586479B2 (en) 2012-01-23 2013-11-19 Applied Materials, Inc. Methods for forming a contact metal layer in semiconductor devices
JP2013151722A (en) * 2012-01-25 2013-08-08 Hitachi Kokusai Electric Inc Method for manufacturing semiconductor device
US9330939B2 (en) 2012-03-28 2016-05-03 Applied Materials, Inc. Method of enabling seamless cobalt gap-fill
US9805939B2 (en) 2012-10-12 2017-10-31 Applied Materials, Inc. Dual endpoint detection for advanced phase shift and binary photomasks
US8778574B2 (en) 2012-11-30 2014-07-15 Applied Materials, Inc. Method for etching EUV material layers utilized to form a photomask
US20150325447A1 (en) 2013-01-18 2015-11-12 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device and substrate processing apparatus
JP6061385B2 (en) * 2013-01-22 2017-01-18 株式会社日立国際電気 Semiconductor device manufacturing method, substrate processing apparatus, and program
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US9543163B2 (en) 2013-08-20 2017-01-10 Applied Materials, Inc. Methods for forming features in a material layer utilizing a combination of a main etching and a cyclical etching process
CN110066984B (en) 2013-09-27 2021-06-08 应用材料公司 Method for realizing seamless cobalt gap filling
US9508561B2 (en) 2014-03-11 2016-11-29 Applied Materials, Inc. Methods for forming interconnection structures in an integrated cluster system for semicondcutor applications
US9528185B2 (en) 2014-08-22 2016-12-27 Applied Materials, Inc. Plasma uniformity control by arrays of unit cell plasmas
FR3046878B1 (en) * 2016-01-19 2018-05-18 Kobus Sas METHOD FOR MANUFACTURING AN INTERCONNECTION COMPRISING A VIA EXTENDING THROUGH A SUBSTRATE
FR3046801B1 (en) 2016-01-19 2020-01-17 Kobus Sas METHOD FOR REMOVAL OF A METAL DEPOSIT ON A SURFACE IN AN ENCLOSURE
US9711402B1 (en) * 2016-03-08 2017-07-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming contact metal
US10622214B2 (en) 2017-05-25 2020-04-14 Applied Materials, Inc. Tungsten defluorination by high pressure treatment
US10276411B2 (en) 2017-08-18 2019-04-30 Applied Materials, Inc. High pressure and high temperature anneal chamber
WO2019036157A1 (en) 2017-08-18 2019-02-21 Applied Materials, Inc. High pressure and high temperature anneal chamber
CN109576672A (en) * 2017-09-28 2019-04-05 北京北方华创微电子装备有限公司 A kind of Atomic layer deposition method
KR102585074B1 (en) 2017-11-11 2023-10-04 마이크로머티어리얼즈 엘엘씨 Gas delivery system for high pressure processing chamber
CN111432920A (en) 2017-11-17 2020-07-17 应用材料公司 Condenser system for high pressure processing system
JP7239598B2 (en) 2018-03-09 2023-03-14 アプライド マテリアルズ インコーポレイテッド High Pressure Annealing Process for Metal-Containing Materials
US10950429B2 (en) 2018-05-08 2021-03-16 Applied Materials, Inc. Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom
US10748783B2 (en) 2018-07-25 2020-08-18 Applied Materials, Inc. Gas delivery module
WO2020117462A1 (en) 2018-12-07 2020-06-11 Applied Materials, Inc. Semiconductor processing system
KR102619482B1 (en) * 2019-10-25 2024-01-02 에이에스엠 아이피 홀딩 비.브이. Normal pulse profile modification in a film deposition process
US11901222B2 (en) 2020-02-17 2024-02-13 Applied Materials, Inc. Multi-step process for flowable gap-fill film

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6287965B1 (en) * 1997-07-28 2001-09-11 Samsung Electronics Co, Ltd. Method of forming metal layer using atomic layer deposition and semiconductor device having the metal layer as barrier metal layer or upper or lower electrode of capacitor
US6197683B1 (en) * 1997-09-29 2001-03-06 Samsung Electronics Co., Ltd. Method of forming metal nitride film by chemical vapor deposition and method of forming metal contact of semiconductor device using the same
US6305314B1 (en) * 1999-03-11 2001-10-23 Genvs, Inc. Apparatus and concept for minimizing parasitic chemical vapor deposition during atomic layer deposition

Cited By (103)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7670945B2 (en) 1998-10-01 2010-03-02 Applied Materials, Inc. In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
US6831004B2 (en) 2000-06-27 2004-12-14 Applied Materials, Inc. Formation of boride barrier layers using chemisorption techniques
US7745333B2 (en) 2000-06-28 2010-06-29 Applied Materials, Inc. Methods for depositing tungsten layers employing atomic layer deposition techniques
US7674715B2 (en) 2000-06-28 2010-03-09 Applied Materials, Inc. Method for forming tungsten materials during vapor deposition processes
US7709385B2 (en) 2000-06-28 2010-05-04 Applied Materials, Inc. Method for depositing tungsten-containing layers by vapor deposition techniques
US7220673B2 (en) 2000-06-28 2007-05-22 Applied Materials, Inc. Method for depositing tungsten-containing layers by vapor deposition techniques
US7846840B2 (en) 2000-06-28 2010-12-07 Applied Materials, Inc. Method for forming tungsten materials during vapor deposition processes
US20020036780A1 (en) * 2000-09-27 2002-03-28 Hiroaki Nakamura Image processing apparatus
US20040197492A1 (en) * 2001-05-07 2004-10-07 Applied Materials, Inc. CVD TiSiN barrier for copper integration
US6958296B2 (en) 2001-05-07 2005-10-25 Applied Materials, Inc. CVD TiSiN barrier for copper integration
US6930013B2 (en) * 2001-05-29 2005-08-16 Samsung Electronics Co., Ltd. Method of forming a capacitor of an integrated circuit device
US6936538B2 (en) 2001-07-16 2005-08-30 Applied Materials, Inc. Method and apparatus for depositing tungsten after surface treatment to improve film characteristics
US20030013300A1 (en) * 2001-07-16 2003-01-16 Applied Materials, Inc. Method and apparatus for depositing tungsten after surface treatment to improve film characteristics
US9209074B2 (en) 2001-07-25 2015-12-08 Applied Materials, Inc. Cobalt deposition on barrier surfaces
US8187970B2 (en) 2001-07-25 2012-05-29 Applied Materials, Inc. Process for forming cobalt and cobalt silicide materials in tungsten contact applications
US8110489B2 (en) 2001-07-25 2012-02-07 Applied Materials, Inc. Process for forming cobalt-containing materials
US8563424B2 (en) 2001-07-25 2013-10-22 Applied Materials, Inc. Process for forming cobalt and cobalt silicide materials in tungsten contact applications
US9051641B2 (en) 2001-07-25 2015-06-09 Applied Materials, Inc. Cobalt deposition on barrier surfaces
US20030082301A1 (en) * 2001-10-26 2003-05-01 Applied Materials, Inc. Enhanced copper growth with ultrathin barrier layer for high performance interconnects
US8318266B2 (en) 2001-10-26 2012-11-27 Applied Materials, Inc. Enhanced copper growth with ultrathin barrier layer for high performance interconnects
US8293328B2 (en) 2001-10-26 2012-10-23 Applied Materials, Inc. Enhanced copper growth with ultrathin barrier layer for high performance interconnects
US6773507B2 (en) 2001-12-06 2004-08-10 Applied Materials, Inc. Apparatus and method for fast-cycle atomic layer deposition
US20030106490A1 (en) * 2001-12-06 2003-06-12 Applied Materials, Inc. Apparatus and method for fast-cycle atomic layer deposition
US7892602B2 (en) 2001-12-07 2011-02-22 Applied Materials, Inc. Cyclical deposition of refractory metal silicon nitride
US20030108674A1 (en) * 2001-12-07 2003-06-12 Applied Materials, Inc. Cyclical deposition of refractory metal silicon nitride
US7081271B2 (en) 2001-12-07 2006-07-25 Applied Materials, Inc. Cyclical deposition of refractory metal silicon nitride
US20030172872A1 (en) * 2002-01-25 2003-09-18 Applied Materials, Inc. Apparatus for cyclical deposition of thin films
US8123860B2 (en) 2002-01-25 2012-02-28 Applied Materials, Inc. Apparatus for cyclical depositing of thin films
US7779784B2 (en) 2002-01-26 2010-08-24 Applied Materials, Inc. Apparatus and method for plasma assisted deposition
US7732325B2 (en) 2002-01-26 2010-06-08 Applied Materials, Inc. Plasma-enhanced cyclic layer deposition process for barrier layers
US7745329B2 (en) 2002-02-26 2010-06-29 Applied Materials, Inc. Tungsten nitride atomic layer deposition processes
US7439191B2 (en) * 2002-04-05 2008-10-21 Applied Materials, Inc. Deposition of silicon layers for active matrix liquid crystal display (AMLCD) applications
US6720027B2 (en) 2002-04-08 2004-04-13 Applied Materials, Inc. Cyclical deposition of a variable content titanium silicon nitride layer
US20050008779A1 (en) * 2002-04-08 2005-01-13 Yang Michael Xi Multiple precursor cyclical depositon system
US7396565B2 (en) 2002-04-08 2008-07-08 Applied Materials, Inc. Multiple precursor cyclical deposition system
US20030190497A1 (en) * 2002-04-08 2003-10-09 Applied Materials, Inc. Cyclical deposition of a variable content titanium silicon nitride layer
US7279432B2 (en) 2002-04-16 2007-10-09 Applied Materials, Inc. System and method for forming an integrated barrier layer
US7867914B2 (en) 2002-04-16 2011-01-11 Applied Materials, Inc. System and method for forming an integrated barrier layer
US20080014352A1 (en) * 2002-04-16 2008-01-17 Ming Xi System and method for forming an integrated barrier layer
US20030235961A1 (en) * 2002-04-17 2003-12-25 Applied Materials, Inc. Cyclical sequential deposition of multicomponent films
US7041335B2 (en) 2002-06-04 2006-05-09 Applied Materials, Inc. Titanium tantalum nitride silicide layer
US20040077183A1 (en) * 2002-06-04 2004-04-22 Hua Chung Titanium tantalum nitride silicide layer
US6858547B2 (en) 2002-06-14 2005-02-22 Applied Materials, Inc. System and method for forming a gate dielectric
US20050009371A1 (en) * 2002-06-14 2005-01-13 Metzner Craig R. System and method for forming a gate dielectric
US20030232501A1 (en) * 2002-06-14 2003-12-18 Kher Shreyas S. Surface pre-treatment for enhancement of nucleation of high dielectric constant materials
US7304004B2 (en) 2002-06-14 2007-12-04 Applied Materials, Inc. System and method for forming a gate dielectric
US20030232511A1 (en) * 2002-06-14 2003-12-18 Applied Materials, Inc. ALD metal oxide deposition process using direct oxidation
US20080057737A1 (en) * 2002-06-14 2008-03-06 Metzner Craig R System and method for forming a gate dielectric
US20030232506A1 (en) * 2002-06-14 2003-12-18 Applied Materials, Inc. System and method for forming a gate dielectric
US20060264067A1 (en) * 2002-06-14 2006-11-23 Kher Shreyas S Surface pre-treatment for enhancement of nucleation of high dielectric constant materials
US7067439B2 (en) 2002-06-14 2006-06-27 Applied Materials, Inc. ALD metal oxide deposition process using direct oxidation
US8071167B2 (en) 2002-06-14 2011-12-06 Applied Materials, Inc. Surface pre-treatment for enhancement of nucleation of high dielectric constant materials
US20060223339A1 (en) * 2002-06-14 2006-10-05 Metzner Craig R Ald metal oxide deposition process using direct oxidation
US7531468B2 (en) 2002-06-14 2009-05-12 Applied Materials, Inc. System and method for forming a gate dielectric
US20100239758A1 (en) * 2002-06-14 2010-09-23 Kher Shreyas S Surface pre-treatment for enhancement of nucleation of high dielectric constant materials
US20040018304A1 (en) * 2002-07-10 2004-01-29 Applied Materials, Inc. Method of film deposition using activated precursor gases
US20060040461A1 (en) * 2002-07-19 2006-02-23 Hynix Semiconductor Inc. Method of forming a capacitor
US6821563B2 (en) 2002-10-02 2004-11-23 Applied Materials, Inc. Gas distribution system for cyclical layer deposition
US20040071897A1 (en) * 2002-10-11 2004-04-15 Applied Materials, Inc. Activated species generator for rapid cycle deposition processes
US20040187304A1 (en) * 2003-01-07 2004-09-30 Applied Materials, Inc. Enhancement of Cu line reliability using thin ALD TaN film to cap the Cu line
US20040256351A1 (en) * 2003-01-07 2004-12-23 Hua Chung Integration of ALD/CVD barriers with porous low k materials
US20040198069A1 (en) * 2003-04-04 2004-10-07 Applied Materials, Inc. Method for hafnium nitride deposition
US20050009325A1 (en) * 2003-06-18 2005-01-13 Hua Chung Atomic layer deposition of barrier materials
US20050155551A1 (en) * 2004-01-19 2005-07-21 Byoung-Jae Bae Deposition apparatus and related methods including a pulse fluid supplier having a buffer
US8343279B2 (en) 2004-05-12 2013-01-01 Applied Materials, Inc. Apparatuses for atomic layer deposition
US8282992B2 (en) 2004-05-12 2012-10-09 Applied Materials, Inc. Methods for atomic layer deposition of hafnium-containing high-K dielectric materials
US7794544B2 (en) 2004-05-12 2010-09-14 Applied Materials, Inc. Control of gas flow and delivery to suppress the formation of particles in an MOCVD/ALD system
US8119210B2 (en) 2004-05-21 2012-02-21 Applied Materials, Inc. Formation of a silicon oxynitride layer on a high-k dielectric material
US8323754B2 (en) 2004-05-21 2012-12-04 Applied Materials, Inc. Stabilization of high-k dielectric materials
US20060046378A1 (en) * 2004-08-26 2006-03-02 Samsung Electronics Co., Ltd. Methods of fabricating MIM capacitor employing metal nitride layer as lower electrode
KR101477297B1 (en) * 2005-01-26 2014-12-29 도쿄엘렉트론가부시키가이샤 Method of operating monolayer deposition processing system
US20060165890A1 (en) * 2005-01-26 2006-07-27 Tokyo Electron Limited Method and apparatus for monolayer deposition (MLD)
US7838072B2 (en) * 2005-01-26 2010-11-23 Tokyo Electron Limited Method and apparatus for monolayer deposition (MLD)
US7862964B2 (en) 2005-06-24 2011-01-04 Micron Technology, Inc. Methods for photo-processing photo-imageable material
US7767363B2 (en) 2005-06-24 2010-08-03 Micron Technology, Inc. Methods for photo-processing photo-imageable material
US20100261107A1 (en) * 2005-06-24 2010-10-14 Micron Technology, Inc. Methods For Photo-Processing Photo-Imageable Material
US20060292456A1 (en) * 2005-06-24 2006-12-28 Pary Baluswamy Reticle constructions, and methods for photo-processing photo-imageable material
US7972978B2 (en) 2005-08-26 2011-07-05 Applied Materials, Inc. Pretreatment processes within a batch ALD reactor
US20070052103A1 (en) * 2005-09-06 2007-03-08 Samsung Electronics Co., Ltd. TiN layer structures for semiconductor devices, methods of forming the same, semiconductor devices having TiN layer structures and methods of fabricating the same
US7985679B2 (en) * 2005-10-06 2011-07-26 Micron Technology, Inc. Atomic layer deposition methods
US7582562B2 (en) 2005-10-06 2009-09-01 Micron Technology, Inc. Atomic layer deposition methods
US20070082468A1 (en) * 2005-10-06 2007-04-12 Blalock Guy T Atomic layer deposition methods
US20090280639A1 (en) * 2005-10-06 2009-11-12 Micron Technology, Inc. Atomic Layer Deposition Methods
US8163648B2 (en) 2005-10-06 2012-04-24 Micron Technology, Inc. Atomic layer deposition methods
US9032906B2 (en) 2005-11-04 2015-05-19 Applied Materials, Inc. Apparatus and process for plasma-enhanced atomic layer deposition
US7850779B2 (en) 2005-11-04 2010-12-14 Applied Materisals, Inc. Apparatus and process for plasma-enhanced atomic layer deposition
US7682946B2 (en) 2005-11-04 2010-03-23 Applied Materials, Inc. Apparatus and process for plasma-enhanced atomic layer deposition
US7519885B2 (en) 2006-03-31 2009-04-14 Tokyo Electron Limited Monitoring a monolayer deposition (MLD) system using a built-in self test (BIST) table
US20070234953A1 (en) * 2006-03-31 2007-10-11 Tokyo Electron Limited Monitoring a monolayer deposition (mld) system using a built-in self test (bist) table
US20070259285A1 (en) * 2006-03-31 2007-11-08 Tokyo Electron Limited Method for creating a built-in self test (bist) table for monitoring a monolayer deposition (mld) system
US7526699B2 (en) 2006-03-31 2009-04-28 Tokyo Electron Limited Method for creating a built-in self test (BIST) table for monitoring a monolayer deposition (MLD) system
US7798096B2 (en) 2006-05-05 2010-09-21 Applied Materials, Inc. Plasma, UV and ion/neutral assisted ALD or CVD in a batch tool
US7838441B2 (en) 2006-10-09 2010-11-23 Applied Materials, Inc. Deposition and densification process for titanium nitride barrier layers
US20080085611A1 (en) * 2006-10-09 2008-04-10 Amit Khandelwal Deposition and densification process for titanium nitride barrier layers
US8043907B2 (en) 2008-03-31 2011-10-25 Applied Materials, Inc. Atomic layer deposition processes for non-volatile memory devices
US7659158B2 (en) 2008-03-31 2010-02-09 Applied Materials, Inc. Atomic layer deposition processes for non-volatile memory devices
US8491967B2 (en) 2008-09-08 2013-07-23 Applied Materials, Inc. In-situ chamber treatment and deposition process
US9418890B2 (en) 2008-09-08 2016-08-16 Applied Materials, Inc. Method for tuning a deposition rate during an atomic layer deposition process
US8507389B2 (en) 2009-07-17 2013-08-13 Applied Materials, Inc. Methods for forming dielectric layers
US20110039419A1 (en) * 2009-07-17 2011-02-17 Applied Materials, Inc. Methods for forming dielectric layers
US20140175046A1 (en) * 2012-12-20 2014-06-26 Tokyo Electron Limited Method for forming copper wiring
US9101067B2 (en) * 2012-12-20 2015-08-04 Tokyo Electron Limited Method for forming copper wiring
US9368418B2 (en) 2013-08-22 2016-06-14 Tokyo Electron Limited Copper wiring structure forming method

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KR100363088B1 (en) 2002-12-02

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