DE69929496D1 - Struktur für Kupferleitungsverbindungsleitung, die eine metallische Keimschicht umfasst - Google Patents

Struktur für Kupferleitungsverbindungsleitung, die eine metallische Keimschicht umfasst

Info

Publication number
DE69929496D1
DE69929496D1 DE69929496T DE69929496T DE69929496D1 DE 69929496 D1 DE69929496 D1 DE 69929496D1 DE 69929496 T DE69929496 T DE 69929496T DE 69929496 T DE69929496 T DE 69929496T DE 69929496 D1 DE69929496 D1 DE 69929496D1
Authority
DE
Germany
Prior art keywords
seed layer
interconnect structure
copper line
line interconnect
metallic seed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69929496T
Other languages
English (en)
Other versions
DE69929496T2 (de
Inventor
Daniel Charles Edelstein
James Mckell Edwin C O Harper
Chao-Kun Hu
Andrew H Simon
Cyprian Emeka Uzoh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69929496D1 publication Critical patent/DE69929496D1/de
Application granted granted Critical
Publication of DE69929496T2 publication Critical patent/DE69929496T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53233Copper alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69929496T 1998-04-27 1999-03-09 Struktur für Kupferleitungsverbindungsleitung, die eine metallische Keimschicht umfasst Expired - Lifetime DE69929496T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US67851 1998-04-27
US09/067,851 US6181012B1 (en) 1998-04-27 1998-04-27 Copper interconnection structure incorporating a metal seed layer

Publications (2)

Publication Number Publication Date
DE69929496D1 true DE69929496D1 (de) 2006-04-06
DE69929496T2 DE69929496T2 (de) 2006-08-24

Family

ID=22078850

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69929496T Expired - Lifetime DE69929496T2 (de) 1998-04-27 1999-03-09 Struktur für Kupferleitungsverbindungsleitung, die eine metallische Keimschicht umfasst

Country Status (9)

Country Link
US (2) US6181012B1 (de)
EP (1) EP0954027B1 (de)
JP (1) JP3121589B2 (de)
KR (1) KR100339179B1 (de)
CN (1) CN1150619C (de)
DE (1) DE69929496T2 (de)
MY (1) MY126479A (de)
SG (1) SG77224A1 (de)
TW (1) TW418517B (de)

Families Citing this family (205)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6429120B1 (en) 2000-01-18 2002-08-06 Micron Technology, Inc. Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
US6731007B1 (en) * 1997-08-29 2004-05-04 Hitachi, Ltd. Semiconductor integrated circuit device with vertically stacked conductor interconnections
KR100404649B1 (ko) * 1998-02-23 2003-11-10 가부시끼가이샤 히다치 세이사꾸쇼 반도체장치 및 그 제조방법
US6455937B1 (en) 1998-03-20 2002-09-24 James A. Cunningham Arrangement and method for improved downward scaling of higher conductivity metal-based interconnects
US6870263B1 (en) * 1998-03-31 2005-03-22 Infineon Technologies Ag Device interconnection
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
KR100267108B1 (ko) * 1998-09-16 2000-10-02 윤종용 다층배선을구비한반도체소자및그제조방법
US6294836B1 (en) 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
US6359328B1 (en) * 1998-12-31 2002-03-19 Intel Corporation Methods for making interconnects and diffusion barriers in integrated circuits
JP4221100B2 (ja) * 1999-01-13 2009-02-12 エルピーダメモリ株式会社 半導体装置
JP2000216264A (ja) * 1999-01-22 2000-08-04 Mitsubishi Electric Corp Cmos論理回路素子、半導体装置とその製造方法およびその製造方法において用いる半導体回路設計方法
JP2000349085A (ja) * 1999-06-01 2000-12-15 Nec Corp 半導体装置及び半導体装置の製造方法
US6365511B1 (en) * 1999-06-03 2002-04-02 Agere Systems Guardian Corp. Tungsten silicide nitride as a barrier for high temperature anneals to improve hot carrier reliability
US6551872B1 (en) * 1999-07-22 2003-04-22 James A. Cunningham Method for making integrated circuit including interconnects with enhanced electromigration resistance using doped seed layer and integrated circuits produced thereby
US6521532B1 (en) * 1999-07-22 2003-02-18 James A. Cunningham Method for making integrated circuit including interconnects with enhanced electromigration resistance
JP4554011B2 (ja) * 1999-08-10 2010-09-29 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
US7655555B2 (en) * 1999-08-27 2010-02-02 Texas Instruments Incorporated In-situ co-deposition of Si in diffusion barrier material depositions with improved wettability, barrier efficiency, and device reliability
US6441492B1 (en) 1999-09-10 2002-08-27 James A. Cunningham Diffusion barriers for copper interconnect systems
US6432819B1 (en) * 1999-09-27 2002-08-13 Applied Materials, Inc. Method and apparatus of forming a sputtered doped seed layer
US6924226B2 (en) * 1999-10-02 2005-08-02 Uri Cohen Methods for making multiple seed layers for metallic interconnects
US6610151B1 (en) * 1999-10-02 2003-08-26 Uri Cohen Seed layers for interconnects and methods and apparatus for their fabrication
US7105434B2 (en) 1999-10-02 2006-09-12 Uri Cohen Advanced seed layery for metallic interconnects
US6479389B1 (en) * 1999-10-04 2002-11-12 Taiwan Semiconductor Manufacturing Company Method of doping copper metallization
US6727169B1 (en) 1999-10-15 2004-04-27 Asm International, N.V. Method of making conformal lining layers for damascene metallization
JP3925780B2 (ja) * 1999-12-15 2007-06-06 エー・エス・エムジニテックコリア株式会社 触媒及び化学気相蒸着法を用いて銅配線及び薄膜を形成する方法
JP3821624B2 (ja) * 1999-12-17 2006-09-13 シャープ株式会社 半導体装置の製造方法
US7262130B1 (en) * 2000-01-18 2007-08-28 Micron Technology, Inc. Methods for making integrated-circuit wiring from copper, silver, gold, and other metals
US6420262B1 (en) * 2000-01-18 2002-07-16 Micron Technology, Inc. Structures and methods to enhance copper metallization
US6376370B1 (en) * 2000-01-18 2002-04-23 Micron Technology, Inc. Process for providing seed layers for using aluminum, copper, gold and silver metallurgy process for providing seed layers for using aluminum, copper, gold and silver metallurgy
US6503375B1 (en) * 2000-02-11 2003-01-07 Applied Materials, Inc Electroplating apparatus using a perforated phosphorus doped consumable anode
JP4537523B2 (ja) * 2000-02-16 2010-09-01 富士通株式会社 Cu系埋込配線のパルスメッキ方法
TW476134B (en) * 2000-02-22 2002-02-11 Ibm Method for forming dual-layer low dielectric barrier for interconnects and device formed
US6627995B2 (en) * 2000-03-03 2003-09-30 Cvc Products, Inc. Microelectronic interconnect material with adhesion promotion layer and fabrication method
JP2001291720A (ja) * 2000-04-05 2001-10-19 Hitachi Ltd 半導体集積回路装置および半導体集積回路装置の製造方法
US7061111B2 (en) * 2000-04-11 2006-06-13 Micron Technology, Inc. Interconnect structure for use in an integrated circuit
TW503518B (en) * 2000-04-19 2002-09-21 Ibm Interconnect via structure and method
US6797608B1 (en) 2000-06-05 2004-09-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming multilayer diffusion barrier for copper interconnections
KR100404941B1 (ko) * 2000-06-20 2003-11-07 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성방법
JP4425432B2 (ja) * 2000-06-20 2010-03-03 Necエレクトロニクス株式会社 半導体装置の製造方法
US6416812B1 (en) * 2000-06-29 2002-07-09 International Business Machines Corporation Method for depositing copper onto a barrier layer
US6541861B2 (en) * 2000-06-30 2003-04-01 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method including forming step of SOI structure and semiconductor device having SOI structure
US6501180B1 (en) * 2000-07-19 2002-12-31 National Semiconductor Corporation Structure and method for controlling copper diffusion and for utilizing low K materials for copper interconnects in integrated circuit structures
US6368954B1 (en) * 2000-07-28 2002-04-09 Advanced Micro Devices, Inc. Method of copper interconnect formation using atomic layer copper deposition
US6309959B1 (en) * 2000-08-03 2001-10-30 Advanced Micro Devices, Inc. Formation of self-aligned passivation for interconnect to minimize electromigration
US6683002B1 (en) * 2000-08-10 2004-01-27 Chartered Semiconductor Manufacturing Ltd. Method to create a copper diffusion deterrent interface
JP2002075995A (ja) * 2000-08-24 2002-03-15 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US6387806B1 (en) * 2000-09-06 2002-05-14 Advanced Micro Devices, Inc. Filling an interconnect opening with different types of alloys to enhance interconnect reliability
US6444263B1 (en) 2000-09-15 2002-09-03 Cvc Products, Inc. Method of chemical-vapor deposition of a material
JP2002110679A (ja) * 2000-09-29 2002-04-12 Hitachi Ltd 半導体集積回路装置の製造方法
JP3686325B2 (ja) * 2000-10-26 2005-08-24 松下電器産業株式会社 半導体装置及びその製造方法
US6417566B1 (en) * 2000-11-01 2002-07-09 Advanced Micro Devices, Inc. Void eliminating seed layer and conductor core integrated circuit interconnects
US6498397B1 (en) * 2000-11-06 2002-12-24 Advanced Micro Devices, Inc. Seed layer with annealed region for integrated circuit interconnects
US6348732B1 (en) * 2000-11-18 2002-02-19 Advanced Micro Devices, Inc. Amorphized barrier layer for integrated circuit interconnects
US6504251B1 (en) * 2000-11-18 2003-01-07 Advanced Micro Devices, Inc. Heat/cold amorphized barrier layer for integrated circuit interconnects
JP2002164428A (ja) 2000-11-29 2002-06-07 Hitachi Ltd 半導体装置およびその製造方法
US6358848B1 (en) * 2000-11-30 2002-03-19 Advanced Micro Devices, Inc. Method of reducing electromigration in copper lines by forming an interim layer of calcium-doped copper seed layer in a chemical solution and semiconductor device thereby formed
US6291348B1 (en) * 2000-11-30 2001-09-18 Advanced Micro Devices, Inc. Method of forming Cu-Ca-O thin films on Cu surfaces in a chemical solution and semiconductor device thereby formed
US6509262B1 (en) * 2000-11-30 2003-01-21 Advanced Micro Devices, Inc. Method of reducing electromigration in copper lines by calcium-doping copper surfaces in a chemical solution
US6469387B1 (en) * 2000-11-30 2002-10-22 Advanced Micro Devices, Inc. Semiconductor device formed by calcium doping a copper surface using a chemical solution
US6657303B1 (en) * 2000-12-18 2003-12-02 Advanced Micro Devices, Inc. Integrated circuit with low solubility metal-conductor interconnect cap
US6979646B2 (en) * 2000-12-29 2005-12-27 Intel Corporation Hardening of copper to improve copper CMP performance
KR101050377B1 (ko) * 2001-02-12 2011-07-20 에이에스엠 아메리카, 인코포레이티드 반도체 박막 증착을 위한 개선된 공정
US6818545B2 (en) 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
US6528412B1 (en) * 2001-04-30 2003-03-04 Advanced Micro Devices, Inc. Depositing an adhesion skin layer and a conformal seed layer to fill an interconnect opening
JP3530149B2 (ja) * 2001-05-21 2004-05-24 新光電気工業株式会社 配線基板の製造方法及び半導体装置
US6426293B1 (en) 2001-06-01 2002-07-30 Advanced Micro Devices, Inc. Minimizing resistance and electromigration of interconnect by adjusting anneal temperature and amount of seed layer dopant
DE10296935T5 (de) * 2001-06-14 2004-04-22 Mattson Technology Inc., Fremont Barrierenverstärkungsprozess für Kupferdurchkontaktierungen(oder Zwischenverbindungen)
US6506668B1 (en) 2001-06-22 2003-01-14 Advanced Micro Devices, Inc. Utilization of annealing enhanced or repaired seed layer to improve copper interconnect reliability
US6531780B1 (en) * 2001-06-27 2003-03-11 Advanced Micro Devices, Inc. Via formation in integrated circuit interconnects
JP2003051481A (ja) * 2001-08-07 2003-02-21 Hitachi Ltd 半導体集積回路装置の製造方法
EP1418619A4 (de) * 2001-08-13 2010-09-08 Ebara Corp Halbleiterbauelemente und herstellungsverfahren dafür und plattierungslösung
JP2005528776A (ja) * 2001-09-26 2005-09-22 アプライド マテリアルズ インコーポレイテッド バリア層とシード層の一体化
US7049226B2 (en) 2001-09-26 2006-05-23 Applied Materials, Inc. Integration of ALD tantalum nitride for copper metallization
US6936906B2 (en) * 2001-09-26 2005-08-30 Applied Materials, Inc. Integration of barrier layer and seed layer
JP2003115535A (ja) * 2001-10-04 2003-04-18 Hitachi Ltd 半導体集積回路装置
US6916398B2 (en) * 2001-10-26 2005-07-12 Applied Materials, Inc. Gas delivery apparatus and method for atomic layer deposition
DE10154500B4 (de) * 2001-11-07 2004-09-23 Infineon Technologies Ag Verfahren zur Herstellung dünner, strukturierter, metallhaltiger Schichten mit geringem elektrischen Widerstand
US7696092B2 (en) * 2001-11-26 2010-04-13 Globalfoundries Inc. Method of using ternary copper alloy to obtain a low resistance and large grain size interconnect
US6703308B1 (en) 2001-11-26 2004-03-09 Advanced Micro Devices, Inc. Method of inserting alloy elements to reduce copper diffusion and bulk diffusion
US6835655B1 (en) 2001-11-26 2004-12-28 Advanced Micro Devices, Inc. Method of implanting copper barrier material to improve electrical performance
US6703307B2 (en) 2001-11-26 2004-03-09 Advanced Micro Devices, Inc. Method of implantation after copper seed deposition
US6515368B1 (en) * 2001-12-07 2003-02-04 Advanced Micro Devices, Inc. Semiconductor device with copper-filled via includes a copper-zinc/alloy film for reduced electromigration of copper
US6642133B2 (en) 2001-12-20 2003-11-04 Intel Corporation Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering
TW571389B (en) 2001-12-25 2004-01-11 Nec Electronics Corp A copper interconnection and the method for fabricating the same
US6660633B1 (en) * 2002-02-26 2003-12-09 Advanced Micro Devices, Inc. Method of reducing electromigration in a copper line by electroplating an interim copper-zinc alloy thin film on a copper surface and a semiconductor device thereby formed
US6653236B2 (en) * 2002-03-29 2003-11-25 Micron Technology, Inc. Methods of forming metal-containing films over surfaces of semiconductor substrates; and semiconductor constructions
US7341947B2 (en) * 2002-03-29 2008-03-11 Micron Technology, Inc. Methods of forming metal-containing films over surfaces of semiconductor substrates
US6472310B1 (en) * 2002-04-08 2002-10-29 Advanced Micro Devices, Inc. Tin palladium activation with maximized nuclei density and uniformity on barrier material in interconnect structure
JP4052868B2 (ja) * 2002-04-26 2008-02-27 Necエレクトロニクス株式会社 半導体装置の製造方法
US6958290B2 (en) 2002-05-03 2005-10-25 Texas Instruments Incorporated Method and apparatus for improving adhesion between layers in integrated devices
US6861349B1 (en) 2002-05-15 2005-03-01 Advanced Micro Devices, Inc. Method of forming an adhesion layer with an element reactive with a barrier layer
US7186630B2 (en) * 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
TW200406829A (en) * 2002-09-17 2004-05-01 Adv Lcd Tech Dev Ct Co Ltd Interconnect, interconnect forming method, thin film transistor, and display device
US20040061237A1 (en) * 2002-09-26 2004-04-01 Advanced Micro Devices, Inc. Method of reducing voiding in copper interconnects with copper alloys in the seed layer
KR100919378B1 (ko) * 2002-10-28 2009-09-25 매그나칩 반도체 유한회사 반도체 소자의 금속 배선 및 이의 형성 방법
US7880305B2 (en) * 2002-11-07 2011-02-01 International Business Machines Corporation Technology for fabrication of packaging interface substrate wafers with fully metallized vias through the substrate wafer
JP4794802B2 (ja) 2002-11-21 2011-10-19 Jx日鉱日石金属株式会社 銅合金スパッタリングターゲット及び半導体素子配線
US6806192B2 (en) * 2003-01-24 2004-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of barrier-less integration with copper alloy
US6943111B2 (en) * 2003-02-10 2005-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier free copper interconnect by multi-layer copper seed
US7026714B2 (en) * 2003-03-18 2006-04-11 Cunningham James A Copper interconnect systems which use conductive, metal-based cap layers
US7101790B2 (en) * 2003-03-28 2006-09-05 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a robust copper interconnect by dilute metal doping
CN1317755C (zh) * 2003-04-10 2007-05-23 联华电子股份有限公司 制作钨插塞的方法
JP4177192B2 (ja) * 2003-08-05 2008-11-05 株式会社日立ハイテクノロジーズ プラズマエッチング装置およびプラズマエッチング方法
US7220665B2 (en) * 2003-08-05 2007-05-22 Micron Technology, Inc. H2 plasma treatment
US7276801B2 (en) 2003-09-22 2007-10-02 Intel Corporation Designs and methods for conductive bumps
US20050070097A1 (en) * 2003-09-29 2005-03-31 International Business Machines Corporation Atomic laminates for diffusion barrier applications
US7169706B2 (en) * 2003-10-16 2007-01-30 Advanced Micro Devices, Inc. Method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition
US7189292B2 (en) * 2003-10-31 2007-03-13 International Business Machines Corporation Self-encapsulated silver alloys for interconnects
US20050110142A1 (en) * 2003-11-26 2005-05-26 Lane Michael W. Diffusion barriers formed by low temperature deposition
US7573133B2 (en) * 2003-12-09 2009-08-11 Uri Cohen Interconnect structures and methods for their fabrication
US7235487B2 (en) * 2004-05-13 2007-06-26 International Business Machines Corporation Metal seed layer deposition
JP2005019979A (ja) * 2004-05-31 2005-01-20 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
US7709958B2 (en) * 2004-06-18 2010-05-04 Uri Cohen Methods and structures for interconnect passivation
US7119018B2 (en) * 2004-07-09 2006-10-10 International Buisness Machines Corporation Copper conductor
US7327033B2 (en) * 2004-08-05 2008-02-05 International Business Machines Corporation Copper alloy via bottom liner
US20060071338A1 (en) * 2004-09-30 2006-04-06 International Business Machines Corporation Homogeneous Copper Interconnects for BEOL
US7282802B2 (en) * 2004-10-14 2007-10-16 International Business Machines Corporation Modified via bottom structure for reliability enhancement
US7078810B2 (en) * 2004-12-01 2006-07-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and fabrication method thereof
KR101165217B1 (ko) * 2004-12-21 2012-07-17 매그나칩 반도체 유한회사 반도체 소자의 금속 배선 형성 방법
US20060154102A1 (en) * 2005-01-10 2006-07-13 Chih-Yuan Wang Soft thin laminated substrate
KR100641362B1 (ko) * 2005-01-13 2006-10-31 삼성전자주식회사 이중 확산방지막을 갖는 배선구조 및 그 제조방법
US7247946B2 (en) * 2005-01-18 2007-07-24 International Business Machines Corporation On-chip Cu interconnection using 1 to 5 nm thick metal cap
US7816236B2 (en) * 2005-02-04 2010-10-19 Asm America Inc. Selective deposition of silicon-containing films
KR20060089635A (ko) * 2005-02-04 2006-08-09 가부시키가이샤 에키쇼센탄 기쥬쓰 가이하쓰센타 구리 배선층의 형성방법
WO2006095990A1 (en) * 2005-03-11 2006-09-14 Lg Chem, Ltd. An lcd device having a silver capped electrode
US7285496B2 (en) * 2005-04-28 2007-10-23 Intel Corporation Hardening of copper to improve copper CMP performance
US20060251872A1 (en) * 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof
US20070059502A1 (en) * 2005-05-05 2007-03-15 Applied Materials, Inc. Integrated process for sputter deposition of a conductive barrier layer, especially an alloy of ruthenium and tantalum, underlying copper or copper alloy seed layer
US7215006B2 (en) * 2005-10-07 2007-05-08 International Business Machines Corporation Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement
US7301236B2 (en) * 2005-10-18 2007-11-27 International Business Machines Corporation Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via
KR100702797B1 (ko) * 2005-12-09 2007-04-03 동부일렉트로닉스 주식회사 반도체소자의 구리배선막 형성방법
KR20080089403A (ko) * 2005-12-22 2008-10-06 에이에스엠 아메리카, 인코포레이티드 도핑된 반도체 물질들의 에피택시 증착
JP4485466B2 (ja) * 2005-12-27 2010-06-23 株式会社神戸製鋼所 半導体装置の配線用金属薄膜及び半導体装置用配線
KR100717909B1 (ko) * 2006-02-24 2007-05-14 삼성전기주식회사 니켈층을 포함하는 기판 및 이의 제조방법
US7367113B2 (en) * 2006-04-06 2008-05-06 United Microelectronics Corp. Method for fabricating a transformer integrated with a semiconductor structure
CN100454516C (zh) * 2006-04-17 2009-01-21 联华电子股份有限公司 整合于半导体集成电路结构的变压器的制作方法
US8278176B2 (en) * 2006-06-07 2012-10-02 Asm America, Inc. Selective epitaxial formation of semiconductor films
TW200805667A (en) * 2006-07-07 2008-01-16 Au Optronics Corp A display panel structure having a circuit element and a method of manufacture
KR100792358B1 (ko) * 2006-09-29 2008-01-09 주식회사 하이닉스반도체 반도체 소자의 금속배선 및 그 형성방법
DE102007050610A1 (de) * 2006-10-24 2008-05-08 Denso Corp., Kariya Halbleitervorrichtung, Verdrahtung einer Halbleitervorrichtung und Verfahren zum Bilden einer Verdrahtung
JP4896850B2 (ja) * 2006-11-28 2012-03-14 株式会社神戸製鋼所 半導体装置のCu配線およびその製造方法
KR20080061030A (ko) * 2006-12-27 2008-07-02 동부일렉트로닉스 주식회사 반도체 소자의 금속 배선 형성 방법
US20080157375A1 (en) * 2006-12-27 2008-07-03 Dongbu Hitek Co., Ltd. Semiconductor device having a metal interconnection and method of fabricating the same
US20080164613A1 (en) * 2007-01-10 2008-07-10 International Business Machines Corporation ULTRA-THIN Cu ALLOY SEED FOR INTERCONNECT APPLICATION
US20080258304A1 (en) * 2007-04-23 2008-10-23 Denso Corporation Semiconductor device having multiple wiring layers
US8058164B2 (en) * 2007-06-04 2011-11-15 Lam Research Corporation Methods of fabricating electronic devices using direct copper plating
US7759199B2 (en) * 2007-09-19 2010-07-20 Asm America, Inc. Stressor for engineered strain on channel
US7939447B2 (en) * 2007-10-26 2011-05-10 Asm America, Inc. Inhibitors for selective deposition of silicon containing films
JP2009147137A (ja) * 2007-12-14 2009-07-02 Toshiba Corp 半導体装置およびその製造方法
US7642189B2 (en) * 2007-12-18 2010-01-05 Taiwan Semiconductor Manufacturing Company, Ltd. Synergy effect of alloying materials in interconnect structures
US7655543B2 (en) * 2007-12-21 2010-02-02 Asm America, Inc. Separate injection of reactive species in selective formation of films
KR100924865B1 (ko) * 2007-12-27 2009-11-02 주식회사 동부하이텍 반도체 소자의 금속배선 형성방법
US7897514B2 (en) * 2008-01-24 2011-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor contact barrier
US7843063B2 (en) * 2008-02-14 2010-11-30 International Business Machines Corporation Microstructure modification in copper interconnect structure
JP5135002B2 (ja) * 2008-02-28 2013-01-30 ルネサスエレクトロニクス株式会社 半導体装置
KR101433899B1 (ko) * 2008-04-03 2014-08-29 삼성전자주식회사 기판 식각부의 금속층 형성방법 및 이를 이용하여 형성된금속층을 갖는 기판 및 구조물
JP2008252103A (ja) * 2008-04-21 2008-10-16 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
JP2009266999A (ja) * 2008-04-24 2009-11-12 Renesas Technology Corp 半導体装置、およびその製造方法
JP5269533B2 (ja) * 2008-09-26 2013-08-21 三菱マテリアル株式会社 薄膜トランジスター
JP5360959B2 (ja) * 2008-10-24 2013-12-04 三菱マテリアル株式会社 バリア膜とドレイン電極膜およびソース電極膜が高い密着強度を有する薄膜トランジスター
JP4790782B2 (ja) * 2008-11-04 2011-10-12 Jx日鉱日石金属株式会社 銅合金スパッタリングターゲット及び半導体素子配線
US8053861B2 (en) 2009-01-26 2011-11-08 Novellus Systems, Inc. Diffusion barrier layers
US8486191B2 (en) * 2009-04-07 2013-07-16 Asm America, Inc. Substrate reactor with adjustable injectors for mixing gases within reaction chamber
US7951708B2 (en) * 2009-06-03 2011-05-31 International Business Machines Corporation Copper interconnect structure with amorphous tantalum iridium diffusion barrier
KR20120023082A (ko) * 2009-06-12 2012-03-12 가부시키가이샤 알박 전자 장치의 형성 방법, 전자 장치, 반도체 장치 및 트랜지스터
US8336204B2 (en) 2009-07-27 2012-12-25 International Business Machines Corporation Formation of alloy liner by reaction of diffusion barrier and seed layer for interconnect application
JP5463794B2 (ja) * 2009-08-24 2014-04-09 三菱マテリアル株式会社 半導体装置及びその製造方法
JP5463801B2 (ja) * 2009-08-28 2014-04-09 三菱マテリアル株式会社 半導体装置及びその製造方法
US8653663B2 (en) * 2009-10-29 2014-02-18 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier layer for copper interconnect
US8367528B2 (en) 2009-11-17 2013-02-05 Asm America, Inc. Cyclical epitaxial deposition and etch
US9926639B2 (en) * 2010-07-16 2018-03-27 Applied Materials, Inc. Methods for forming barrier/seed layers for copper interconnect structures
US20120141667A1 (en) * 2010-07-16 2012-06-07 Applied Materials, Inc. Methods for forming barrier/seed layers for copper interconnect structures
US8492289B2 (en) 2010-09-15 2013-07-23 International Business Machines Corporation Barrier layer formation for metal interconnects through enhanced impurity diffusion
US8779589B2 (en) 2010-12-20 2014-07-15 Intel Corporation Liner layers for metal interconnects
CN102117796A (zh) * 2011-01-28 2011-07-06 复旦大学 一种集成电路铜互连结构及其制备方法
US8658533B2 (en) 2011-03-10 2014-02-25 International Business Machines Corporation Semiconductor interconnect structure with multi-layered seed layer providing enhanced reliability and minimizing electromigration
US8809170B2 (en) 2011-05-19 2014-08-19 Asm America Inc. High throughput cyclical epitaxial deposition and etch process
WO2012169405A1 (ja) * 2011-06-06 2012-12-13 三菱マテリアル株式会社 電子機器用銅合金、電子機器用銅合金の製造方法、電子機器用銅合金塑性加工材、及び電子機器用部品
CN102437100A (zh) * 2011-09-08 2012-05-02 上海华力微电子有限公司 一种使用双大马士革工艺同时形成铜接触孔和第一层金属的方法
US8648465B2 (en) 2011-09-28 2014-02-11 International Business Machines Corporation Semiconductor interconnect structure having enhanced performance and reliability
CN103094184B (zh) * 2011-10-31 2015-04-01 中芯国际集成电路制造(上海)有限公司 一种铜互连结构的制造方法
JP2013105753A (ja) * 2011-11-10 2013-05-30 Toshiba Corp 半導体装置の製造方法
JP5903842B2 (ja) 2011-11-14 2016-04-13 三菱マテリアル株式会社 銅合金、銅合金塑性加工材及び銅合金塑性加工材の製造方法
US9093164B2 (en) * 2011-11-17 2015-07-28 International Business Machines Corporation Redundant via structure for metal fuse applications
CN102437144A (zh) * 2011-12-06 2012-05-02 西安交通大学 一种Ru-RuO/Ru-Ge-Cu自形成双层非晶扩散阻挡层及其制备方法
CN102437145A (zh) * 2011-12-06 2012-05-02 西安交通大学 一种自形成梯度Zr/ZrN双层扩散阻挡层及其制备方法
US9685404B2 (en) 2012-01-11 2017-06-20 International Business Machines Corporation Back-end electrically programmable fuse
US8497202B1 (en) * 2012-02-21 2013-07-30 International Business Machines Corporation Interconnect structures and methods of manufacturing of interconnect structures
US9548276B2 (en) * 2012-04-18 2017-01-17 Win Semiconductors Corp. Structure of backside copper metallization for semiconductor devices and a fabrication method thereof
US9059176B2 (en) 2012-04-20 2015-06-16 International Business Machines Corporation Copper interconnect with CVD liner and metallic cap
JP5569561B2 (ja) * 2012-06-18 2014-08-13 富士通セミコンダクター株式会社 半導体装置の製造方法
US20140048888A1 (en) 2012-08-17 2014-02-20 Taiwan Semiconductor Manufacturing Company, Ltd. Strained Structure of a Semiconductor Device
US8765602B2 (en) 2012-08-30 2014-07-01 International Business Machines Corporation Doping of copper wiring structures in back end of line processing
CN103681478B (zh) * 2013-12-19 2017-01-11 复旦大学 一种铜互连结构及其制备方法
CN103904025A (zh) * 2014-03-24 2014-07-02 上海华力微电子有限公司 提高金属连线电迁移可靠性的方法
DE102015110437B4 (de) * 2015-06-29 2020-10-08 Infineon Technologies Ag Halbleitervorrichtung mit einer Metallstruktur, die mit einer leitfähigen Struktur elektrisch verbunden ist und Verfahren zur Herstellung
CN106558564B (zh) * 2015-09-29 2019-08-27 稳懋半导体股份有限公司 半导体元件背面铜金属的改良结构
US10510688B2 (en) * 2015-10-26 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Via rail solution for high power electromigration
US9679810B1 (en) 2016-02-11 2017-06-13 Globalfoundries Inc. Integrated circuit having improved electromigration performance and method of forming same
US10461026B2 (en) 2016-06-30 2019-10-29 International Business Machines Corporation Techniques to improve reliability in Cu interconnects using Cu intermetallics
KR101818949B1 (ko) * 2017-03-22 2018-01-17 한창헌 말뚝 경유형 지하수 집수 시설의 시공방법
KR102084579B1 (ko) * 2017-04-27 2020-03-04 한창헌 말뚝 경유형 지하수 집수 시설
US11195748B2 (en) 2017-09-27 2021-12-07 Invensas Corporation Interconnect structures and methods for forming same
KR102586043B1 (ko) 2018-04-10 2023-10-10 삼성디스플레이 주식회사 유기 발광 표시장치 및 그 제조방법
CN111952263B (zh) * 2019-05-16 2022-08-05 上海交通大学 一种微米级单晶铜互连结构及其制备方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5316974A (en) 1988-12-19 1994-05-31 Texas Instruments Incorporated Integrated circuit copper metallization process using a lift-off seed layer and a thick-plated conductor layer
JP2726939B2 (ja) 1989-03-06 1998-03-11 日鉱金属 株式会社 加工性,耐熱性の優れた高導電性銅合金
US5071518A (en) * 1989-10-24 1991-12-10 Microelectronics And Computer Technology Corporation Method of making an electrical multilayer interconnect
DE69322233T2 (de) 1992-08-27 1999-07-08 Toshiba Kawasaki Kk Elektronisches Teil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung
US5354712A (en) 1992-11-12 1994-10-11 Northern Telecom Limited Method for forming interconnect structures for integrated circuits
US5407855A (en) * 1993-06-07 1995-04-18 Motorola, Inc. Process for forming a semiconductor device having a reducing/oxidizing conductive material
JP3337758B2 (ja) * 1993-06-15 2002-10-21 シャープ株式会社 半導体装置の製造方法
JP3512225B2 (ja) * 1994-02-28 2004-03-29 株式会社日立製作所 多層配線基板の製造方法
JP3755539B2 (ja) * 1994-06-20 2006-03-15 富士通株式会社 銅膜の形成方法
JPH0837235A (ja) * 1994-07-22 1996-02-06 Nippon Steel Corp 金属配線形成方法
JPH08186175A (ja) * 1994-12-28 1996-07-16 Sony Corp 半導体装置の配線形成方法及び成膜装置
US5545927A (en) * 1995-05-12 1996-08-13 International Business Machines Corporation Capped copper electrical interconnects
US5549808A (en) 1995-05-12 1996-08-27 International Business Machines Corporation Method for forming capped copper electrical interconnects
KR100232506B1 (ko) * 1995-06-27 1999-12-01 포만 제프리 엘. 전기적 접속을 제공하는 배선 구조 및 도체와 그 도체형성방법
JP3517802B2 (ja) 1995-09-01 2004-04-12 富士通株式会社 埋め込み導電層の形成方法
JPH09283525A (ja) * 1996-04-17 1997-10-31 Sanyo Electric Co Ltd 半導体装置
KR100243286B1 (ko) * 1997-03-05 2000-03-02 윤종용 반도체 장치의 제조방법
US5801100A (en) * 1997-03-07 1998-09-01 Industrial Technology Research Institute Electroless copper plating method for forming integrated circuit structures
TW401634B (en) * 1997-04-09 2000-08-11 Sitron Prec Co Ltd Lead frame and its manufacture method
US6387805B2 (en) * 1997-05-08 2002-05-14 Applied Materials, Inc. Copper alloy seed layer for copper metallization
US5969422A (en) * 1997-05-15 1999-10-19 Advanced Micro Devices, Inc. Plated copper interconnect structure
US5893752A (en) * 1997-12-22 1999-04-13 Motorola, Inc. Process for forming a semiconductor device
US5904565A (en) * 1997-07-17 1999-05-18 Sharp Microelectronics Technology, Inc. Low resistance contact between integrated circuit metal levels and method for same
US5891802A (en) * 1997-07-23 1999-04-06 Advanced Micro Devices, Inc. Method for fabricating a metallization stack structure to improve electromigration resistance and keep low resistivity of ULSI interconnects
US5968333A (en) * 1998-04-07 1999-10-19 Advanced Micro Devices, Inc. Method of electroplating a copper or copper alloy interconnect
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer

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TW418517B (en) 2001-01-11
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JPH11340229A (ja) 1999-12-10
MY126479A (en) 2006-10-31
CN1150619C (zh) 2004-05-19
US6181012B1 (en) 2001-01-30
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JP3121589B2 (ja) 2001-01-09
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