DE69427184T2 - Ein Referenzspannungsgenerator und eine dieselbe verwendende Halbleiterspeicheranordnung - Google Patents

Ein Referenzspannungsgenerator und eine dieselbe verwendende Halbleiterspeicheranordnung

Info

Publication number
DE69427184T2
DE69427184T2 DE69427184T DE69427184T DE69427184T2 DE 69427184 T2 DE69427184 T2 DE 69427184T2 DE 69427184 T DE69427184 T DE 69427184T DE 69427184 T DE69427184 T DE 69427184T DE 69427184 T2 DE69427184 T2 DE 69427184T2
Authority
DE
Germany
Prior art keywords
same
memory device
reference voltage
semiconductor memory
voltage generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69427184T
Other languages
English (en)
Other versions
DE69427184D1 (de
Inventor
Noboyuki Moriwaki
Hiroshige Hirano
George Nakane
Tetsuji Nakakuma
Tatsumi Sumi
Toshio Mukunoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69427184D1 publication Critical patent/DE69427184D1/de
Application granted granted Critical
Publication of DE69427184T2 publication Critical patent/DE69427184T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14Dummy cell management; Sense reference voltage generators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
DE69427184T 1994-03-22 1994-11-23 Ein Referenzspannungsgenerator und eine dieselbe verwendende Halbleiterspeicheranordnung Expired - Lifetime DE69427184T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP05027194A JP3218844B2 (ja) 1994-03-22 1994-03-22 半導体メモリ装置

Publications (2)

Publication Number Publication Date
DE69427184D1 DE69427184D1 (de) 2001-06-13
DE69427184T2 true DE69427184T2 (de) 2001-10-11

Family

ID=12854294

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69427184T Expired - Lifetime DE69427184T2 (de) 1994-03-22 1994-11-23 Ein Referenzspannungsgenerator und eine dieselbe verwendende Halbleiterspeicheranordnung

Country Status (7)

Country Link
US (3) US5828615A (de)
EP (1) EP0674317B1 (de)
JP (1) JP3218844B2 (de)
KR (1) KR100233387B1 (de)
CN (1) CN1129910C (de)
DE (1) DE69427184T2 (de)
TW (1) TW385445B (de)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3218844B2 (ja) * 1994-03-22 2001-10-15 松下電器産業株式会社 半導体メモリ装置
JPH0997496A (ja) * 1995-09-29 1997-04-08 Nec Corp 強誘電体メモリ装置及びデータ読出方法
US5808929A (en) * 1995-12-06 1998-09-15 Sheikholeslami; Ali Nonvolatile content addressable memory
DE69736080T2 (de) * 1996-03-25 2006-10-19 Matsushita Electric Industrial Co., Ltd., Kadoma Ferroelekrische Speicheranordnung
JP3535326B2 (ja) * 1996-10-21 2004-06-07 株式会社日立製作所 強誘電体メモリ
JP3786521B2 (ja) * 1998-07-01 2006-06-14 株式会社日立製作所 半導体集積回路及びデータ処理システム
DE19845124C2 (de) * 1998-09-30 2000-10-26 Siemens Ag Layout für einen Halbleiterspeicher
DE19852570A1 (de) * 1998-11-13 2000-05-25 Siemens Ag Ferroelektrische Speicheranordnung
DE19913109C2 (de) * 1999-03-23 2001-01-25 Siemens Ag Integrierter Speicher mit Speicherzellen und Referenzzellen und entsprechendes Betriebsverfahren
DE19913108A1 (de) * 1999-03-23 2000-10-05 Siemens Ag Integrierter Speicher mit Speicherzellen und Referenzzellen sowie Betriebsverfahren für einen solchen Speicher
US6272049B1 (en) 1999-05-12 2001-08-07 Matsushita Electric Industrial Co., Ltd. Non-volatile semiconductor memory device having increased operating speed
KR100348576B1 (ko) * 1999-09-30 2002-08-13 동부전자 주식회사 강유전체 메모리
JP4299428B2 (ja) * 2000-01-19 2009-07-22 三星電子株式会社 可変容量半導体記憶装置
KR100335133B1 (ko) * 2000-01-28 2002-05-04 박종섭 불휘발성 강유전체 메모리 장치 및 그에 따른 구동방법
JP3775716B2 (ja) * 2000-05-25 2006-05-17 シャープ株式会社 強誘電体型記憶装置およびそのテスト方法
JP4049519B2 (ja) * 2000-07-17 2008-02-20 松下電器産業株式会社 強誘電体記憶装置
EP1332416A2 (de) 2000-09-06 2003-08-06 Infineon Technologies AG Bist für das parallele prüfen von onchip-speicher
JP4450963B2 (ja) * 2000-09-14 2010-04-14 ローム株式会社 半導体記憶装置
KR100379513B1 (ko) * 2000-10-24 2003-04-10 주식회사 하이닉스반도체 불휘발성 강유전체 메모리 장치 및 그의 구동방법
JP4405094B2 (ja) * 2001-01-29 2010-01-27 Okiセミコンダクタ株式会社 強誘電体メモリ
US6385109B1 (en) * 2001-01-30 2002-05-07 Motorola, Inc. Reference voltage generator for MRAM and method
KR100432879B1 (ko) * 2001-03-05 2004-05-22 삼성전자주식회사 강유전체 랜덤 액세스 메모리 장치의 데이터 감지 방법
US6545904B2 (en) * 2001-03-16 2003-04-08 Micron Technology, Inc. 6f2 dram array, a dram array formed on a semiconductive substrate, a method of forming memory cells in a 6f2 dram array and a method of isolating a single row of memory cells in a 6f2 dram array
US6411555B1 (en) 2001-03-19 2002-06-25 Micron Technology, Inc. Reference charge generator, a method for providing a reference charge from a reference charge generator, a method of operating a reference charge generator and a dram memory circuit formed using memory cells having an area of 6f2
US6456521B1 (en) * 2001-03-21 2002-09-24 International Business Machines Corporation Hierarchical bitline DRAM architecture system
JP4659307B2 (ja) * 2001-09-28 2011-03-30 Okiセミコンダクタ株式会社 強誘電体メモリ
US6853597B2 (en) * 2001-10-03 2005-02-08 Infineon Technologies Aktiengesellschaft Integrated circuits with parallel self-testing
KR100410988B1 (ko) * 2001-11-15 2003-12-18 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 비트 라인 센싱 방법
JP3796457B2 (ja) * 2002-02-28 2006-07-12 富士通株式会社 不揮発性半導体記憶装置
US6809949B2 (en) * 2002-05-06 2004-10-26 Symetrix Corporation Ferroelectric memory
JP2004022073A (ja) * 2002-06-17 2004-01-22 Elpida Memory Inc 半導体記憶装置
US6721217B2 (en) * 2002-06-27 2004-04-13 Texas Instruments Incorporated Method for memory sensing
JP4146680B2 (ja) 2002-07-18 2008-09-10 松下電器産業株式会社 強誘電体記憶装置及びその読み出し方法
KR100500944B1 (ko) * 2002-12-11 2005-07-14 주식회사 하이닉스반도체 전류 이득 트랜지스터의 크기 조절을 통해 기준 전압을생성하는 강유전체 메모리 장치
JP3751602B2 (ja) * 2003-04-15 2006-03-01 沖電気工業株式会社 メモリ回路及びデータ読み出し方法
KR100492781B1 (ko) * 2003-05-23 2005-06-07 주식회사 하이닉스반도체 멀티비트 제어 기능을 갖는 불휘발성 강유전체 메모리 장치
JP2004362720A (ja) * 2003-06-09 2004-12-24 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP4074279B2 (ja) * 2003-09-22 2008-04-09 株式会社東芝 半導体集積回路装置、デジタルカメラ、デジタルビデオカメラ、コンピュータシステム、携帯コンピュータシステム、論理可変lsi装置、icカード、ナビゲーションシステム、ロボット、画像表示装置、光ディスク記憶装置
US7269048B2 (en) 2003-09-22 2007-09-11 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
JP4672702B2 (ja) * 2003-09-22 2011-04-20 株式会社東芝 半導体集積回路装置
JP2005235366A (ja) * 2004-01-20 2005-09-02 Matsushita Electric Ind Co Ltd 強誘電体記憶装置
KR100568866B1 (ko) * 2004-02-09 2006-04-10 삼성전자주식회사 강유전체 메모리에서 기준전압 발생장치 및 그에 따른구동방법
US7221605B2 (en) * 2004-08-31 2007-05-22 Micron Technology, Inc. Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
US7236415B2 (en) * 2004-09-01 2007-06-26 Micron Technology, Inc. Sample and hold memory sense amplifier
KR100669548B1 (ko) * 2004-11-17 2007-01-15 주식회사 하이닉스반도체 불휘발성 강유전체 메모리
JP4647313B2 (ja) * 2005-01-06 2011-03-09 富士通セミコンダクター株式会社 半導体メモリ
US7471569B2 (en) * 2005-06-15 2008-12-30 Infineon Technologies Ag Memory having parity error correction
US7342819B2 (en) * 2006-03-03 2008-03-11 Infineon Technologies Ag Methods for generating a reference voltage and for reading a memory cell and circuit configurations implementing the methods
KR102630180B1 (ko) * 2016-02-22 2024-01-26 삼성전자주식회사 수직형 메모리 장치의 레이아웃 검증 방법
US10170182B2 (en) * 2016-03-16 2019-01-01 Imec Vzw Resistance change memory device configured for state evaluation based on reference cells
US10163480B1 (en) * 2017-07-27 2018-12-25 Micron Technology, Inc. Periphery fill and localized capacitance
US10032496B1 (en) 2017-07-27 2018-07-24 Micron Technology, Inc. Variable filter capacitance

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4363111A (en) * 1980-10-06 1982-12-07 Heightley John D Dummy cell arrangement for an MOS memory
JPS61158095A (ja) * 1984-12-28 1986-07-17 Toshiba Corp ダイナミツク型メモリのビツト線プリチヤ−ジ回路
CA1233565A (en) * 1985-05-28 1988-03-01 Robert A. Penchuk Dynamic mos memory reference voltage generator
JPH01119984A (ja) * 1987-10-31 1989-05-12 Toshiba Corp ダイナミック型半導体メモリ
JPH01171195A (ja) * 1987-12-25 1989-07-06 Sony Corp メモリ装置
JPH0713877B2 (ja) * 1988-10-19 1995-02-15 株式会社東芝 半導体メモリ
KR930002470B1 (ko) * 1989-03-28 1993-04-02 가부시키가이샤 도시바 전기적인 독출/기록동작이 가능한 불휘발성 반도체기억장치 및 그 정보독출방법
US5218566A (en) * 1991-08-15 1993-06-08 National Semiconductor Corporation Dynamic adjusting reference voltage for ferroelectric circuits
KR970000870B1 (ko) * 1992-12-02 1997-01-20 마쯔시다덴기산교 가부시기가이샤 반도체메모리장치
JP3278981B2 (ja) * 1993-06-23 2002-04-30 株式会社日立製作所 半導体メモリ
JP3218844B2 (ja) * 1994-03-22 2001-10-15 松下電器産業株式会社 半導体メモリ装置

Also Published As

Publication number Publication date
US5953277A (en) 1999-09-14
KR950027821A (ko) 1995-10-18
EP0674317B1 (de) 2001-05-09
EP0674317A2 (de) 1995-09-27
DE69427184D1 (de) 2001-06-13
CN1117643A (zh) 1996-02-28
US6067265A (en) 2000-05-23
EP0674317A3 (de) 1996-04-17
TW385445B (en) 2000-03-21
CN1129910C (zh) 2003-12-03
JPH07262768A (ja) 1995-10-13
JP3218844B2 (ja) 2001-10-15
US5828615A (en) 1998-10-27
KR100233387B1 (ko) 1999-12-01

Similar Documents

Publication Publication Date Title
DE69427184T2 (de) Ein Referenzspannungsgenerator und eine dieselbe verwendende Halbleiterspeicheranordnung
DE69419469T2 (de) Halbleiterbauelement und Halbleiterspeichervorrichtung
DE69510834D1 (de) Halbleiterspeicheranordnung
DE69521159D1 (de) Halbleiterspeicheranordnung
DE69422901T2 (de) Halbleiterspeicheranordnung
EP0449310A3 (en) On-chip voltage regulator and semiconductor memory device using the same
DE69517142D1 (de) Ferroelektrische Speicheranordnung
DE69725327D1 (de) Eine stimulationsvorrichtung
DE69512700D1 (de) Halbleiterspeicheranordnung
DE69534979D1 (de) Aufladeelement und Aufladevorrichtung
KR960012510A (ko) 반도체 메모리 장치
DE69518813D1 (de) Eine Referenzspannungsschaltung
DE69430944D1 (de) Halbleiterspeicheranordnung
DE69421108D1 (de) Halbleiterspeicheranordnung und Speicher-Initialisierungsverfahren
DE69421480T2 (de) Halbleiterspeicheranordnung und Betriebsverfahren dafür
DE69521066D1 (de) Halbleiterspeicheranordnung
DE69510126D1 (de) Prüfbare Speicheranordnung
DE69029791T2 (de) Nichtflüchtige Speicheranordnung und Betriebsverfahren
DE69224136T2 (de) Spannungsgeneratoreinrichtung
KR960011705A (ko) 반도체 메모리 장치
DE69731802D1 (de) Halbleiter-Speicherbauteil
DE69601197D1 (de) Programmierbarer Transistorenspannungsreferenzgenerator
DE9400903U1 (de) Spannungsprüfungseinrichtung
DE29610335U1 (de) Multifunktionaler Ozon- und Anionen-Generator
FI961853A (fi) Puolijohdemuistilaite

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP

8320 Willingness to grant licences declared (paragraph 23)