DE60336237D1 - Verfahren zur herstellung von finfet-bauelementen aus bulk-halbleiter - Google Patents

Verfahren zur herstellung von finfet-bauelementen aus bulk-halbleiter

Info

Publication number
DE60336237D1
DE60336237D1 DE60336237T DE60336237T DE60336237D1 DE 60336237 D1 DE60336237 D1 DE 60336237D1 DE 60336237 T DE60336237 T DE 60336237T DE 60336237 T DE60336237 T DE 60336237T DE 60336237 D1 DE60336237 D1 DE 60336237D1
Authority
DE
Germany
Prior art keywords
bulk semiconductor
device structure
bulk
ability
provides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60336237T
Other languages
English (en)
Inventor
David M Fried
Edward J Nowak
Beth Ann Rainey
Devendra K Sadana
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE60336237D1 publication Critical patent/DE60336237D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/7851—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with the body tied to the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/66818—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET the channel being thinned after patterning, e.g. sacrificial oxidation on fin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/7853—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET the body having a non-rectangular crossection
DE60336237T 2002-06-03 2003-06-03 Verfahren zur herstellung von finfet-bauelementen aus bulk-halbleiter Expired - Lifetime DE60336237D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/063,994 US6642090B1 (en) 2002-06-03 2002-06-03 Fin FET devices from bulk semiconductor and method for forming
PCT/US2003/017269 WO2003103019A2 (en) 2002-06-03 2003-06-03 Fin fet devices from bulk semiconductor and method for forming

Publications (1)

Publication Number Publication Date
DE60336237D1 true DE60336237D1 (de) 2011-04-14

Family

ID=29268594

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60336237T Expired - Lifetime DE60336237D1 (de) 2002-06-03 2003-06-03 Verfahren zur herstellung von finfet-bauelementen aus bulk-halbleiter

Country Status (11)

Country Link
US (1) US6642090B1 (de)
EP (1) EP1532659B1 (de)
JP (1) JP4425130B2 (de)
KR (1) KR100702553B1 (de)
CN (1) CN1296991C (de)
AT (1) ATE500610T1 (de)
AU (1) AU2003237320A1 (de)
DE (1) DE60336237D1 (de)
IL (1) IL165546A0 (de)
TW (1) TWI235457B (de)
WO (1) WO2003103019A2 (de)

Families Citing this family (247)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6657259B2 (en) * 2001-12-04 2003-12-02 International Business Machines Corporation Multiple-plane FinFET CMOS
US6815268B1 (en) * 2002-11-22 2004-11-09 Advanced Micro Devices, Inc. Method for forming a gate in a FinFET device
US6720619B1 (en) * 2002-12-13 2004-04-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator chip incorporating partially-depleted, fully-depleted, and multiple-gate devices
US7087499B2 (en) * 2002-12-20 2006-08-08 International Business Machines Corporation Integrated antifuse structure for FINFET and CMOS devices
US6762483B1 (en) * 2003-01-23 2004-07-13 Advanced Micro Devices, Inc. Narrow fin FinFET
US6855606B2 (en) * 2003-02-20 2005-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor nano-rod devices
US6787854B1 (en) * 2003-03-12 2004-09-07 Advanced Micro Devices, Inc. Method for forming a fin in a finFET device
US7074656B2 (en) * 2003-04-29 2006-07-11 Taiwan Semiconductor Manufacturing Company, Ltd. Doping of semiconductor fin devices
US6872647B1 (en) * 2003-05-06 2005-03-29 Advanced Micro Devices, Inc. Method for forming multiple fins in a semiconductor device
US6756643B1 (en) 2003-06-12 2004-06-29 Advanced Micro Devices, Inc. Dual silicon layer for chemical mechanical polishing planarization
US7005330B2 (en) * 2003-06-27 2006-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for forming the gate electrode in a multiple-gate transistor
US7456476B2 (en) 2003-06-27 2008-11-25 Intel Corporation Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
US6909151B2 (en) 2003-06-27 2005-06-21 Intel Corporation Nonplanar device with stress incorporation layer and method of fabrication
KR100521382B1 (ko) * 2003-06-30 2005-10-12 삼성전자주식회사 핀 전계효과 트랜지스터 제조 방법
US6812119B1 (en) * 2003-07-08 2004-11-02 Advanced Micro Devices, Inc. Narrow fins by oxidation in double-gate finfet
US7078742B2 (en) 2003-07-25 2006-07-18 Taiwan Semiconductor Manufacturing Co., Ltd. Strained-channel semiconductor structure and method of fabricating the same
US7301206B2 (en) * 2003-08-01 2007-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
US6787476B1 (en) * 2003-08-04 2004-09-07 Advanced Micro Devices, Inc. Etch stop layer for etching FinFET gate over a large topography
US7714384B2 (en) * 2003-09-15 2010-05-11 Seliskar John J Castellated gate MOSFET device capable of fully-depleted operation
KR100555518B1 (ko) * 2003-09-16 2006-03-03 삼성전자주식회사 이중 게이트 전계 효과 트랜지스터 및 그 제조방법
US6970373B2 (en) * 2003-10-02 2005-11-29 Intel Corporation Method and apparatus for improving stability of a 6T CMOS SRAM cell
JP3863516B2 (ja) * 2003-10-03 2006-12-27 株式会社東芝 半導体装置及びその製造方法
DE10348007B4 (de) * 2003-10-15 2008-04-17 Infineon Technologies Ag Verfahren zum Strukturieren und Feldeffekttransistoren
US7888201B2 (en) * 2003-11-04 2011-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
US7029958B2 (en) * 2003-11-04 2006-04-18 Advanced Micro Devices, Inc. Self aligned damascene gate
US7091566B2 (en) * 2003-11-20 2006-08-15 International Business Machines Corp. Dual gate FinFet
KR100585111B1 (ko) * 2003-11-24 2006-06-01 삼성전자주식회사 게르마늄 채널 영역을 가지는 비평면 트랜지스터 및 그제조 방법
KR100518602B1 (ko) * 2003-12-03 2005-10-04 삼성전자주식회사 돌출된 형태의 채널을 갖는 모스 트랜지스터 및 그 제조방법
US6967175B1 (en) * 2003-12-04 2005-11-22 Advanced Micro Devices, Inc. Damascene gate semiconductor processing with local thinning of channel region
US7018551B2 (en) * 2003-12-09 2006-03-28 International Business Machines Corporation Pull-back method of forming fins in FinFets
KR100513405B1 (ko) * 2003-12-16 2005-09-09 삼성전자주식회사 핀 트랜지스터의 형성 방법
US7186599B2 (en) * 2004-01-12 2007-03-06 Advanced Micro Devices, Inc. Narrow-body damascene tri-gate FinFET
US7385247B2 (en) * 2004-01-17 2008-06-10 Samsung Electronics Co., Ltd. At least penta-sided-channel type of FinFET transistor
KR100587672B1 (ko) 2004-02-02 2006-06-08 삼성전자주식회사 다마신 공법을 이용한 핀 트랜지스터 형성방법
KR100526887B1 (ko) * 2004-02-10 2005-11-09 삼성전자주식회사 전계효과 트랜지스터 및 그의 제조방법
KR100526889B1 (ko) * 2004-02-10 2005-11-09 삼성전자주식회사 핀 트랜지스터 구조
KR100610496B1 (ko) * 2004-02-13 2006-08-09 삼성전자주식회사 채널용 핀 구조를 가지는 전계효과 트랜지스터 소자 및 그제조방법
KR100585131B1 (ko) 2004-02-20 2006-06-01 삼성전자주식회사 반도체 소자 및 그 제조 방법
EP1566844A3 (de) * 2004-02-20 2006-04-05 Samsung Electronics Co., Ltd. Mehrfach-Steuerelektroden Transistor und dessen Herstellungsmethode
KR100577565B1 (ko) * 2004-02-23 2006-05-08 삼성전자주식회사 핀 전계효과 트랜지스터의 제조방법
US7060539B2 (en) * 2004-03-01 2006-06-13 International Business Machines Corporation Method of manufacture of FinFET devices with T-shaped fins and devices manufactured thereby
KR100532204B1 (ko) * 2004-03-04 2005-11-29 삼성전자주식회사 핀형 트랜지스터 및 이의 제조 방법
KR100584776B1 (ko) * 2004-03-05 2006-05-29 삼성전자주식회사 반도체 장치의 액티브 구조물 형성 방법, 소자 분리 방법및 트랜지스터 형성 방법
US7087471B2 (en) * 2004-03-15 2006-08-08 International Business Machines Corporation Locally thinned fins
US7701018B2 (en) * 2004-03-19 2010-04-20 Nec Corporation Semiconductor device and method for manufacturing same
US7154118B2 (en) 2004-03-31 2006-12-26 Intel Corporation Bulk non-planar transistor having strained enhanced mobility and methods of fabrication
US7262084B2 (en) 2004-04-15 2007-08-28 International Business Machines Corporation Methods for manufacturing a finFET using a conventional wafer and apparatus manufactured therefrom
US7098477B2 (en) * 2004-04-23 2006-08-29 International Business Machines Corporation Structure and method of manufacturing a finFET device having stacked fins
US7564105B2 (en) * 2004-04-24 2009-07-21 Taiwan Semiconductor Manufacturing Co., Ltd. Quasi-plannar and FinFET-like transistors on bulk silicon
KR100642632B1 (ko) 2004-04-27 2006-11-10 삼성전자주식회사 반도체소자의 제조방법들 및 그에 의해 제조된 반도체소자들
US7056773B2 (en) * 2004-04-28 2006-06-06 International Business Machines Corporation Backgated FinFET having different oxide thicknesses
US7084018B1 (en) * 2004-05-05 2006-08-01 Advanced Micro Devices, Inc. Sacrificial oxide for minimizing box undercut in damascene FinFET
KR20050108916A (ko) * 2004-05-14 2005-11-17 삼성전자주식회사 다마신 공정을 이용한 핀 전계 효과 트랜지스터의 형성 방법
KR100618827B1 (ko) * 2004-05-17 2006-09-08 삼성전자주식회사 ＦｉｎＦＥＴ을 포함하는 반도체 소자 및 그 제조방법
DE102005022306B4 (de) * 2004-05-17 2009-12-31 Samsung Electronics Co., Ltd., Suwon Verfahren zum Herstellen einer Halbleitervorrichtung mit einem Fin-Feldeffekttransistor (FinFET)
KR100625175B1 (ko) * 2004-05-25 2006-09-20 삼성전자주식회사 채널층을 갖는 반도체 장치 및 이를 제조하는 방법
US7579280B2 (en) 2004-06-01 2009-08-25 Intel Corporation Method of patterning a film
US7452778B2 (en) * 2004-06-10 2008-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor nano-wire devices and methods of fabrication
JP4675585B2 (ja) * 2004-06-22 2011-04-27 シャープ株式会社 電界効果トランジスタ
US6960509B1 (en) * 2004-06-30 2005-11-01 Freescale Semiconductor, Inc. Method of fabricating three dimensional gate structure using oxygen diffusion
US7042009B2 (en) 2004-06-30 2006-05-09 Intel Corporation High mobility tri-gate devices and methods of fabrication
KR100545863B1 (ko) * 2004-07-30 2006-01-24 삼성전자주식회사 핀 구조물을 갖는 반도체 장치 및 이를 제조하는 방법
US7348284B2 (en) 2004-08-10 2008-03-25 Intel Corporation Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow
US7253493B2 (en) * 2004-08-24 2007-08-07 Micron Technology, Inc. High density access transistor having increased channel width and methods of fabricating such devices
US7422946B2 (en) 2004-09-29 2008-09-09 Intel Corporation Independently accessed double-gate and tri-gate transistors in same process flow
US7332439B2 (en) 2004-09-29 2008-02-19 Intel Corporation Metal gate transistors with epitaxial source and drain regions
US7361958B2 (en) 2004-09-30 2008-04-22 Intel Corporation Nonplanar transistors with metal gate electrodes
US6947275B1 (en) 2004-10-18 2005-09-20 International Business Machines Corporation Fin capacitor
US7611943B2 (en) * 2004-10-20 2009-11-03 Texas Instruments Incorporated Transistors, integrated circuits, systems, and processes of manufacture with improved work function modulation
US20060086977A1 (en) 2004-10-25 2006-04-27 Uday Shah Nonplanar device with thinned lower body portion and method of fabrication
TWI277210B (en) * 2004-10-26 2007-03-21 Nanya Technology Corp FinFET transistor process
KR100672826B1 (ko) * 2004-12-03 2007-01-22 삼성전자주식회사 핀 전계 효과 트랜지스터 및 그 제조방법
KR100614800B1 (ko) * 2004-12-10 2006-08-22 삼성전자주식회사 복수개의 돌출된 채널을 갖는 트랜지스터의 제조 방법
WO2006070310A1 (en) * 2004-12-28 2006-07-06 Koninklijke Philips Electronics N.V. Method for the manufacture of a semiconductor device and a semiconductor device obtained through it
US7183142B2 (en) * 2005-01-13 2007-02-27 International Business Machines Corporation FinFETs with long gate length at high density
DE102005007822B4 (de) * 2005-02-21 2014-05-22 Infineon Technologies Ag Integrierte Schaltungsanordnung mit Tunnel-Feldeffekttransistor
US7518196B2 (en) 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US7288805B2 (en) * 2005-02-24 2007-10-30 International Business Machines Corporation Double gate isolation
US20060202266A1 (en) 2005-03-14 2006-09-14 Marko Radosavljevic Field effect transistor with metal source/drain regions
US20060214233A1 (en) * 2005-03-22 2006-09-28 Ananthanarayanan Hari P FinFET semiconductor device
US7101763B1 (en) 2005-05-17 2006-09-05 International Business Machines Corporation Low capacitance junction-isolation for bulk FinFET technology
US7858481B2 (en) 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US7268397B2 (en) * 2005-06-21 2007-09-11 International Business Machines Corporation Thermal dissipation structures for finfets
US7547637B2 (en) 2005-06-21 2009-06-16 Intel Corporation Methods for patterning a semiconductor film
KR100728957B1 (ko) * 2005-06-30 2007-06-15 주식회사 하이닉스반도체 돌기형 트랜지스터 제조방법
US7279375B2 (en) 2005-06-30 2007-10-09 Intel Corporation Block contact architectures for nanoscale channel transistors
US7190050B2 (en) * 2005-07-01 2007-03-13 Synopsys, Inc. Integrated circuit on corrugated substrate
US7288802B2 (en) * 2005-07-27 2007-10-30 International Business Machines Corporation Virtual body-contacted trigate
US7381649B2 (en) 2005-07-29 2008-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Structure for a multiple-gate FET device and a method for its fabrication
US7402875B2 (en) 2005-08-17 2008-07-22 Intel Corporation Lateral undercut of metal gate in SOI device
US7352034B2 (en) * 2005-08-25 2008-04-01 International Business Machines Corporation Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures
US7268379B2 (en) * 2005-09-05 2007-09-11 Macronix International Co., Ltd Memory cell and method for manufacturing the same
US7381655B2 (en) * 2005-09-14 2008-06-03 International Business Machines Corporation Mandrel/trim alignment in SIT processing
US20070090416A1 (en) 2005-09-28 2007-04-26 Doyle Brian S CMOS devices with a single work function gate electrode and method of fabrication
US7479421B2 (en) 2005-09-28 2009-01-20 Intel Corporation Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
US20070102756A1 (en) * 2005-11-10 2007-05-10 Bohumil Lojek FinFET transistor fabricated in bulk semiconducting material
US7547947B2 (en) * 2005-11-15 2009-06-16 International Business Machines Corporation SRAM cell
US7485503B2 (en) 2005-11-30 2009-02-03 Intel Corporation Dielectric interface for group III-V semiconductor device
US7402856B2 (en) * 2005-12-09 2008-07-22 Intel Corporation Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same
US7439588B2 (en) * 2005-12-13 2008-10-21 Intel Corporation Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
KR100763330B1 (ko) * 2005-12-14 2007-10-04 삼성전자주식회사 활성 핀들을 정의하는 소자분리 방법, 이를 이용하는반도체소자의 제조방법 및 이에 의해 제조된 반도체소자
US7512017B2 (en) * 2005-12-21 2009-03-31 Intel Corporation Integration of planar and tri-gate devices on the same substrate
US7396711B2 (en) 2005-12-27 2008-07-08 Intel Corporation Method of fabricating a multi-cornered film
US7525160B2 (en) 2005-12-27 2009-04-28 Intel Corporation Multigate device with recessed strain regions
US20070148926A1 (en) * 2005-12-28 2007-06-28 Intel Corporation Dual halo implant for improving short channel effect in three-dimensional tri-gate transistors
US7410844B2 (en) * 2006-01-17 2008-08-12 International Business Machines Corporation Device fabrication by anisotropic wet etch
US7264743B2 (en) * 2006-01-23 2007-09-04 Lam Research Corporation Fin structure formation
KR20070090375A (ko) * 2006-03-02 2007-09-06 삼성전자주식회사 비휘발성 메모리 장치 및 그 형성 방법
US20070235763A1 (en) * 2006-03-29 2007-10-11 Doyle Brian S Substrate band gap engineered multi-gate pMOS devices
US7407847B2 (en) * 2006-03-31 2008-08-05 Intel Corporation Stacked multi-gate transistor design and method of fabrication
US7425500B2 (en) 2006-03-31 2008-09-16 Intel Corporation Uniform silicide metal on epitaxially grown source and drain regions of three-dimensional transistors
US7449373B2 (en) 2006-03-31 2008-11-11 Intel Corporation Method of ion implanting for tri-gate devices
US7291564B1 (en) * 2006-04-28 2007-11-06 Hewlett-Packard Development Company, L.P. Method and structure for facilitating etching
US7422960B2 (en) 2006-05-17 2008-09-09 Micron Technology, Inc. Method of forming gate arrays on a partial SOI substrate
US7494933B2 (en) * 2006-06-16 2009-02-24 Synopsys, Inc. Method for achieving uniform etch depth using ion implantation and a timed etch
US8143646B2 (en) 2006-08-02 2012-03-27 Intel Corporation Stacking fault and twin blocking barrier for integrating III-V on Si
US7537994B2 (en) 2006-08-28 2009-05-26 Micron Technology, Inc. Methods of forming semiconductor devices, assemblies and constructions
US20080054361A1 (en) * 2006-08-30 2008-03-06 Infineon Technologies Ag Method and apparatus for reducing flicker noise in a semiconductor device
US7435683B2 (en) * 2006-09-15 2008-10-14 Intel Corporation Apparatus and method for selectively recessing spacers on multi-gate devices
US20080097346A1 (en) * 2006-09-19 2008-04-24 Alcon, Inc. Trocar cannula
US7700470B2 (en) 2006-09-22 2010-04-20 Intel Corporation Selective anisotropic wet etching of workfunction metal for semiconductor devices
KR100838378B1 (ko) * 2006-09-29 2008-06-13 주식회사 하이닉스반도체 핀트랜지스터의 제조 방법
KR100761354B1 (ko) * 2006-10-02 2007-09-27 주식회사 하이닉스반도체 다면채널을 갖는 반도체소자의 듀얼폴리게이트 및 그의형성 방법
US8772858B2 (en) 2006-10-11 2014-07-08 Macronix International Co., Ltd. Vertical channel memory and manufacturing method thereof and operating method using the same
US7811890B2 (en) * 2006-10-11 2010-10-12 Macronix International Co., Ltd. Vertical channel transistor structure and manufacturing method thereof
US7851848B2 (en) * 2006-11-01 2010-12-14 Macronix International Co., Ltd. Cylindrical channel charge trapping devices with effectively high coupling ratios
US7939403B2 (en) * 2006-11-17 2011-05-10 Micron Technology, Inc. Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells
US7772048B2 (en) * 2007-02-23 2010-08-10 Freescale Semiconductor, Inc. Forming semiconductor fins using a sacrificial fin
US7612405B2 (en) * 2007-03-06 2009-11-03 Taiwan Semiconductor Manufacturing Company, Ltd. Fabrication of FinFETs with multiple fin heights
KR100861211B1 (ko) * 2007-04-12 2008-09-30 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
US7560785B2 (en) * 2007-04-27 2009-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having multiple fin heights
US7838923B2 (en) * 2007-08-09 2010-11-23 Macronix International Co., Ltd. Lateral pocket implant charge trapping devices
US20090057846A1 (en) * 2007-08-30 2009-03-05 Doyle Brian S Method to fabricate adjacent silicon fins of differing heights
WO2009044236A1 (en) * 2007-10-03 2009-04-09 Freescale Semiconductor, Inc. Method of forming an inverted t shaped channel structure for an inverted t channel field effect transistor device
US20090124097A1 (en) * 2007-11-09 2009-05-14 International Business Machines Corporation Method of forming narrow fins in finfet devices with reduced spacing therebetween
US20090256207A1 (en) * 2008-04-14 2009-10-15 International Business Machines Corporation Finfet devices from bulk semiconductor and methods for manufacturing the same
US8362566B2 (en) 2008-06-23 2013-01-29 Intel Corporation Stress in trigate devices using complimentary gate fill materials
JP2012501545A (ja) * 2008-08-28 2012-01-19 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド ３次元マルチゲートｍｏｓｆｅｔの製造に有用であるバルクシリコンウェハー製品
US20100155801A1 (en) * 2008-12-22 2010-06-24 Doyle Brian S Integrated circuit, 1T-1C embedded memory cell containing same, and method of manufacturing 1T-1C memory cell for embedded memory application
US7999298B2 (en) * 2008-12-30 2011-08-16 Intel Corporation Embedded memory cell and method of manufacturing same
US8860124B2 (en) * 2009-01-15 2014-10-14 Macronix International Co., Ltd. Depletion-mode charge-trapping flash device
US8305829B2 (en) * 2009-02-23 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Memory power gating circuit for controlling internal voltage of a memory array, system and method for controlling the same
US8305790B2 (en) * 2009-03-16 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical anti-fuse and related applications
US7871873B2 (en) * 2009-03-27 2011-01-18 Global Foundries Inc. Method of forming fin structures using a sacrificial etch stop layer on bulk semiconductor material
US8957482B2 (en) * 2009-03-31 2015-02-17 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical fuse and related applications
US8912602B2 (en) * 2009-04-14 2014-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and methods for forming the same
US7855105B1 (en) * 2009-06-18 2010-12-21 International Business Machines Corporation Planar and non-planar CMOS devices with multiple tuned threshold voltages
US8461015B2 (en) * 2009-07-08 2013-06-11 Taiwan Semiconductor Manufacturing Company, Ltd. STI structure and method of forming bottom void in same
US8105901B2 (en) * 2009-07-27 2012-01-31 International Business Machines Corporation Method for double pattern density
US8629478B2 (en) * 2009-07-31 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fin structure for high mobility multiple-gate transistor
US9484462B2 (en) 2009-09-24 2016-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Fin structure of fin field effect transistor
US8980719B2 (en) 2010-04-28 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for doping fin field-effect transistors
US8482073B2 (en) * 2010-03-25 2013-07-09 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit including FINFETs and methods for forming the same
US8187928B2 (en) 2010-09-21 2012-05-29 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming integrated circuits
US8440517B2 (en) 2010-10-13 2013-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET and method of fabricating the same
US8264032B2 (en) * 2009-09-01 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Accumulation type FinFET, circuits and fabrication method thereof
US8623728B2 (en) * 2009-07-28 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming high germanium concentration SiGe stressor
US8264021B2 (en) * 2009-10-01 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Finfets and methods for forming the same
US8298925B2 (en) 2010-11-08 2012-10-30 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming ultra shallow junction
US8497528B2 (en) 2010-05-06 2013-07-30 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating a strained structure
US8472227B2 (en) * 2010-01-27 2013-06-25 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits and methods for forming the same
US8759943B2 (en) * 2010-10-08 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Transistor having notched fin structure and method of making the same
US8114721B2 (en) * 2009-12-15 2012-02-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method of controlling gate thickness in forming FinFET devices
US8202780B2 (en) * 2009-07-31 2012-06-19 International Business Machines Corporation Method for manufacturing a FinFET device comprising a mask to define a gate perimeter and another mask to define fin regions
US8039326B2 (en) * 2009-08-20 2011-10-18 Globalfoundries Inc. Methods for fabricating bulk FinFET devices having deep trench isolation
US9257325B2 (en) * 2009-09-18 2016-02-09 GlobalFoundries, Inc. Semiconductor structures and methods for forming isolation between Fin structures of FinFET devices
US8101486B2 (en) * 2009-10-07 2012-01-24 Globalfoundries Inc. Methods for forming isolated fin structures on bulk semiconductor material
US20110097867A1 (en) * 2009-10-22 2011-04-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of controlling gate thicknesses in forming fusi gates
US9040393B2 (en) 2010-01-14 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor structure
US8227304B2 (en) * 2010-02-23 2012-07-24 International Business Machines Corporation Semiconductor-on-insulator (SOI) structure and method of forming the SOI structure using a bulk semiconductor starting wafer
US8420476B2 (en) * 2010-05-27 2013-04-16 International Business Machines Corporation Integrated circuit with finFETs and MIM fin capacitor
CN102347349B (zh) * 2010-07-28 2014-07-23 中国科学院微电子研究所 半导体结构及其制作方法
US8603924B2 (en) 2010-10-19 2013-12-10 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming gate dielectric material
CN102456734B (zh) * 2010-10-29 2015-06-10 中国科学院微电子研究所 半导体结构及其制作方法
US9048181B2 (en) 2010-11-08 2015-06-02 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming ultra shallow junction
US8769446B2 (en) 2010-11-12 2014-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method and device for increasing fin device density for unaligned fins
US8592915B2 (en) 2011-01-25 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Doped oxide for shallow trench isolation (STI)
US8431453B2 (en) 2011-03-31 2013-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure
US9240350B2 (en) * 2011-05-16 2016-01-19 Varian Semiconductor Equipment Associates, Inc. Techniques for forming 3D structures
US20140193963A1 (en) * 2011-05-16 2014-07-10 Varian Semiconductor Equipment Associates, Inc. Techniques For Forming 3D Structures
US8597994B2 (en) 2011-05-23 2013-12-03 GlobalFoundries, Inc. Semiconductor device and method of fabrication
US8460984B2 (en) * 2011-06-09 2013-06-11 GlobalFoundries, Inc. FIN-FET device and method and integrated circuits using such
US8466028B2 (en) 2011-06-30 2013-06-18 Institute of Microelectronics, Chinese Academy of Sciences Method for manufacturing multigate device
US8697522B2 (en) * 2011-07-05 2014-04-15 International Business Machines Corporation Bulk finFET with uniform height and bottom isolation
US9287385B2 (en) 2011-09-01 2016-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-fin device and method of making same
CN103000517B (zh) * 2011-09-09 2016-02-10 中芯国际集成电路制造(北京)有限公司 半导体器件及其制造方法
US9105661B2 (en) * 2011-11-03 2015-08-11 Taiwan Semconductor Manufacturing Company, Ltd. Fin field effect transistor gate oxide
CN104137265B (zh) * 2011-12-22 2017-11-17 英特尔公司 具有颈状半导体主体的半导体器件以及形成不同宽度的半导体主体的方法
US8881066B2 (en) * 2011-12-29 2014-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Mandrel modification for achieving single fin fin-like field effect transistor (FinFET) device
US8377779B1 (en) * 2012-01-03 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of manufacturing semiconductor devices and transistors
US9117877B2 (en) * 2012-01-16 2015-08-25 Globalfoundries Inc. Methods of forming a dielectric cap layer on a metal gate structure
US8946027B2 (en) 2012-02-07 2015-02-03 International Business Machines Corporation Replacement-gate FinFET structure and process
US8354320B1 (en) * 2012-02-09 2013-01-15 Globalfoundries Inc. Methods of controlling fin height of FinFET devices by performing a directional deposition process
US9142400B1 (en) 2012-07-17 2015-09-22 Stc.Unm Method of making a heteroepitaxial layer on a seed area
CN102832133B (zh) 2012-08-29 2014-12-03 北京大学 在体硅上制备独立双栅FinFET的方法
US9093376B2 (en) 2012-10-24 2015-07-28 International Business Machines Corporation Replacement metal gate FinFET
US9263585B2 (en) * 2012-10-30 2016-02-16 Globalfoundries Inc. Methods of forming enhanced mobility channel regions on 3D semiconductor devices, and devices comprising same
US8987790B2 (en) 2012-11-26 2015-03-24 International Business Machines Corporation Fin isolation in multi-gate field effect transistors
US9059242B2 (en) 2012-11-27 2015-06-16 International Business Machines Corporation FinFET semiconductor device having increased gate height control
US8835262B2 (en) 2013-01-08 2014-09-16 Globalfoundries Inc. Methods of forming bulk FinFET devices by performing a recessing process on liner materials to define different fin heights and FinFET devices with such recessed liner materials
US9190419B2 (en) * 2013-02-07 2015-11-17 International Business Machines Corporation Diode structure and method for FINFET technologies
US8940602B2 (en) * 2013-04-11 2015-01-27 International Business Machines Corporation Self-aligned structure for bulk FinFET
US8900934B2 (en) 2013-04-18 2014-12-02 International Business Machines Corporation FinFET devices containing merged epitaxial Fin-containing contact regions
CN104183486A (zh) * 2013-05-21 2014-12-03 中芯国际集成电路制造(上海)有限公司 一种FinFET半导体器件的制备方法
US9087869B2 (en) 2013-05-23 2015-07-21 International Business Machines Corporation Bulk semiconductor fins with self-aligned shallow trench isolation structures
US20140374807A1 (en) * 2013-06-19 2014-12-25 International Business Machines Corporation METHOD OF DEVICE ISOLATION IN CLADDING Si THROUGH IN SITU DOPING
US9263455B2 (en) 2013-07-23 2016-02-16 Micron Technology, Inc. Methods of forming an array of conductive lines and methods of forming an array of recessed access gate lines
FR3009646A1 (de) * 2013-08-06 2015-02-13 St Microelectronics Sa
FR3009647A1 (de) * 2013-08-06 2015-02-13 St Microelectronics Sa
US8951850B1 (en) 2013-08-21 2015-02-10 International Business Machines Corporation FinFET formed over dielectric
WO2015045207A1 (ja) 2013-09-27 2015-04-02 パナソニック株式会社 半導体集積回路および半導体集積回路装置
US9224654B2 (en) 2013-11-25 2015-12-29 International Business Machines Corporation Fin capacitor employing sidewall image transfer
US9190466B2 (en) 2013-12-27 2015-11-17 International Business Machines Corporation Independent gate vertical FinFET structure
US9691763B2 (en) 2013-12-27 2017-06-27 International Business Machines Corporation Multi-gate FinFET semiconductor device with flexible design width
US9190328B2 (en) 2014-01-30 2015-11-17 International Business Machines Corporation Formation of fins having different heights in fin field effect transistors
US9059043B1 (en) * 2014-02-11 2015-06-16 International Business Machines Corporation Fin field effect transistor with self-aligned source/drain regions
US9985030B2 (en) 2014-04-07 2018-05-29 International Business Machines Corporation FinFET semiconductor device having integrated SiGe fin
CN105092324B (zh) * 2014-05-07 2018-03-20 中芯国际集成电路制造(上海)有限公司 一种FinFET鳍片掺杂浓度分布的测量方法和测量样品制备方法
US9385123B2 (en) 2014-05-20 2016-07-05 International Business Machines Corporation STI region for small fin pitch in FinFET devices
US9312389B2 (en) * 2014-05-23 2016-04-12 Broadcom Corporation FinFET with undoped body bulk
KR102449437B1 (ko) * 2014-06-26 2022-09-30 인텔 코포레이션 도핑된 하위 핀 영역을 가진 오메가 핀을 갖는 비 평면 반도체 디바이스 및 이것을 제조하는 방법
US9263587B1 (en) * 2014-09-04 2016-02-16 Globalfoundries Inc. Fin device with blocking layer in channel region
US9583625B2 (en) 2014-10-24 2017-02-28 Globalfoundries Inc. Fin structures and multi-Vt scheme based on tapered fin and method to form
CN105633152B (zh) 2014-11-05 2019-12-10 联华电子股份有限公司 半导体结构及其制作方法
US9614057B2 (en) 2014-12-30 2017-04-04 International Business Machines Corporation Enriched, high mobility strained fin having bottom dielectric isolation
KR102274750B1 (ko) * 2015-01-27 2021-07-07 삼성전자주식회사 반도체 장치 제조 방법
US9590077B2 (en) 2015-05-14 2017-03-07 International Business Machines Corporation Local SOI fins with multiple heights
US9515089B1 (en) 2015-05-14 2016-12-06 International Business Machines Corporation Bulk fin formation with vertical fin sidewall profile
EP3314638A4 (de) * 2015-06-27 2019-05-29 Intel Corporation Mehrhöhen-finfet-vorrichtung durch selektive oxidation
US9299924B1 (en) 2015-06-29 2016-03-29 International Business Machines Corporation Injection pillar definition for line MRAM by a self-aligned sidewall transfer
US9425313B1 (en) * 2015-07-07 2016-08-23 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US9362383B1 (en) 2015-09-17 2016-06-07 International Business Machines Corporation Highly scaled tunnel FET with tight pitch and method to fabricate same
US9508597B1 (en) * 2015-09-18 2016-11-29 Globalfoundries Inc. 3D fin tunneling field effect transistor
US9786563B2 (en) * 2015-11-23 2017-10-10 International Business Machines Corporation Fin pitch scaling for high voltage devices and low voltage devices on the same wafer
US9627263B1 (en) 2015-11-30 2017-04-18 International Business Machines Corporation Stop layer through ion implantation for etch stop
US10466731B2 (en) 2016-01-27 2019-11-05 Taiwan Semiconductor Manufacturing Co., Ltd. Two-transistor bandgap reference circuit and FinFET device suited for same
US9786765B2 (en) * 2016-02-16 2017-10-10 Globalfoundries Inc. FINFET having notched fins and method of forming same
CN107591362B (zh) * 2016-07-06 2020-08-07 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US9824934B1 (en) 2016-09-30 2017-11-21 International Business Machines Corporation Shallow trench isolation recess process flow for vertical field effect transistor fabrication
CN107919284B (zh) * 2016-10-10 2020-11-27 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
US10163914B2 (en) * 2017-03-08 2018-12-25 Globalfoundries Inc. Method of reducing fin width in FinFET SRAM array to mitigate low voltage strap bit fails
JP6330942B2 (ja) * 2017-03-08 2018-05-30 インテル・コーポレーション ドープサブフィン領域があるオメガフィンを有する非プレーナ型半導体デバイスおよびそれを製造する方法
CN108305835A (zh) * 2018-03-19 2018-07-20 中国科学院微电子研究所 一种鳍式晶体管器件的制造方法
US10304744B1 (en) * 2018-05-15 2019-05-28 International Business Machines Corporation Inverse tone direct print EUV lithography enabled by selective material deposition
CN109003902B (zh) * 2018-08-01 2021-07-27 中国科学院微电子研究所 一种半导体结构及其制备方法
US11302814B2 (en) * 2020-01-23 2022-04-12 Nanya Technology Corp. Semiconductor device with porous dielectric structure and method for fabricating the same
US11244901B2 (en) * 2020-02-12 2022-02-08 Nanya Technology Corporation Semiconductor device with graded porous dielectric structure

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4437226A (en) * 1981-03-02 1984-03-20 Rockwell International Corporation Process for producing NPN type lateral transistor with minimal substrate operation interference
US4580331A (en) * 1981-07-01 1986-04-08 Rockwell International Corporation PNP-type lateral transistor with minimal substrate operation interference and method for producing same
US4361600A (en) * 1981-11-12 1982-11-30 General Electric Company Method of making integrated circuits
US4502913A (en) * 1982-06-30 1985-03-05 International Business Machines Corporation Total dielectric isolation for integrated circuits
FR2554638A1 (fr) * 1983-11-04 1985-05-10 Efcis Procede de fabrication de structures integrees de silicium sur ilots isoles du substrat
US4764799A (en) * 1985-05-28 1988-08-16 International Business Machines Corporation Stud-defined integrated circuit structure
US4648173A (en) * 1985-05-28 1987-03-10 International Business Machines Corporation Fabrication of stud-defined integrated circuit structure
JPH0779133B2 (ja) * 1986-06-12 1995-08-23 松下電器産業株式会社 半導体装置の製造方法
JPH0214578A (ja) * 1988-07-01 1990-01-18 Fujitsu Ltd 半導体装置
US5595926A (en) * 1994-06-29 1997-01-21 Industrial Technology Research Institute Method for fabricating a DRAM trench capacitor with recessed pillar
US5675164A (en) * 1995-06-07 1997-10-07 International Business Machines Corporation High performance multi-mesa field effect transistor
JP3158973B2 (ja) * 1995-07-20 2001-04-23 富士電機株式会社 炭化けい素縦型ｆｅｔ
US5963789A (en) * 1996-07-08 1999-10-05 Kabushiki Kaisha Toshiba Method for silicon island formation
US5691230A (en) * 1996-09-04 1997-11-25 Micron Technology, Inc. Technique for producing small islands of silicon on insulator
US6177699B1 (en) * 1998-03-19 2001-01-23 Lsi Logic Corporation DRAM cell having a verticle transistor and a capacitor formed on the sidewalls of a trench isolation
US6034417A (en) * 1998-05-08 2000-03-07 Micron Technology, Inc. Semiconductor structure having more usable substrate area and method for forming same
US6110793A (en) * 1998-06-24 2000-08-29 Taiwan Semiconductor Manufacturing Company Method for making a trench isolation having a conformal liner oxide and top and bottom rounded corners for integrated circuits
JP3144387B2 (ja) * 1998-08-17 2001-03-12 日本電気株式会社 半導体装置の製造方法
EP1091413A3 (de) * 1999-10-06 2005-01-12 Lsi Logic Corporation Vollständig verarmter und invertierter CMOSFET mit vertikalem Kanal und dualem Gate
US6252284B1 (en) * 1999-12-09 2001-06-26 International Business Machines Corporation Planarized silicon fin device
US6391782B1 (en) * 2000-06-20 2002-05-21 Advanced Micro Devices, Inc. Process for forming multiple active lines and gate-all-around MOSFET
JP2002151688A (ja) * 2000-08-28 2002-05-24 Mitsubishi Electric Corp Ｍｏｓ型半導体装置およびその製造方法
JP4044276B2 (ja) * 2000-09-28 2008-02-06 株式会社東芝 半導体装置及びその製造方法
US6413802B1 (en) * 2000-10-23 2002-07-02 The Regents Of The University Of California Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
US6458662B1 (en) * 2001-04-04 2002-10-01 Advanced Micro Devices, Inc. Method of fabricating a semiconductor device having an asymmetrical dual-gate silicon-germanium (SiGe) channel MOSFET and a device thereby formed

Also Published As

Publication number Publication date
ATE500610T1 (de) 2011-03-15
CN1653608A (zh) 2005-08-10
TWI235457B (en) 2005-07-01
AU2003237320A8 (en) 2003-12-19
KR100702553B1 (ko) 2007-04-04
WO2003103019A2 (en) 2003-12-11
EP1532659A2 (de) 2005-05-25
AU2003237320A1 (en) 2003-12-19
CN1296991C (zh) 2007-01-24
JP4425130B2 (ja) 2010-03-03
WO2003103019A3 (en) 2004-03-18
EP1532659A4 (de) 2005-12-14
TW200411833A (en) 2004-07-01
US6642090B1 (en) 2003-11-04
IL165546A0 (en) 2006-01-15
JP2005528793A (ja) 2005-09-22
EP1532659B1 (de) 2011-03-02
KR20050003401A (ko) 2005-01-10

Similar Documents

Publication Publication Date Title
ATE500610T1 (de) Verfahren zur herstellung von finfet-bauelementen aus bulk-halbleiter
KR101382846B1 (ko) 높은 이동도 및 변형 채널을 갖는 ＦｉｎＦＥＴ
JP6215703B2 (ja) 集積フィンベースの電界効果トランジスタ（ＦｉｎＦＥＴ）およびその製造方法
US8900973B2 (en) Method to enable compressively strained pFET channel in a FinFET structure by implant and thermal diffusion
TW200802616A (en) Method for forming a semiconductor device and structure thereof
US8574995B2 (en) Source/drain doping method in 3D devices
WO2005067677A3 (en) High performance strained silicon finfets device and method for forming same
US9391176B2 (en) Multi-gate FETs having corrugated semiconductor stacks and method of forming the same
ATE498199T1 (de) Verspannte fin fet struktur und verfahren
ATE461526T1 (de) Hochdichtes finfet-integrationsverfahren
TW200501419A (en) Multiple gate MOSFET structure with strained Si fin body
TW200746412A (en) Virtual body-contacted trigate
US9704990B1 (en) Vertical FET with strained channel
WO2008127469A3 (en) A novel fabrication technique for high frequency, high power group iii nitride electronic devices
ATE380391T1 (de) Herstellungsverfahren für soi- halbleiterbauelemente
GB2473384A (en) Double gate and tri-gate transistor formed on a bulk substrate and method for forming the transistor
TW200614334A (en) Planar substrate devices integrated with finfets and method of manufacture
DE602004015592D1 (de) Methode zur herstellung von finfets mit mehreren höhen
TW200633076A (en) FinFETs with long gate length at high density
TW200614507A (en) Finfet transistor process
US20160005657A1 (en) Semiconductor structure with increased space and volume between shaped epitaxial structures
JP6423696B2 (ja) ｆｉｎＦＥＴ半導体素子及びその製造方法
TW200629545A (en) Field effect transistors having a strained silicon channel and methods of fabricating same
ATE533184T1 (de) Verfahren zur herstellung von asymmetrischen und symmetrischen doppelgatetransistoren auf demselben substrat
TW200739902A (en) Fin field effect transistors (FinFETs) and methods for making the same