CN103681478B - Copper-connection structure and manufacturing method of copper-connection structure - Google Patents
Copper-connection structure and manufacturing method of copper-connection structure Download PDFInfo
- Publication number
- CN103681478B CN103681478B CN201310700297.8A CN201310700297A CN103681478B CN 103681478 B CN103681478 B CN 103681478B CN 201310700297 A CN201310700297 A CN 201310700297A CN 103681478 B CN103681478 B CN 103681478B
- Authority
- CN
- China
- Prior art keywords
- layer
- thin film
- copper
- tialn
- growth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
The invention belongs to the technical field of semiconductors, and particularly relates to a copper-connection structure and a manufacturing method of the copper-connection structure. Based on an original copper-connection structure, a double-layer Ru/TiAlN structure is used as a diffusion impervious layer/adhesion layer/seed crystal layer structure. The manufacturing method includes the particular steps that an atomic layer deposition method is adopted, a TiAlN thin film is firstly deposited on an insulating medium layer, a Ru thin film is then deposited, and finally electrocoppering is directly carried out to obtain the copper-connection structure. As Al is added in the TiAlN thin film, the amorphous TiAlN thin film can be obtained, and the Cu diffusion impervious performance better than that of a TiN thin film can be obtained. According to the copper-connection structure, the amorphous TiAlN thin film with high density is used, channels, such as crystal boundaries, for rapid diffusion do not exist, the ideal diffusion impervious performance and the ideal heat stability are provided, and a practical and reliable scheme is provided for the copper-connection technology of 22nm and smaller-than-22nm technological nodes.
Description
Technical field
The invention belongs to technical field of semiconductors, be specifically related to a kind of integrated circuit copper interconnection structure and preparation method thereof.
Background technology
Along with the characteristic size of the development of integrated circuit processing technique, semiconductor device and circuit persistently reduces, mutually
Wiring delay replaces device gate delay becomes the principal element that restriction IC speed improves further, finds the conduction that resistivity is relatively low
Material and the relatively low dielectric material of dielectric constant become a great development direction of super large-scale integration technique.Owing to Cu has
The resistivity lower than Al, higher deelectric transferred ability and the higher coefficient of heat conduction, be increasingly becoming employing at present the most extensive
Interconnection material.But, Cu spreads quite fast in Si and oxide, and Cu once enters and the most i.e. forms deep-level impurity,
Carrier in device is had the strongest trap effect, makes device performance degeneration even lose efficacy, it is therefore desirable to serve as a contrast at Cu Yu Si
Form one layer of effective diffusion impervious layer at the end, to play isolation Cu and Si, improve the effect of Cu Yu Si substrate adhesion simultaneously
Really.In semiconductor manufacturing industry, most-often used barrier material is TiN at present, although TiN Yu Cu, Si are thermodynamically stable
, but the shortcoming of its maximum is exactly polycrystalline and columnar microstructure, and these are least ready as barrier layer to see, because existing
More crystal boundary will become the path that Cu quickly spreads.The TiN of non crystalline structure can eliminate this defect, but amorphous TiN is
Highly unstable.The nitride of other transition metal and Cu are also Thermodynamically stables can be by the method for reactive sputtering
Prepare amorphous state, but it also will start crystallization at a temperature of TiN loses efficacy as barrier layer.Have more so finding one
The barrier material of high thermal stability chases after at the eyebrows and eyelashes.
Along with the lasting propelling of semiconductor process technique, it is thin that traditional film deposition technique has been difficult to effective accurately control
Membrane property and the most harsh satisfied process specifications, and atomic layer deposition (ALD) technology is higher owing to can complete precision
Technique, is increasingly becoming microelectronic component and manufactures the key technology in field.It has relatively low deposition temperature, deposits speed faster
The advantages such as rate, manageable doping content and high film quality, it is often more important that, to depositing diffusion barrier on through hole and groove
During layer, it has more preferable conformality than methods such as sputterings.
In various diffusion barrier material, Ru is one the most promising copper diffusion barrier layer material, this is because
It is a kind of inert metal, TaN and Ta is much lower for its resistivity ratio;And have extraordinary adhesiveness with Cu, it is ensured that
The reliability of device.But, simple Ru thin film is the most uncomfortable incompatible does diffusion impervious layer, because pure Ru thin film is Columnar knot
Structure, its crystal boundary is that the short-range diffusion of Cu provides path.Meanwhile, Ru thin film is at silicon dioxide and the table of advanced low-k materials
Face adhesiveness is the most poor.
In view of requirement higher to diffusion impervious layer under deep-submicron level, it is proposed that utilize double-deck Ru/TiAlN
Structure is as diffusion impervious layer.Ru layer provides the possibility of the adhesiveness needed for next step copper facing and nucleation;TiAlN layer then makes up
The shortcoming that Ru layer barrier properties is bad, and the introducing of AlN not only changes TiN polycrystalline structure originally, and enhance thin
Film compactness and heat stability, make this structure reach a kind of perfect diffusion barrier effect.
Summary of the invention
It is an object of the invention to provide a kind of novel copper interconnection structure and preparation method thereof, to tackle integrated circuit
Characteristic size constantly reduces the difficulty of the copper interconnection wiring brought and requirement higher to diffusion barrier performance.
The copper interconnection structure that the present invention proposes, uses Ru/TiAlN double-decker as copper diffusion barrier layer and inculating crystal layer.
Present invention also offers the preparation method using the copper interconnection structure double-deck for above-mentioned Ru/TiAlN, concrete steps bag
Include:
(1) RCA standard cleaning technique is used to clean silicon-based substrate;
(2) on silicon chip, etching barrier layer, insulating medium layer are sequentially formed;
(3) by photoetching, etching technics, define interconnection location, form metal valley, contact hole or through hole;
(4) in the structure that above-mentioned steps is formed, atomic layer deposition method alternating growth TiN layer and AlN layer are utilized, it is thus achieved that
TiAlN thin film, followed by growth Ru thin film, thus forms Ru/TiAlN bilayer diffusion barrier;
(5) Direct Electroplating copper on said structure, obtains copper interconnection structure;
(6) finally wafer surface is planarized with CMP process.
Further, the described SiCOH that dielectric layer material is SiO2, SiOF, SiCOH or porous, described quarter
Erosion barrier material is silicon nitride.
The growth of described bilayer diffusion barrier uses PEALD method, and its concrete steps include two stages, first stage
Alternating growth n1Layer TiN and n2Layer AlN thin film, constantly repeats said process, forms TiAlN thin film;Second stage growth n3Layer
Ru, thus form double-deck Ru/TiAlN thin film, wherein n1、n2And n3For the integer more than or equal to 1.
Described Ru/TiAlN bilayer film, the first stage first deposits TiAlN thin film, and the Ti presoma of use is four times two
Methylamino titanium (TDMAT), (diethylamino) titanium (TDEAT) or TiCl4, gas source is NH3Or N2/H2, the Al forerunner of use
Body is trimethyl aluminium (TMA), and liquid source is H2O;Second stage deposit Ru thin film, the Ru presoma of use is Ru (Cp)2、Ru
(EtCp)2Or Ru (OD)3, use gas source is O2、NH3Or H2.Plasma power is 50 ~ 100W, carrier gas flux 300-400
Sccm, the temperature of reaction cavity is 250 ~ 350oC, the operating pressure of reaction cavity is 1 ~ 4 Torr.
In the described first stage, first carry out n1The circulation of individual TiN growth cycle and n2Individual AlN growth cycle circulates, then enters
Row repeats above procedure and completes growth.The growth cycle of one TiN includes: being passed through Ti presoma toward reaction chamber, the burst length is 2
~ 4 s, use high-purity N2Purging 8 ~ 16s, then pass to gas source plasma, the burst length is 4 ~ 6s, with high pure nitrogen purging 8 ~
12s;The growth cycle of one AlN includes being passed through Al presoma toward reaction chamber, and the burst length is 1 ~ 2 s, uses high-purity N2Purging 4 ~
8s, then passes to liquid source, and the burst length is 2 ~ 4s, purges 4 ~ 8s with high pure nitrogen.Described second stage includes n3Individual Ru is raw
Long period circulation (n1、n2、n3Integer for more than 1).The growth cycle of one Ru includes: be passed through Ru presoma, arteries and veins toward reaction chamber
The time of punching is 1 ~ 5s, uses high-purity N2Purging 2 ~ 10s, then passes to gas source plasma, and the burst length is 0.3 ~ 2s, with high-purity
Nitrogen purging 1 ~ 5s.By changing number of plies n of TiN Yu AlN1、n2Can optimize the Cu blocking capability of TiAlN thin film, compactness with
Electric conductivity.
The present invention uses double-deck Ru/TiAlN as diffusion impervious layer and inculating crystal layer, make use of Cu good for TiN simultaneously
The adhesive capacity that diffusion barrier effect is outstanding with Ru, and make TiN layer from polycrystalline structure by mixing Al element in TiAlN thin film
It is changed into non crystalline structure, thus further increases diffusion barrier capability and heat stability;Additionally employing ALD technique can be at height
There is during aspect ratio structures thin film deposition 100% step coverage, deposition film composition and thickness are had outstanding control energy
Power, thus obtain the purity good thin film of very high-quality, this just overcomes the film deposition technique such as traditional PVD at ultra-deep sub-micro
The deficiency of interconnection wiring under rice environment, thus it is effectively improved the Performance And Reliability of copper interconnection structure.Advantages of the present invention
It is the amorphous state TiAlN thin film using consistency high, there is not the such passage being available for quickly spreading of crystal boundary, it is provided that be preferable
Barrier diffusion properties and heat stability, provide one for the copper interconnection technology of 22nm and following Technology node thereof and more cut
Real scheme reliably.
Accompanying drawing explanation
Fig. 1-Fig. 6 is the integrated process flow of a kind of novel C u diffusion impervious layer and the copper-connection implemented according to the present invention
Figure.
Label in figure: 101 is Semiconductor substrate wafers, 102 is etching barrier layer, and 103 is insulating medium layer, and 104 for expanding
Dissipating barrier layer TiAlN, 105 is inculating crystal layer Ru, and 106 is electroplated copper film.
Detailed description of the invention
It is described in further detail with detailed description of the invention below in conjunction with the accompanying drawings, in the drawings, for convenience of explanation, amplifies
With reduce the thickness of layer and region, shown size does not represent actual size, and identical reference represents identical assembly,
Its repeated description will be omitted.
Ru/TiAlN diffusion impervious layer proposed by the invention and preparation method thereof is applicable to various semiconductor integrated circuit
Copper interconnection technology, described below is uses the present invention to prepare the technique of an embodiment of Ru/TiAlN diffusion impervious layer
Flow process.
First, on Si (100) substrate 101, use standard CMOS process, complete the cleaning of silicon chip, concrete technology
Specifically include that with sulphuric acid and hydrogen peroxide mixed solution, standard cleaning SC-1, SC-2, the Fluohydric acid. of dilution and deionization moisture
The most sequentially clean Si substrate, remove various impurity and natural oxidizing layer, and use high-purity N2Dry up.At cleaned Si (100) lining
At at the end 101, sequentially one layer of etching barrier layer silicon nitride 102 of deposit, dielectric layer 103(such as SiO for layer insulation2Thin film).
Groove or the through hole 201 of interconnection structure is formed, such as Fig. 1 followed by the photoetching of standard and etching technics.
After groove or through hole are formed, utilize PEALD technology to grow TiAlN thin film 104.Ti presoma is TDMAT, gas
Body source is NH3;Al presoma is trimethyl aluminium (TMA), and liquid source is H2O, growth temperature is 200-350oC, the pressure of reaction chamber
Being by force 1 ~ 4 Torr, plasma power is 80W.First the TiN and the AlN of 2 growth cycles of 3 growth cycles are grown, constantly
Repeat this process to form TiAlN thin film, as shown in Figure 2.The growth cycle of one TiN includes: be passed through TDMAT toward reaction chamber,
Burst length is 2 s, uses high-purity N2Purging 8s, then passes to NH3Plasma, the burst length is 4s, purges with high pure nitrogen
8s.The growth cycle of one AlN includes being passed through TMA toward reaction chamber, and the burst length is 1 s, uses high-purity N2Purging 4s, then passes to
H2O, the burst length is 4s, purges 8s with high pure nitrogen.Structure is as shown in Figure 3.
Next regrowth Ru thin film 105, the Ru presoma of use is Ru (EtCp)2, gas source is O2, other conditions are not
Become.First, being passed through Ru source in reflection chamber, the burst length is 1s;Use high-purity N2Purging reaction chamber 2s;It is passed through O2, the time is 0.5
S, uses high-purity N2Purging reflection chamber 2s;Repeat 50 growth cycles, finally obtain Ru/TiAlN barrier layer structure, as shown in Figure 4.
Then, use the mode of plating, in groove or through-hole structure, electro-coppering wire 106, form copper interconnection structure,
As shown in Figure 5.
Finally, by chemically mechanical polishing (CMP) technology planarizing wafer surface, the interconnection structure of a layer is completed, such as Fig. 6 institute
Show, prepare for next layer of interconnection structure.
Above in association with accompanying drawing, the detailed description of the invention of the present invention is described, but these explanations can not be understood and be limited
Having made the scope of the present invention, protection scope of the present invention is limited by appended claims, any in the claims in the present invention
On the basis of change be all protection scope of the present invention.
Claims (7)
1. a preparation method for copper interconnection structure, this copper interconnection structure uses double-deck Ru/TiAlN structure as copper diffusion barrier
Layer and inculating crystal layer;It is characterized in that concretely comprising the following steps:
(1) RCA standard cleaning technique is used to clean silicon-based substrate;
(2) one layer of etching barrier layer, insulating medium layer are sequentially formed on a silicon substrate;
(3) by photoetching, etching technics, define interconnection location, form metal valley, contact hole or through hole;
(4) in the structure that above-mentioned steps is formed, atomic layer deposition method alternating growth TiN layer and AlN layer is utilized to obtain TiAlN
Thin film, followed by growth Ru thin film, thus forms Ru/TiAlN bilayer diffusion barrier;
(5) in the structure that above-mentioned steps is formed, Direct Electroplating copper, obtain copper interconnection structure;
(6) finally wafer surface is planarized with CMP process.
2. according to the preparation method described in claim 1, it is characterised in that the dielectric layer material described in step (2) is
SiO2, SiOF, SiCOH or the SiCOH of porous.
3. according to the preparation method described in claim 1, it is characterised in that the etching barrier layer materials described in step (2) is
Silicon nitride.
4. according to the preparation method described in claim 1, it is characterised in that the life of step (4) described bilayer diffusion barrier
Long employing plasma helps Atomic layer deposition method, and its detailed process is divided into two stages, first stage alternating growth n1Layer TiN with
n2Layer AlN thin film, constantly repeats said process, forms TiAlN thin film;Second stage growth n3Layer Ru, thus form double-deck Ru/
TiAlN thin film, wherein n1、n2And n3For the integer more than or equal to 1, by controlling n1、n2And n3Numerical value, final obtain required thick
The barrier film of degree.
Preparation method the most according to claim 4, it is characterised in that step (4) described plasma helps ald raw
Needed for long TiN, Ti source is four dimethyl amido titaniums, diethylamino titanium or TiCl4, gas source is NH3Or N2/H2;Growing AIN
Required Al source is trimethyl aluminium, and liquid source is H2O;Needed for growth Ru, Ru source is Ru (Cp)2、Ru(EtCp)2Or Ru (OD)3, gas
Source is O2、NH3Or H2, plasma power is 50 ~ 100W, carrier gas flux 300-400 sccm, the temperature of reaction cavity is 250 ~
350 DEG C, the operating pressure of reaction cavity is 1 ~ 4 Torr.
Preparation method the most according to claim 5, it is characterised in that the growth cycle of a TiN includes: toward reaction chamber
Being passed through Ti presoma, the burst length is 2 ~ 4 s, uses high-purity N2Purging 8 ~ 16s, then passes to gas source plasma, during pulse
Between be 4 ~ 6s, with high pure nitrogen purge 8 ~ 12s;The growth cycle of one AlN includes being passed through Al presoma, during pulse toward reaction chamber
Between be 1 ~ 2 s, use high-purity N2Purging 4 ~ 8s, then passes to liquid source, and the burst length is 2 ~ 4s, purges 4 ~ 8s with high pure nitrogen;
The growth cycle of one Ru includes: being passed through Ru presoma toward reaction chamber, the burst length is 1 ~ 5s, uses high-purity N2Purging 2 ~ 10s, so
After be passed through gas source plasma, the burst length is 0.3 ~ 2s, with high pure nitrogen purge 1 ~ 5s.
Preparation method the most according to claim 1, it is characterised in that the copper interconnection structure described in step (5) uses plating
Electric current density be 0.5A/dm2-3.0A/dm2。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310700297.8A CN103681478B (en) | 2013-12-19 | 2013-12-19 | Copper-connection structure and manufacturing method of copper-connection structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310700297.8A CN103681478B (en) | 2013-12-19 | 2013-12-19 | Copper-connection structure and manufacturing method of copper-connection structure |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103681478A CN103681478A (en) | 2014-03-26 |
CN103681478B true CN103681478B (en) | 2017-01-11 |
Family
ID=50318617
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310700297.8A Expired - Fee Related CN103681478B (en) | 2013-12-19 | 2013-12-19 | Copper-connection structure and manufacturing method of copper-connection structure |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103681478B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106910709B (en) * | 2015-12-22 | 2020-04-14 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, preparation method thereof and electronic device |
CN109267025B (en) * | 2018-11-16 | 2020-10-09 | 江苏科技大学 | Method for preparing Ti-Al-Ru-N nano hard film based on ceramic substrate surface |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6181012B1 (en) * | 1998-04-27 | 2001-01-30 | International Business Machines Corporation | Copper interconnection structure incorporating a metal seed layer |
CN101710577A (en) * | 2009-11-19 | 2010-05-19 | 复旦大学 | Method for inhibiting oxidization of copper in copper interconnect structure |
CN101819944A (en) * | 2010-04-28 | 2010-09-01 | 复旦大学 | Method for forming copper contact interconnection structure |
-
2013
- 2013-12-19 CN CN201310700297.8A patent/CN103681478B/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6181012B1 (en) * | 1998-04-27 | 2001-01-30 | International Business Machines Corporation | Copper interconnection structure incorporating a metal seed layer |
CN101710577A (en) * | 2009-11-19 | 2010-05-19 | 复旦大学 | Method for inhibiting oxidization of copper in copper interconnect structure |
CN101819944A (en) * | 2010-04-28 | 2010-09-01 | 复旦大学 | Method for forming copper contact interconnection structure |
Also Published As
Publication number | Publication date |
---|---|
CN103681478A (en) | 2014-03-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8288750B2 (en) | Phase change memory device with air gap | |
CN107836034A (en) | Ruthenium metallicity portion for interconnection is filled | |
CN105336670B (en) | Semiconductor structure and forming method thereof | |
JP7326475B2 (en) | Selective deposition on non-metallic surfaces | |
TW200915485A (en) | Method of depositing tungsten using plasma-treated tungsten nitride | |
WO2018231337A2 (en) | Process integration approach of selective tungsten via fill | |
TW201208160A (en) | Memory employing diamond-like carbon resistivity-switchable material and methods of forming the same | |
TW201828330A (en) | Method and system for vertical integration of elemental and compound semiconductors | |
CN103681478B (en) | Copper-connection structure and manufacturing method of copper-connection structure | |
TWI737171B (en) | Method of forming a single-crystal hexagonal boron nitride layer and a transistor | |
JP2004006856A (en) | Ultra-thin tungsten metal film used as adherence promoter between metal barrier layer and copper, and method for closely adhering copper thin film to substrate using it | |
CN103943556A (en) | Method for processing electrocoppering film used for semiconductor copper connection process | |
CN102237309B (en) | Method for integrating manganese-oxide-based resistive memory with copper interconnection rear end process | |
CN102903699A (en) | Copper interconnecting structure and preparation method thereof | |
CN102142428B (en) | Ruthenium/wolfram hafnium nitride (Ru/WHfN) blocking layer against copper diffusion applied to copper interconnection and preparation method thereof | |
TWI233180B (en) | Method of producing semiconductor device | |
CN107978553A (en) | A kind of semiconductor devices and its manufacture method | |
JP2022541537A (en) | Metal on-chip decoupling capacitor | |
JP4122792B2 (en) | Manufacturing method of semiconductor device | |
CN102832198A (en) | Copper interconnection structure adopting novel alloy seed crystal layer and preparation method of structure | |
CN103325769A (en) | Copper interconnection structure and manufacturing method thereof | |
CN103325770A (en) | Integrated circuit copper interconnection structure and preparation method thereof | |
CN102623389A (en) | Method for preparing metal nitride barrier layer | |
CN115621128A (en) | Manufacturing method of high-thermal-conductivity two-dimensional semiconductor field effect transistor and transistor | |
CN102693958A (en) | Copper interconnection structure adopting novel diffusion impervious layer and preparation method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170111 Termination date: 20191219 |
|
CF01 | Termination of patent right due to non-payment of annual fee |