CN102842504B - Semiconductor device and manufacture method thereof - Google Patents
Semiconductor device and manufacture method thereof Download PDFInfo
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- CN102842504B CN102842504B CN201110164686.4A CN201110164686A CN102842504B CN 102842504 B CN102842504 B CN 102842504B CN 201110164686 A CN201110164686 A CN 201110164686A CN 102842504 B CN102842504 B CN 102842504B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 238000005530 etching Methods 0.000 claims abstract description 29
- 238000001039 wet etching Methods 0.000 claims abstract description 14
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Substances [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 15
- 239000010408 film Substances 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- -1 tetramethyl hydroxide Ammonium Chemical compound 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 5
- VEXZGXHMUGYJMC-UHFFFAOYSA-N HCl Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 3
- QUZPNFFHZPRKJD-UHFFFAOYSA-N germane Chemical compound [GeH4] QUZPNFFHZPRKJD-UHFFFAOYSA-N 0.000 claims description 3
- 229910052986 germanium hydride Inorganic materials 0.000 claims description 3
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims description 3
- MROCJMGDEKINLD-UHFFFAOYSA-N Dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 claims description 2
- 229910003818 SiH2Cl2 Inorganic materials 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000005755 formation reaction Methods 0.000 claims description 2
- 239000010409 thin film Substances 0.000 claims description 2
- HADKRTWCOYPCPH-UHFFFAOYSA-M trimethylphenylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C1=CC=CC=C1 HADKRTWCOYPCPH-UHFFFAOYSA-M 0.000 claims 1
- 238000001312 dry etching Methods 0.000 abstract description 2
- 239000007789 gas Substances 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 6
- 230000003628 erosive Effects 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000875 corresponding Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N HF Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 1
- 240000001439 Opuntia Species 0.000 description 1
- QGZKDVFQNNGYKY-UHFFFAOYSA-O ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 125000003698 tetramethyl group Chemical group [H]C([H])([H])* 0.000 description 1
Abstract
The invention discloses a kind of semiconductor device and manufacture method thereof, it is intended to improve the performance of the embedded source/drain regions of " ∑ " shape.After forming " u "-shaped groove by dry etching in Si substrate, in " u "-shaped bottom portion of groove epitaxial growth SiGe layer.By using the etchant more than the etching speed to SiGe of the etching speed to Si, from the sidewall of " u "-shaped groove, Si substrate is had the selective wet etching in crystal orientation, form " ∑ " connected in star.Due to the existence of SiGe layer, the Si of " u "-shaped bottom portion of groove is protected and is not etched by, thus avoids the bottom forming point when carrying out and having the selective wet etching in crystal orientation.
Description
Technical field
The present invention relates to semiconductor device and manufacture method thereof, particularly to one, there is " ∑ "
The semiconductor device of the embedded source-drain area of shape and manufacture method thereof.
Background technology
In cmos device, in order to increase the compression stress of PMOS device channel region, with
Strengthen its carrier mobility, it is proposed that embedded silicon germanium technologies.Wherein use Embedded silicon
Germanium forms source region or drain region, thus channel region is applied stress.
In order to strengthen the effect applying stress, further provide formation " ∑ " connected in star to fill out
Fill the technical scheme of SiGe.
Fig. 1 schematically shows the cross section of " ∑ " connected in star formed in substrate.At this section
In the figure of face, the surface 130 of substrate 100, the top half 140 of recess sidewall and the latter half
150 and bottom portion of groove 180 extended line 160 (being represented by dashed line) formed " ∑ " shape.
" ∑ " illustrated in fig. 1 connected in star can have the selective wet method in crystal orientation by use
Etching is formed.
For example, it is possible to the crystal plane direction selecting the surface of substrate 100 is (001).Such as Fig. 2 A institute
Show, first, such as by dry etching, form " u "-shaped groove 210 in the substrate.Groove
Crystal plane direction bottom 210 is also (001), and the crystal plane direction of sidewall can be then (110).
Then, use and there is the selective Wet-etching agent in crystal orientation, such as, comprise tetramethyl hydrogen-oxygen
Change the etchant of ammonium (TMAH), by " u "-shaped groove 210, substrate 200 is etched.
In this etching process, the etching speed on<111>crystal orientation is less than the erosion on other crystal orientation
Carve speed.Thus, " u "-shaped groove 210 is etched and becomes diamondoid groove 215, as
Shown in Fig. 2 B.Fig. 2 B show in phantom the position of original " u "-shaped groove 210.
The sidewall of groove 215 has top half 240 and the latter half 250.Top half 240 He
The crystal plane direction of the latter half 250 be the most respectively (111) and
But, owing to the etching speed on<100>crystal orientation and<110>crystal orientation is more brilliant than in<111>
Etching speed upwards is big, so being easy to be etched excessively bottom groove 215, so that
The latter half 250 of groove 215 both sides sidewall is intersected.Then, the knot of this anisotropic etching
It is sharp rather than flat that fruit often leads to the bottom of groove 215.
And if the bottom of groove 215 is sharp, then when epitaxial growth in groove 215
During SiGe, it is impossible to obtain high-quality SiGe.
Summary of the invention
It is an object of the present invention to provide a kind of method manufacturing semiconductor device, it can prevent
The bottom of point is formed when forming " ∑ " connected in star.
According to the first aspect of the invention, it is provided that a kind of method manufacturing semiconductor device, bag
Include: in Si substrate, form " u "-shaped groove；By epitaxial growth at " u "-shaped groove
SiGe layer is formed on bottom；Use the erosion more than the etching speed to SiGe of the etching speed to Si
Carve agent, from the sidewall of " u "-shaped groove, Si substrate is had the selective wet method in crystal orientation
Etching, thus form " ∑ " connected in star.
Preferably, the method also includes: epitaxial growth SiGe in " ∑ " connected in star, to fill out
Fill " ∑ " connected in star.
Preferably, the SiGe filled in " ∑ " connected in star is for forming the source of PMOS device
District or drain region.
Preferably, " u "-shaped groove can be to use dry method etch technology to be formed.
Preferably, the degree of depth of " u "-shaped groove can be between 300 angstroms to 550 angstroms.
Preferably, the crystal plane direction of substrate surface and " u "-shaped recess sidewall is the most respectively
{ 100} family of crystal planes and { one of substantially perpendicular to each other two crystal faces in 110} family of crystal planes.Upper
Stating and have in the selective wet etching in crystal orientation, the etching speed on<111>crystal orientation is less than
Etching speed on other crystal orientation.
Preferably, the crystal plane direction of substrate surface is (001), the crystalline substance of the sidewall of " u "-shaped groove
Direction, face is (110).
Preferably, etchant can comprise Tetramethylammonium hydroxide (TMAH).
Alternatively, in the step being formed SiGe layer by epitaxial growth in the bottom of " u "-shaped groove
In Zhou, also forming sidewall SiGe film on the sidewall of " u "-shaped groove, sidewall SiGe is thin
The thickness of film is less than the thickness of the SiGe layer of " u "-shaped bottom portion of groove, and the method also includes:
Before Si substrate is carried out wet etching, sidewall SiGe film is removed in etching, and retains " U "
At least some of Si covering " u "-shaped bottom portion of groove of the SiGe layer bottom connected in star.
By epitaxial growth the bottom of " u "-shaped groove formed SiGe layer step in, excellent
Selection of land, technological temperature is 500 DEG C to 800 DEG C, and pressure is that 5 torr are to 50 torr.Preferably, institute
The process gas used comprises:
SiH4Or SiH2Cl2；
GeH4；
HCl；
B2H6Or BH3；And
H2,
Wherein H2Gas flow rate be 0.1sim to 50sim, the gas flow rate of other gas above-mentioned
For 1sccm to 1000sccm.
Preferably, the thickness of SiGe layer can be 10 angstroms to 300 angstroms.
According to the second aspect of the invention, it is provided that a kind of for a kind of semiconductor device, including:
Silicon substrate, is formed with depression in silicon substrate；And fill the silicon germanium material caved in, it is used for being formed
The source region of PMOS device or drain region, wherein depression has Part I and Part II, substrate
The crystal plane direction of the sidewall of surface and Part I is { 100} family of crystal planes and { 110} the most respectively
One of substantially perpendicular to each other two crystal faces in family of crystal planes, and Part II is positioned at first
On/, the sidewall of Part II is divided into top half and the latter half, top half and lower half
Part crystal plane direction be the most respectively (111) and
Preferably, the crystal plane direction of substrate surface is substantially (001), the sidewall of Part I
Crystal plane direction is substantially (110).
Preferably, the height of Part I can be 10 angstroms to 300 angstroms.
An advantage of the invention that, wet etching process protects the silicon of bottom portion of groove
It is not etched by, thus prevents the bottom forming point when forming " ∑ " connected in star.
By detailed description to the exemplary embodiment of the present invention referring to the drawings, the present invention
Further feature and advantage will be made apparent from.
Accompanying drawing explanation
The accompanying drawing of the part constituting description describes embodiments of the invention, and together with saying
Bright book is together for explaining the principle of the present invention.
Referring to the drawings, according to detailed description below, the present invention can be more clearly understood from,
Wherein:
Fig. 1 is the sectional view schematically showing " ∑ " connected in star.
Fig. 2 A and 2B is to schematically show the technique forming " ∑ " connected in star in prior art
The sectional view in each stage.
Fig. 3 A to Fig. 3 D is to schematically show semiconductor device according to the invention manufacture method
The sectional view in each stage.
Fig. 4 is the process chart of the method manufacturing semiconductor device according to the present invention.
Detailed description of the invention
The various exemplary embodiments of the present invention are described in detail now with reference to accompanying drawing.It should be noted that
Arrive: unless specifically stated otherwise, the parts illustrated the most in these embodiments and the phase of step
Layout, numerical expression and numerical value are not limited the scope of the invention.
Simultaneously, it should be appreciated that for the ease of describing, the chi of the various piece shown in accompanying drawing
Very little is not to draw according to actual proportionate relationship.
Description only actually at least one exemplary embodiment is illustrative below, certainly
Not as to the present invention and application thereof or any restriction of use.
May not make in detail for technology, method and apparatus known to person of ordinary skill in the relevant
Thin discussion, but in the appropriate case, described technology, method and apparatus should be considered to authorize to be said
A part for bright book.
Shown here with in all examples discussed, any occurrence should be construed as merely
Exemplary rather than conduct limits.Therefore, other example of exemplary embodiment can have
There is different values.
It should also be noted that similar label and letter expression similar terms in following accompanying drawing, therefore,
The most a certain Xiang Yi accompanying drawing is defined, then need not it is carried out in accompanying drawing subsequently
Discussed further.
As it is known in the art, { 100} family of crystal planes includes (100) crystal face, (010) crystal face, (001)
Crystal face, and 110} family of crystal planes include (110) crystal face, (101) crystal face, (011) crystal face,
Crystal face,Crystal face,
Crystal face, and 111} family of crystal planes then include (111) crystal face,
Crystal face,
Crystal face,
Crystal face.
As it is known in the art,<100>crystal orientation race includes [100] crystal orientation, [010] crystal orientation, [001]
Crystal orientation,<110>crystal orientation race include [110] crystal orientation, [101] crystal orientation, [011] crystal orientation,
Crystal orientation,Crystal orientation,
Crystal orientation,<111>crystal orientation race then include [111] crystal orientation,
Crystal orientation,Crystal orientation,
Crystal orientation.For ease of describing, in present specification, by " crystal orientation race " letter
It is referred to as in " crystal orientation ".Such as, "<111>crystal orientation " means "<111>crystal orientation race ".
Below with reference to shown by the sectional view in each stage shown by Fig. 3 A to 3D and Fig. 4
Process chart, describe according to the present invention manufacture semiconductor device method.
The most existing nmos device in semiconductor device, also has PMOS device.At CMOS
In device especially true.
And use source region that embedded SiGe formed or drain region to be often used for PMOS device.Cause
This, before performing each step described below, can be with masked NMOS to be formed
The part of device, and expose the part of PMOS device to be formed, thus only to be formed
The part of PMOS device is formed groove, and fills embedded SiGe.
First, in step S410, substrate 300 forms " u "-shaped groove 310, such as figure
Shown in 3A.The material of substrate 300 can be such as silicon (Si).
For example, it is possible to form " u "-shaped groove 310 by known dry method etch technology.
Can using the grid formed on substrate 300 and gate lateral wall distance piece (the most not shown) as
Substrate 300 is etched forming " u "-shaped groove 310 by mask.
The degree of depth of " u "-shaped groove 310 can be come really according to the degree of depth of desired source/drain regions
Fixed, such as can be between 300 angstroms to 550 angstroms.
" u "-shaped bottom portion of groove can be substantially parallel to substrate surface." u "-shaped recess sidewall
May be substantially perpendicular to substrate surface.
The crystal plane direction of substrate surface and " u "-shaped recess sidewall can be the most respectively such as
{ 100} family of crystal planes and { any crystal face in 110} family of crystal planes.
Such as, when the crystal plane direction of substrate surface is (001), the crystalline substance of " u "-shaped recess sidewall
Direction, face can be (110),
Or (010) (100).
And when the crystal plane direction of substrate surface is (110), the crystal face side of " u "-shaped recess sidewall
To being
Or (001).
Crystal plane direction in view of the most conventional wafer surface is (001), conveniently,
The crystal plane direction of substrate surface is (001).
When channel orientation is selected as<110>crystal orientation to obtain bigger carrier mobility,
The crystal plane direction of the sidewall of " u "-shaped groove can be substantially such as (110) or
In present specification, in the case of the crystal plane direction of substrate surface is chosen as (001),
When mentioning " (11x) crystal face ", it is intended to cover (11x) crystal face and
Crystal face, wherein, " x "
Represent " 0 ", " 1 " or
It follows that in step S420, by epitaxial growth in the bottom of " u "-shaped groove 310
Form SiGe (SiGe) layer 320.
The SiGe epitaxial growth technology of standard is bottom-up technique, gives birth to the most bottom-up
Long, and relatively slow from the speed of sidewall growth.SiGe accordingly, with respect to bottom grown
Thickness, the thickness of the SiGe (if any) of sidewall growth is the least.
The process gas grown by selective epitaxy and process conditions, so that on sidewall
The speed of growth is significantly more less than the speed of growth bottom-up.
Such as, process gas can comprise:
SiH4Or SiH2C12；
GeH4；
HCl；
B2H6Or BH3；And
H2,
Wherein H2Gas flow rate can be 0.1slm to 50slm, the gas of other gas above-mentioned
Flow velocity can be 1sccm to 1000sccm.
Technological temperature can be 500 DEG C to 800 DEG C, and pressure can be that 5 torr are to 50 torr.
The thickness of the SiGe layer 320 formed can be such as 10 angstroms to 300 angstroms.
As it has been described above, relatively thin sidewall SiGe also may can be formed in " u "-shaped recess sidewall
Thin film (not shown), the thickness of this sidewall SiGe film is less than the thickness of the SiGe layer of bottom
Degree.In once experiment, when at the SiGe of bottom epitaxial growth about 14.3nm, at sidewall
On only grown the SiGe of 1nm to 2nm.
Before the wet etching process that can be described below, initially with special etching step
Remove sidewall SiGe film.Wet etching process described below can also be passed through, in etching
Before Si substrate, first remove this sidewall SiGe film.
While sidewall SiGe film is removed in etching, although the SiGe layer of bottom also can be lost
Sub-fraction, but owing to its thickness is bigger, so can stay at least some of to continue to cover
The Si of lid " u "-shaped bottom portion of groove.
Then, in step S430, from the sidewall of " u "-shaped groove 310, to Si substrate
300 carry out having the selective wet etching in crystal orientation.
There is the selective wet etching in crystal orientation well known in the art.Such as, brilliant in<111>
Etching speed upwards can be less than the etching speed on other crystal orientation.
Thus, this wet etching will stop at (111) crystal face and
On crystal face, thus formed
" ∑ " connected in star 315, as shown in Figure 3 C.In the sectional view shown in Fig. 3 C, substrate 300
Surface 330, the top half 340 of recess sidewall and the latter half 350 and SiGe layer
The extended line 360 (being represented by dashed line) of upper surface forms " ∑ " shape.
Meanwhile, etchant used herein is more than the speed of the etching to SiGe to the etching speed of Si
Degree.It will be understood by those skilled in the art that multiple etchant can select.
As example, it is possible to use Tetramethylammonium hydroxide (TMAH).TMAH is to SiGe
The etching speed of etching speed comparison Si much smaller.Under indicate to use TMAH pair
The experimental data that SiGe is etched.Wherein, VDHF is the Fluohydric acid. of dilution
(HF∶H2O=1: 300～1: 500).
After successively twice uses TMAH to etch each 30 seconds, totally one minutes amounts to erosion
Carve the SiGe eliminating 56.33 angstroms.And TMAH to the etching speed substantially 500 angstroms of Si/
Minute.
Therefore, the SiGe layer 320 of " u "-shaped bottom portion of groove can be in this wet etch process
As barrier layer, to prevent its Si covered to be etched.And the side not covered by SiGe layer
Wall is then etched to form as " ∑ " shape.
So far, defined there is " ∑ " connected in star 315 of substantially flat basal surface.
Existence due to SiGe layer 320, it is therefore prevented that the Si bottom " u "-shaped groove 310 is etched,
Thus overcome the technical problem of the bottom forming point in prior art.
It is then possible in step S440, epitaxial growth SiGe in " ∑ " connected in star 315
370, to fill " ∑ " connected in star 315, as shown in Figure 3 D.In this step, SiGe layer
320 can serve as seed layer.
The SiGe filled in " ∑ " connected in star 315 is for forming the source region of PMOS device
Or drain region.
Fig. 3 D schematically shows semiconductor device made according to the method for the present invention to be had
" ∑ " shape embedded SiGe source /drain region structure having.
As shown in Figure 3 D, the silicon substrate of semiconductor device according to the invention is formed with depression.
Depression is filled with silicon germanium material.The silicon germanium material filled is for forming the source of PMOS device
District or drain region.
Depression has Part I (corresponding to epitaxially grown SiGe layer 320 for the first time) and second
Partly (corresponding to the epitaxially grown SiGe 370 of second time).
The crystal plane direction of the surface of substrate 300 and the sidewall of Part I 320 is the most respectively
{ 100} family of crystal planes and { one of substantially perpendicular to each other two crystal faces in 110} family of crystal planes.
As it has been described above, conveniently, the crystal plane direction on the surface of substrate 300 is substantially
(001).When channel direction is chosen as<110>crystal orientation, the crystal face of the sidewall of Part I 320
Direction can be substantially (110).
Part II 370 is positioned on Part I 320.
The sidewall of Part II 370 is divided into top half 340 and the latter half 350, the first half
Points 340 and the crystal plane direction of the latter half 350 be the most respectively (111) and
The height of Part I 320 can be 10 angstroms to 300 angstroms.
So far, the method that manufacture semiconductor device according to the present invention and institute shape are described in detail
The semiconductor device become.In order to avoid covering the design of the present invention, do not describe well known in the art
Some details.Those skilled in the art are as described above, complete it can be appreciated how implement
Technical scheme disclosed herein.
Although some specific embodiments of the present invention being described in detail by example,
But it should be appreciated by those skilled in the art, above example is not merely to illustrate, and not
It is to limit the scope of the present invention.It should be appreciated by those skilled in the art, can without departing from
In the case of scope and spirit of the present invention, above example is modified.The model of the present invention
Enclose and be defined by the following claims.
Claims (13)
1. the method manufacturing semiconductor device, including:
" u "-shaped groove is formed in Si substrate；
By epitaxial growth in the bottom of described " u "-shaped groove formation SiGe layer；
Use the etchant more than the etching speed to SiGe of the etching speed to Si, with described
Described Si substrate, as barrier layer, from the sidewall of described " u "-shaped groove, is carried out by SiGe layer
There is the selective wet etching in crystal orientation, thus form " ∑ " connected in star；
Wherein in the step being formed SiGe layer by epitaxial growth in the bottom of described " u "-shaped groove
In Zhou, on the sidewall of described " u "-shaped groove, also form sidewall SiGe film, described sidewall
The thickness of SiGe film is less than the thickness of the SiGe layer of described " u "-shaped bottom portion of groove, the party
Method also includes:
Before described Si substrate is carried out described wet etching, described sidewall SiGe is removed in etching
Thin film, and retain at least some of to cover institute of the SiGe layer of described " u "-shaped bottom portion of groove
State the Si of " u "-shaped bottom portion of groove；
Wherein described by epitaxial growth the bottom of described " u "-shaped groove formed SiGe layer
Step in, the process gas used comprises:
SiH4Or SiH2Cl2；
GeH4；
HCl；
B2H6Or BH3；And
H2,
Wherein H2Gas flow rate be 0.1slm to 50slm, the gas flow rate of other gas above-mentioned
For 1sccm to 1000sccm.
2. the method for claim 1, also includes:
Epitaxial growth SiGe in described " ∑ " connected in star, to fill described " ∑ " connected in star.
3. method as claimed in claim 2, fills in wherein said " ∑ " connected in star
SiGe is for forming source region or the drain region of PMOS device.
4. the method for claim 1, wherein said " u "-shaped groove is to use dry method
Etch process is formed.
5. the method for claim 1, the degree of depth of wherein said " u "-shaped groove is 300
Angstrom between 550 angstroms.
6. the method for claim 1, wherein said substrate surface and described " u "-shaped
The crystal plane direction of recess sidewall is that { 100} family of crystal planes with { in 110} family of crystal planes substantially the most respectively
One of upper orthogonal two crystal faces, have in the selective wet etching in crystal orientation described,
Etching speed on<111>crystal orientation is less than the etching speed on other crystal orientation.
7. method as claimed in claim 6, the crystal plane direction of wherein said substrate surface is
(001), the crystal plane direction of the sidewall of described " u "-shaped groove is (110).
8. method as claimed in claim 6, wherein said etchant comprises tetramethyl hydroxide
Ammonium (TMAH).
9. the method for claim 1, wherein described by epitaxial growth at described " U "
The bottom of connected in star is formed in the step of SiGe layer, and technological temperature is 500 DEG C to 800 DEG C, pressure
Power is that 5 torr are to 50 torr.
10. the method for claim 1, the thickness of wherein said SiGe layer is 10 angstroms
To 300 angstroms.
11. 1 kinds of semiconductor device, including:
Silicon substrate, is formed with depression in described silicon substrate；And
Fill the silicon germanium material of described depression, for forming source region or the drain region of PMOS device,
Wherein said depression has the Part I and Part II being epitaxially-formed,
The crystal plane direction of the sidewall of described substrate surface and described Part I is the most respectively
100} family of crystal planes and one of substantially perpendicular to each other two crystal faces in 110} family of crystal planes, and
Described Part II is positioned on described Part I, and the sidewall of described Part II is divided into
Top half and the latter half, the crystal plane direction of described top half and the latter half is substantially divided
Be not (111) and
12. devices as claimed in claim 11, the crystal plane direction base of wherein said substrate surface
Being (001) on Ben, the crystal plane direction of the sidewall of described Part I is substantially (110).
13. devices as claimed in claim 11, the height of wherein said Part I is 10
Angstrom to 300 angstroms.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110164686.4A CN102842504B (en) | 2011-06-20 | Semiconductor device and manufacture method thereof | |
| US13/354,060 US8912568B2 (en) | 2011-06-20 | 2012-01-19 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110164686.4A CN102842504B (en) | 2011-06-20 | Semiconductor device and manufacture method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102842504A CN102842504A (en) | 2012-12-26 |
| CN102842504B true CN102842504B (en) | 2016-11-30 |
Family
ID=
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5739544A (en) * | 1993-05-26 | 1998-04-14 | Matsushita Electric Industrial Co., Ltd. | Quantization functional device utilizing a resonance tunneling effect and method for producing the same |
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5739544A (en) * | 1993-05-26 | 1998-04-14 | Matsushita Electric Industrial Co., Ltd. | Quantization functional device utilizing a resonance tunneling effect and method for producing the same |
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