CN102339734B - Production method of cylindrical semiconductor device with cross section being circular ring - Google Patents
Production method of cylindrical semiconductor device with cross section being circular ring Download PDFInfo
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- CN102339734B CN102339734B CN 201010233196 CN201010233196A CN102339734B CN 102339734 B CN102339734 B CN 102339734B CN 201010233196 CN201010233196 CN 201010233196 CN 201010233196 A CN201010233196 A CN 201010233196A CN 102339734 B CN102339734 B CN 102339734B
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Abstract
The invention provides a production method of a cylindrical semiconductor device with a cross section being a circular ring, which comprises the following steps that: firstly a silicon nitride layer is adopted as a mask to define the outer diameter of the circular ring, then a polycrystalline silicon layer or an amorphous silicon layer below the silicon nitride layer is oxidized, and the diameter width of the polycrystalline silicon layer or the amorphous silicon layer which is not oxidized below the silicon nitride layer is adopted as an inner-diameter width of the circular ring. The cylindrical semiconductor device with the cross section being the circular ring is finally formed through the etching technology. By adopting the method, a cylindrical graph with the cross section being the circular ring can be simply and accurately realized.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of cross section is the manufacture method of the cylindrical semiconductor device of annulus.
Background technology
Magnetic RAM (MRAM) is a kind of nonvolatile memory, and it has the incomparable advantages such as legacy memory such as dynamic random access memory (DRAM), flash memory in many application.The magnetic memory cell of MRAM is MTJ (MTJ), and existing MTJ is solid cylinder, through studies show that, MTJ is made into the cylinder that the cross section is annulus, can greatly improve the electric property of MRAM.Fig. 1 is that the cross section is the cylinder semiconductor device schematic perspective view of annulus.Therefore, not only for MTJ, comprising that other need to be made into the cylindrical semiconductor device that the cross section is annulus, how to realize the pattern of this semiconductor device, is that semiconductor manufacturing industry is just at problems of concern.
Summary of the invention
In view of this, the technical problem of the present invention's solution is: how making the cross section is the cylinder semiconductor device of annulus.
For solving the problems of the technologies described above, technical scheme of the present invention specifically is achieved in that
The invention discloses the manufacture method that a kind of cross section is the cylindrical semiconductor device of annulus, the method comprises:
Deposition-etch destination layer, many/amorphous silicon layer and silicon nitride layer successively on Semiconductor substrate; Described many/implication of amorphous silicon layer is polysilicon layer or amorphous silicon layer;
At the surface-coated photoresistance glue-line of silicon nitride layer, and the described photoresistance glue-line of exposure imaging patterning, the photoresistance glue-line of described patterning is cylindrical, is used for defining the external diameter width of annulus;
Take the photoresistance glue-line of patterning as mask, the described silicon nitride layer of etching forms the cylindrical silicon nitride layer of patterning;
After removing the photoresistance glue-line, take the cylindrical silicon nitride layer of patterning as mask, many/amorphous silicon layer is carried out the silicon oxide layer that oxidation formation has the first desired depth; Wherein, be positioned at the below of cylindrical silicon nitride layer of patterning not oxidized many/diameter width of amorphous silicon layer is the internal diameter width of annulus;
Take the cylindrical silicon nitride layer of described patterning as mask, the silicon oxide layer that anisotropic etching has the first desired depth is many to manifesting/amorphous silicon layer;
After removing the cylindrical silicon nitride layer of described patterning, manifest under the cylindrical silicon nitride layer that is positioned at described patterning silicon oxide layer and not oxidized many/amorphous silicon layer, anisotropic etching is many/amorphous silicon layer is to manifesting etching target; The width of the described silica that manifests is the width of annulus, and the width of described annulus is the internal diameter width that the external diameter width of annulus deducts annulus;
Take the silicon oxide layer that manifests as mask, etching target is carried out etching, Formation cross-section is the cylindrical semiconductor device of annulus.
After described removal photoresistance glue-line, take the cylindrical silicon nitride layer of patterning as mask, to many/amorphous silicon layer carry out oxidation form have the silicon oxide layer of the first desired depth before, the method further comprises: take the cylindrical silicon nitride layer of patterning as mask, etching is many/and the step of amorphous silicon layer to the second desired depth;
Described the first desired depth is greater than the second desired depth.
Described etching is many/and amorphous silicon layer is isotropic etching or anisotropic etching;
Described isotropic etching is many/and the gas of amorphous silicon layer comprises carbon tetrafluoride CF
4, sulphur hexafluoride SF
6Or Nitrogen trifluoride NF
3In a kind of, perhaps several combination in any;
Described anisotropic etching is many/and the gas of amorphous silicon layer comprises CF
4, hydrogen bromide HBr or chlorine Cl
2In a kind of, perhaps several combination in any.
The described method that is oxidized to thermal oxidation or plasma assisted oxidation.
Described anisotropic etching is many/and amorphous silicon layer to the etching gas that manifests etching target comprises hydrogen bromide HBr or chlorine Cl
2In a kind of, the perhaps combination of two kinds, when this etching gas carries out etching to many/amorphous silicon layer, can the etching oxidation silicon layer.
Between the many/amorphous silicon layer of deposition and silicon nitride layer, the method further comprises the step of many/amorphous silicon layer being carried out ammonia annealing.
As seen from the above technical solutions, the present invention is the external diameter of definition annulus take silicon nitride layer as mask at first, then the polysilicon layer under it or amorphous silicon layer are carried out oxidation, the polysilicon layer that mask silicon nitride layer below is not oxidized or the diameter width of amorphous silicon layer are as the internal diameter width of annulus.Utilize the final Formation cross-section of lithographic technique to be the cylindrical semiconductor device of annulus in this process.Adopt method of the present invention can realize simply exactly that the cross section is the cylinder pattern of annulus, even in the situation that require the size of semiconductor device very little, method of the present invention still can realize, because method of the present invention does not rely on lithographic equipment, can not approach the physics limit that has even surpassed optical lithography because of lithographic feature size, and make lithographic equipment obtain the less semiconductor pattern of size by exposure imaging.
Description of drawings
Fig. 1 is that the cross section is the cylinder semiconductor device schematic perspective view of annulus.
Fig. 2 is that the present invention makes the method flow schematic diagram that the cross section is the cylindrical semiconductor device of annulus.
Fig. 2 a to Fig. 2 g is that the present invention makes the concrete generalized section that the cross section is the cylindrical semiconductor device of annulus.
Fig. 3 a to Fig. 3 h is that to make the cross section be the concrete generalized section of the cylindrical semiconductor device of annulus to the preferred embodiment of the present invention.
Embodiment
For make purpose of the present invention, technical scheme, and advantage clearer, referring to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
The present invention make the cross section be annulus cylindrical semiconductor device the method flow schematic diagram as shown in Figure 2, it comprises the following steps, and describes below in conjunction with Fig. 2 a to Fig. 2 g.
In the present invention, polysilicon layer 102 can also replace with amorphous silicon, why adopt polysilicon or amorphous silicon, because the lattice that it has well and levels is mated, and follow-up when polysilicon or amorphous silicon are carried out oxidation, have oxidation effectiveness preferably, make polysilicon or the amorphous silicon can be by oxidation equably.Adopt silicon nitride layer 103 in the present invention, follow-up when passing into oxygen in reaction chamber polysilicon layer 102 being carried out oxidation, silicon nitride character is more stable, can guarantee that silicon nitride layer is not oxidized in the oxidation polysilicon;
The gas of etch silicon nitride layer 103 is mainly carbon tetrafluoride (CF
4);
So far, cross section of the present invention is the cylinder semiconductor device formation of annulus.
Above-mentioned in step 24, accurate control to polysilicon layer 102 oxidations, width and the internal diameter of annulus have been determined, for the size that makes annulus more accurate, the preferred embodiment of the present invention is after step 24 is removed photoresistance glue-line 104, before polysilicon layer 102 is carried out oxidation, added the step of etch polysilicon layer 102.
It is the method for the cylinder semiconductor device of annulus that the preferred embodiment of the present invention is made the cross section, comprises the following steps, and describes below in conjunction with Fig. 3 a to Fig. 3 h.
Step 31, see also Fig. 3 a, deposition-etch destination layer 101, polysilicon layer 102 and silicon nitride layer 103 successively on Semiconductor substrate 100.
In the present invention, polysilicon layer 102 can also replace with amorphous silicon, why adopt polysilicon or amorphous silicon, because the lattice that it has well and levels is mated, and follow-up when polysilicon or amorphous silicon are carried out oxidation, have oxidation effectiveness preferably, make polysilicon or the amorphous silicon can be by oxidation equably.Adopt silicon nitride layer 103 in the present invention, follow-up when passing into oxygen in reaction chamber polysilicon layer 102 being carried out oxidation, silicon nitride character is more stable, can guarantee that silicon nitride layer is not oxidized in the oxidation polysilicon;
Step 32, see also Fig. 3 b, at the surface-coated photoresistance glue-line 104 of silicon nitride layer 103, and the described photoresistance glue-line 104 of exposure imaging patterning, the photoresistance glue-line 104 of described patterning is cylindrical, its columniform diameter has defined the outer diameter A of annulus;
Step 33, see also Fig. 3 c, take the photoresistance glue-line 104 of patterning as mask, the described silicon nitride layer 103 of etching forms the cylindrical silicon nitride layer 103 of patternings.
The gas of etch silicon nitride layer 103 is mainly CF
4
Step 34, see also Fig. 3 d, after removing photoresistance glue-line 104, take the cylindrical silicon nitride layer 103 of patterning as mask, etch polysilicon layer 102 to second desired depth.
Wherein, can be isotropic etching to the etching of polysilicon layer 102, the etching of certain width and the degree of depth is namely arranged on horizontal and vertical, etching gas can comprise carbon tetrafluoride (CF
4), sulphur hexafluoride (SF
6) or Nitrogen trifluoride (NF
3) in a kind of, or above-mentioned several combination in any; Can be also anisotropic etching, the etching of certain depth is namely only arranged in the vertical, etching gas can comprise CF
4, hydrogen bromide (HBr) or chlorine (Cl
2) in a kind of, or above-mentioned several combination in any.
For polysilicon layer 102 laterally or the etching size vertically be also to control by predetermined etch period.Testing wafer carries out test of many times when etching, preset etch period at every turn and carry out etching, and the wafer after etching is inserted measure board and carry out dimensional measurement, the etch period when finally reaching predetermined etching size is as with batch predetermined etch period of wafer in this step.
Control in this step the transverse width L of polysilicon layer 102 after etching account for patterning silicon nitride layer 103 width 1/2～1.Vertical depth H when controlling etch polysilicon layer 102 accounts for 0～1 of polysilicon layer 102 height.If incorgruous etching, etching can be to horizontal expansion, be etching only along the downward etching of cylindrical silicon nitride layer 103 of patterning, can not etch into polysilicon partly under the cylindrical silicon nitride layer 103 of patterning, L is identical with cylindrical silicon nitride layer 103 width B of patterning; If lateral etching, etching is not only carried out downwards along the cylindrical silicon nitride layer 103 of patterning, and can etch into the polysilicon of part under the cylindrical silicon nitride layer 103 of patterning, makes L reduce.The width of L can not be too narrow, otherwise rear extended meeting is with the whole oxidations of the polysilicon in the L width; And H can have certain numerical value, and when H was larger, the size in the time of can making subsequent oxidation was more regular, thereby controlled more accurately the characteristic size (CD) of etch polysilicon in step 27;
Step 35, see also Fig. 3 e, take the cylindrical silicon nitride layer 103 of patterning as mask, polysilicon layer 102 is carried out oxidation form the silicon oxide layer 105 with first desired depth.Being specially in reaction chamber and passing into oxygen, is silica with polysilicon oxidation, and the volume of therefore original polysilicon can increase, and silica is filled the sunk part of etching in step 34 full.The method of oxidation has multiple, can be thermal oxidation, also can be the plasma assisted oxidation.After oxidation, be positioned at the below of the cylindrical silicon nitride layer 103 of patterning, remain in the internal diameter that the width B of polysilicon layer 102 transversely is annulus.
Be oxidized to the silicon oxide layer with first desired depth for polysilicon layer 102, can control by predetermined oxidization time.Owing to having at the etch polysilicon layer on the basis of the second desired depth, carry out oxidation, so the first desired depth is greater than the second desired depth of etching;
Step 36, see also Fig. 3 f, take the cylindrical silicon nitride layer 103 of described patterning as mask, anisotropic etching silicon oxide layer 105 is to polysilicon layer 102;
Step 37, see also Fig. 3 g, after removing the cylindrical silicon nitride layer 103 of patterning, anisotropic etching polysilicon layer 102 is to manifesting etching target 101, the cylinder mask that formed cross section of wanting required for the present invention this moment is annulus.After the cylindrical silicon nitride layer 103 of patterning is removed, polysilicon layer 102 and silicon oxide layer 105 all reveal, so this step adopts etch polysilicon and the selection of silica to carry out etching than very high gas, select than generally reaching tens hundreds ofs even, when being the etching polysilicon, substantially can etching oxidation silicon.Etching gas generally adopts a kind of in chlorine or hydrogen bromide, the perhaps combination of two kinds.Wherein, the width of the silicon oxide layer that manifests is the width of annulus, and this width equals outer diameter A-internal diameter B;
Step 38, see also Fig. 3 h, take above-mentioned pattern as mask, etching target 101 is carried out etching, forming cross section of the present invention is the cylinder semiconductor device of annulus.This step is transferred to mask on etching target 101 exactly.
So far, the cross section of the preferred embodiment of the present invention is the cylinder semiconductor device formation of annulus.
Between deposit spathic silicon layer 102 and silicon nitride layer 103, may further include the step of polysilicon layer 102 being carried out ammonia annealing.During oxidation polysilicon layer 102, owing to having grain structure in polysilicon layer 102, and the oxidation rate of locating at granule boundary (grain boundary) is more a lot of soon than the oxidation rate of granule interior, so adopting ammonia anneals to polysilicon layer 102, be conducive to reduce the oxidation at granule boundary place, make the oxidation rate in polysilicon layer 102 reach unanimity, form uniform silicon oxide layer.For amorphous silicon, the method for above-mentioned ammonia annealing stands good.
May further include the step that deposition forms hard mask layer between deposition-etch destination layer 101 and polysilicon layer 102; hard mask layer can be silicon nitride, silicon oxynitride etc.; has certain hardness, for the protection of the uniformity of etching target 101 etching size.If add hard mask layer between etching target 101 and polysilicon layer 102, after removing silicon nitride layer 103, then etch polysilicon layer 102 is etched to hard mask layer and manifests etching target 101 to manifesting hard mask layer.
In sum, cross section of the present invention is the formation method of the cylindrical semiconductor device of annulus, and crucial is, polysilicon or amorphous silicon are carried out oxidation, adopt silica as mask pattern, the circular mask that forms is transferred on destination layer, thereby formed above-mentioned pattern.
The above is only preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of making, is equal to replacement, improvement etc., within all should being included in the scope of protection of the invention.
Claims (6)
1. manufacture method that the cross section is the cylindrical semiconductor device of annulus, the method comprises:
Deposition-etch destination layer, many/amorphous silicon layer and silicon nitride layer successively on Semiconductor substrate; Described many/implication of amorphous silicon layer is polysilicon layer or amorphous silicon layer;
At the surface-coated photoresistance glue-line of silicon nitride layer, and the described photoresistance glue-line of exposure imaging patterning, the photoresistance glue-line of described patterning is cylindrical, is used for defining the external diameter width of annulus;
Take the photoresistance glue-line of patterning as mask, the described silicon nitride layer of etching forms the cylindrical silicon nitride layer of patterning;
After removing the photoresistance glue-line, take the cylindrical silicon nitride layer of patterning as mask, many/amorphous silicon layer is carried out the silicon oxide layer that oxidation formation has the first desired depth; Wherein, be positioned at the below of cylindrical silicon nitride layer of patterning not oxidized many/diameter width of amorphous silicon layer is the internal diameter width of annulus;
Take the cylindrical silicon nitride layer of described patterning as mask, the silicon oxide layer that anisotropic etching has the first desired depth is many to manifesting/amorphous silicon layer;
After removing the cylindrical silicon nitride layer of described patterning, manifest under the cylindrical silicon nitride layer that is positioned at described patterning silicon oxide layer and not oxidized many/amorphous silicon layer, anisotropic etching is many/amorphous silicon layer is to manifesting etching target; The width of the described silica that manifests is the width of annulus, and the width of described annulus is the internal diameter width that the external diameter width of annulus deducts annulus;
Take the silicon oxide layer that manifests as mask, etching target is carried out etching, Formation cross-section is the cylindrical semiconductor device of annulus.
2. the method for claim 1, it is characterized in that, after described removal photoresistance glue-line, take the cylindrical silicon nitride layer of patterning as mask, to many/amorphous silicon layer carry out oxidation form have the silicon oxide layer of the first desired depth before, the method further comprises: take the cylindrical silicon nitride layer of patterning as mask, etching is many/and the step of amorphous silicon layer to the second desired depth;
Described the first desired depth is greater than the second desired depth.
3. method as claimed in claim 2, is characterized in that, and described etching is many/and the step of amorphous silicon layer to the second desired depth is isotropic etching or anisotropic etching;
Described isotropic etching is many/and the gas of amorphous silicon layer comprises carbon tetrafluoride CF
4, sulphur hexafluoride SF
6Or Nitrogen trifluoride NF
3In a kind of, perhaps several combination in any;
Described anisotropic etching is many/and the gas of amorphous silicon layer to the second desired depth comprises CF
4, hydrogen bromide HBr or chlorine Cl
2In a kind of, perhaps several combination in any.
4. as claim 1,2 or 3 described methods, it is characterized in that the described method that is oxidized to thermal oxidation or plasma assisted oxidation.
5. method as claimed in claim 4, is characterized in that, and described anisotropic etching is many/and amorphous silicon layer to the etching gas that manifests etching target comprises hydrogen bromide HBr or chlorine Cl
2In a kind of, the perhaps combination of two kinds, when this etching gas carries out etching to many/amorphous silicon layer, can the etching oxidation silicon layer.
6. method as claimed in claim 1 or 2, is characterized in that, between the many/amorphous silicon layer of deposition and silicon nitride layer, the method further comprises the step of many/amorphous silicon layer being carried out ammonia annealing.
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| JP2013258244A (en) * | 2012-06-12 | 2013-12-26 | Tokyo Electron Ltd | Etching method and plasma processing apparatus |
| CN105719964A (en) * | 2014-12-05 | 2016-06-29 | 中国科学院微电子研究所 | Method of planarization |
| US9773974B2 (en) * | 2015-07-30 | 2017-09-26 | Spin Transfer Technologies, Inc. | Polishing stop layer(s) for processing arrays of semiconductor elements |
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| US6706571B1 (en) * | 2002-10-22 | 2004-03-16 | Advanced Micro Devices, Inc. | Method for forming multiple structures in a semiconductor device |
| CN1619774A (en) * | 2003-11-19 | 2005-05-25 | 旺宏电子股份有限公司 | Semi conductor element having reduced spacing and its forming method |
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| US6706571B1 (en) * | 2002-10-22 | 2004-03-16 | Advanced Micro Devices, Inc. | Method for forming multiple structures in a semiconductor device |
| CN1619774A (en) * | 2003-11-19 | 2005-05-25 | 旺宏电子股份有限公司 | Semi conductor element having reduced spacing and its forming method |
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