CN100524827C - 具有改良的载流子迁移率的垂直双栅极场效应晶体管及其形成方法 - Google Patents

具有改良的载流子迁移率的垂直双栅极场效应晶体管及其形成方法 Download PDF

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CN100524827C
CN100524827C CNB038232502A CN03823250A CN100524827C CN 100524827 C CN100524827 C CN 100524827C CN B038232502 A CNB038232502 A CN B038232502A CN 03823250 A CN03823250 A CN 03823250A CN 100524827 C CN100524827 C CN 100524827C
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silicon
finfet
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林明仁
J·S·吴
汪海宏
相奇
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Advanced Micro Devices Inc
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Abstract

一种垂直双栅极MOSFET(FinFET)器件使用应变硅来改良载流子迁移率。在一种方法中，将FinFET基体(46)图形化形成一层覆盖于电介质层上(40)的硅锗(SiGe)(42)。接着在该硅锗FinFET基体(46)上形成硅外延层(34)。由于本征硅以及作为外延硅生长的模板的硅锗晶格尺寸不同，因而在外延硅中产生应力。应变硅比松散硅(relaxed silicon)具有更高的载流子迁移率，因此外延的应变硅在FinFET中提供较高的载流子迁移率。将应变硅沟道层用于FinFET中可实现较高的驱动电流。

Description

具有改良的载流子迁移率的垂直双栅极场效应晶体管及其形成方法
技术领域
本发明涉及半导体器件，更具体的，是涉及垂直双栅极MOSFET，也称为FinFET。
背景技术
金属氧化物半导体场效应晶体管(MOSFET)大部分半导体器件的主要构件。传统的MOSFET由半导体衬底所构成，该半导体衬底中形成有多个掺杂物注入有源区。因此，MOSFET的有源构件由半导体材料所围绕。然而，当沟道长度小于100nm时，MOSFET中使用半导体衬底架构会造成诸如短沟道效应的性能降低的效果。由于围绕有源区的半导体衬底的半导体材料使源极和漏极区域间互动，因而产生短沟道效应，降低MOSEFET栅极控制MOSFET中沟道区的导电性的能力。
一种代替传统半导体衬底架构为绝缘体上硅(SOI)架构。在SOI架构中，诸如MOSFET的器件由电介质衬底支撑以单片半导体结构(monolithic)方式形成，而不是以形成在半导体衬底中的区域方式形成。已知SOI器件比使用半导体衬底架构所形成的器件具有较多的优点，例如器件间隔离较良好、漏电流减少、CMOS组件间的闩锁(latch-up)减少、芯片电容减少、以及耦合在源极与漏极区域间的短沟道减少或免除。
有一种使用SOI架构形成的MOSFET结构传统上称为垂直双栅极MOSFET，或FinFET。如图1a所示，FinFET由包含有源极区域12、漏极区域14与鳍状的沟道区域16的硅体所构成。源极区域12、漏极区域14与沟道区域16由单片硅体所形成，该单片硅体由电介质衬底18上的硅层图形化而来。将硅体图形化后，在硅体上生长或沉积栅极氧化物，接着将如图1b所示的导电栅极20图形化以围绕沟道区域16。该导电栅极20由诸如多晶硅的导电材料图形化而来。图2显示了图1b的FinFET的栅极和沟道区域沿线A-A’的剖面图。如图2所示，栅极氧化物22间隔开导电栅极20与沟道区域16，导电栅极20围绕着沟道区域16的两侧壁，因而作为双栅极将栅极电压分至沟道区域16的两侧边。FinFET的沟道宽度因此约为沟道区域高度的两倍，致使比相同尺寸的半导体衬底MOSFET有更高的驱动电流。
虽然传统的FinFET因为SOI架构而比形成在半导体衬底上的MOSFET提供上述的好处，但是一些诸如载流子迁移率的FinFET的基本特性与其它MOSFET相同，因为源极、漏极和沟道区域通常由诸如硅的传统MOSFET半导体材料所形成。
发明内容
因此本发明的一个目的是通过改善诸如载流子迁移率的器件特性，提供一种比传统FinFET更具改良性的FinFET器件。
根据本发明的实施例，从覆盖于电介质层上的硅锗层图形化FinFET基体，接着在硅锗FinFET基体上形成应变硅的外延层。由于松散的本征硅晶格(relaxed intrinsic silicon lattice)以及作为外延层生长的模板的硅锗晶格尺寸不同，因而在外延硅上施加了拉应力。应变硅比松散硅具有较高的载流子迁移率，因此外延的应变硅在FinFET中提供较高的载流子迁移率。所以利用应变硅沟道层能够在FinFET中实现较高的驱动电流。
根据本发明的一个实施例，绝缘体上硅MOSFET器件包括具备电介质层的衬底。将FinFET基体形成在电介质层上。FinFET基体通常为硅锗。FinFET基体包含有源极和漏极区域，且沟道区域延伸于源极和漏极区域之间。将应变硅层至少形成在沟道区域的表面上。将导电栅极围绕在沟道区域两侧与上部分，并且由栅极绝缘层和应变硅分隔开。
根据本发明的另一实施例，绝缘体上硅MOSFET器件通过首先提供包括附于电介质层上的半导体层的SOI衬底所形成。该半导体层通常为硅锗。将半导体层图形化而形成包括有源极和漏极区域以及延伸在两者之间的沟道区域的FinFET基体。接着至少在沟道区域的表面形成应变硅层。至少在沟道区域上生长的应变硅上形成栅极绝缘层，以覆盖沟道区域上生长的应变硅。形成导电栅极。导电栅极围绕沟道区域的两侧与上部分，并且由栅极绝缘层和应变硅分隔开。
根据本发明的又一实施例，可将多个上述的FinFET结合形成CMOS器件，并可将FinFET基体形成有多个沟道区域，以提供更大的沟道宽度。
附图说明
结合附图说明本发明的实施例，其中：
图1a显示了传统FinFET基体的一部分；
图1b显示了形成在图1a所示的传统FinFET基体部分上的栅极部分；
图2显示了沿着图1a的A-A’线的传统FinFET栅极和沟道的剖面图；
图3显示了根据本发明实施例所形成的FinFET的FinFET栅极和沟道的剖面图；
图4a显示了用于形成根据本发明的实施例的FinFET的衬底和掩膜；
图4b显示了在蚀刻衬底形成FinFET基体以后的图4a的结构；
图4c显示了形成栅极之后的图4b的结构；
图5a显示了将氧注入硅锗衬底；
图5b显示了经过退火形成具有埋入氧化层(BOX)的硅锗SOI衬底之后的图5a的结构；
图5c显示了从硅锗图形化FinFET基体之后的图5b的结构；
图6a显示了将氢注入硅锗衬底；
图6b显示了在被转翻并粘接到第二衬底的氧化层之后的图6a的结构；
图6c显示了经过退火以在注入氢的区域中断裂第一衬底之后的图6b的结构；
图6d显示了经过平坦化以形成硅锗SOI衬底之后的图6c的结构；以及
图7显示了包括较佳的以及替代实施例的流程。
具体实施方式
图3中显示了根据本发明一实施例所形成的FinFET栅极和沟道剖面图。由图3可见，该结构包括有其上生长外延应变硅层34的硅锗沟道区域32。由于晶格中有较大的锗原子存在，所以硅锗沟道区域32的硅锗晶格通常比本征硅晶格间隔宽。因为硅晶格的原子与分布较宽的硅锗晶格对齐，所以在硅层中产生拉应力。硅原子实质上被彼此拉开。施加在硅晶格上的拉应力量与硅锗晶格中锗的数量成正比。所以，生长在硅锗沟道区域32上的外延硅层34受到拉应力。拉应力施加在硅晶格造成六个硅价带之中的四个能量增加，而两个能量减少。由于量子效应，当电子通过应变硅的较低能带时，电子有效重量减少30％。因此较低能带对电子流提供较少的电阻。另外，电子遭受到来自硅原子核的较少震动能量，使电子比在松散硅中的电子减少500至1000倍的散率度。所以，相对于松散硅，应变硅中的载流子迁移率能大幅的增加，提供电子迁移率80％或更多的潜在增加，空穴迁移率20％的增加。已知迁移率的增加可持续到每厘米1.5百万伏。(megavolts/centimeter)的电流场。相信这些要素能不减少器件尺寸而增加35％的器件速度，或不降低性能而减少25％的功耗。
如图3更进一步显示，将栅极绝缘层36形成在外延硅层34上，而双栅极结构38覆盖在栅极绝缘层36上并围绕着沟道区域32形成。
因为应变硅层形成在沟道区域以及源极和漏极区域的表面，所以图3所示的结构形成显出更好的载流子迁移率的FinFET的部分。沟道区域的剖面的宽高比可能越高越好，以形成完全耗尽且提供最大有效沟道宽度的高且窄的沟道区域。
参照图4a至4c说明根据本发明较佳实施例的形成FinFET的过程。
图4a显示了包括电介质层40和松散的硅锗层42的SOI衬底。下文将描述多种形成该衬底的方式。硅锗层42最好为Si1-xGex的组合物，其中x约等于0.2，且通常于0.1至0.3范围之间。
用于蚀刻硅锗层42的掩膜44形成在硅锗层42上。该掩膜最好为硬质掩膜，由使用类似形状的光刻胶掩膜作为蚀刻掩膜蚀刻双层结构而成。
图4b显示了图4a经过使用掩膜44将未掩膜的硅锗去除后由此形成硅锗FinFET基体46的结构。
将外延应变硅层选择性生长在硅锗FinFET基体46上。外延应变硅层最好使用Si2H6作为源气体，以及30mPa的分压力与大约摄氏600至900度的衬底温度的化学气相沉积所形成。因为硅原子通过粘接至硅锗晶格的对应的原子而对齐，所以在硅晶格中产生力量使外延硅层形成时受应力。在较佳实施例中，外延应变硅具有100至200埃的厚度。
在生长应变硅层之后，在应变硅层上形成氧化硅的栅极绝缘层。可通过从应变硅层上沉积或选择性生长该氧化硅。应变硅层最后的厚度最好约为80至200埃。所以，先前生长的应变硅的数量部分由是否在氧化物生长中消耗一些应变硅而定。
在形成栅极绝缘层之后，形成栅极48，得到如图4c所示者。最好在包括硅锗FinFET基体46的衬底上通过沉积一层共形的多晶硅层，接着将多晶硅层平坦化，然后使用蚀刻掩膜图形化以定义该栅极48，如图4c所示。
在栅极48的图形化之后，可执行更进一步的处理，如在栅极两侧壁上形成绝缘间隔体、在源极和漏极中注入掺杂物、形成源极、漏极和栅极硅化物、以及在FinFET四周形成保护层。
虽然参考图4a至4c所述的过程是关于形成单一FinFET的过程，但应了解可使用类似的处理方式实施多样的代替结构。例如，在替代实施例中，一对分别具有互补的掺杂物的FinFET可以具有互相电性连结的栅极，由此组成CMOS FinFET。在另一替代实施例中，FinFET的源极和漏极可通过多个延伸于其间的沟道区域所连接，因此提供沟道区域与栅极间更多接触表面积以及更大的沟道宽度。
可用多种不同方式提供硅锗SOI衬底。图5a、5b、和5c显示了在硅锗衬底中使用注入的氧以形成埋入氧化层(buried oxide；BOX)所形成的结构。如图5a所示，提供硅锗衬底50。该衬底通常包括有一层生长在硅晶片上的硅锗。生长硅锗的方式有例如，使用Si2H6(乙硅烷)和GeH4(锗烷)作为源气体、衬底温度摄氏600至900度、30mPa的Si2H6分压力，以及60mPa的GeH4分压力的化学气相沉积。硅锗物质的生长可初步使用这些比例，或代替性的可渐渐从低压或零压增加GeH4的分压力，以形成梯度的组合物。用来形成FinFET基体的硅锗层的部分最好具有均匀的构成。
如图5a所示，以足够的能量将氧52注入硅锗衬底50中，形成氧化区域54的深度为能够在氧化区域上留下所需厚度的硅锗。
图5b显示了图5a的硅锗衬底50退火后以在衬底中形成埋入硅锗氧化层56的结构。通常退火在摄氏1350度下执形四个小时左右，且通常作为放松任何硅锗晶格中残留的应力。氧化层56作为之后将单片衬底形成于其上的电介质层，如上所述。图5c显示了图5b在图形化硅锗FinFET基体58(沟道区域的剖面所示)以形成覆于氧化层56上的硅锗层之后的结构。
图6a至6d显示了根据形成硅锗SOI衬底的第二方法所形成的结构。图6a显示了平坦化的硅锗衬底60。将氢62注入硅锗衬底60以在硅锗材料中形成富含氢的区域64。用一能量将氢62注入硅锗衬底60，使留在富氢区域的硅锗的数量超过将形成于SOI衬底上的硅锗层的厚度。较佳方式为将氢注入硅锗的受应力区域。
图6b显示了图6a的硅锗在被清理干净、在稀释的HF溶剂中剥除氧化物、用除去离子水冲洗以在其表面上形成激活的天然氧化物、然后反向并粘接到形成在第二衬底70的半导体层74上的平坦化氧化层72之后的结构。可在室温下进行粘接，且为了粘接最佳化，两衬底需要精准的平坦化以提供最大接触面积。
在粘接之后，将粘接的衬底退火，例如在摄氏600度的温度下大约三小时。如图6c所示，退火使硅锗衬底沿着富氢区域64断裂，因此留下包含有粘接到氧化层72的硅锗层76的新的衬底，并且在衬底上表面具有剩余的富含氢的区域64。
接着将新的衬底平坦化并清洗，留下如图6d所示的硅锗SOI衬底，如上所述可从该衬底图形化硅锗FinFET基体。
图7描述了包含用于形成SOI MOSFET器件的较佳实施例、前文的替代例、以及其它替代例的流程。首先提供SOI衬底(80)。该SOI衬底包含有覆于电介质层上的半导体层。该半导体层最好为硅锗，而该电介质层最好为氧化硅锗或二氧化硅。接着将半导体层图形化以形成包括有源极和漏极区域以及其间延伸有沟道区域的FinFET基体(82)。然后将一层应变硅至少形成在沟道区域上(84)，但可额外地将应变硅形成在整个FinFET基体的表面。将栅极绝缘层至少形成在生长在FinFET基体的沟道区域上的应变硅上，以覆盖沟道区域上生长的应变硅(86)。栅极绝缘层可为从应变硅生长而来的氧化物或可沉积在应变硅上。形成导电栅极(88)。该栅极环绕着区域沟道的侧壁与上部分，并且通过栅极绝缘层以及应变硅层与沟道区域分开。如上述，可用该流程形成多种结构实施例，包括图4a-4c所示的单一器件、以及CMOS器件、具有多个区域沟道的器件、以及使用不同材料成分与材料层结构的器件。
另外，如本文中所述的结合应变硅的FinFET结构也可由替代方法所实施，如在半导体FinFET基体上生长硅锗层，或在硅FinFET基体中注入锗，接着在FinFET基体的表面上的硅锗晶格中生长应变硅。更进一步，可通过将碳注入硅FinFET基体的表面形成应变硅。所以，根据本发明的应变硅FinFET的特征通常为包括至少形成在FinFET基体的沟道区域上的应变硅层。通常，FinFET基体至少在其沟道区域的表面上包括一层硅锗。
在另外代替实施例中，可通过注入锗至支撑的氧化层中来扩展氧化层，以增加半导体层中的应力。在又一实施例中，可使用具有硅锗的晶格空隙的高k(高电介系数)材料作为栅极绝缘层，以给应变硅层中的应力提供额外的支持。
对本领域技术人员可轻易了解上述流程中的任务并不排除其它任务，而是根据将形成的特定结构可将另外的任务包括到上述的流程中。例如，如在处理任务之间的形成和去除钝化层或保护层的中间处理任务、形成与去除光刻胶掩膜和其它掩膜层、掺杂与反掺杂、清洁、平坦化、以及其它的任务，可与上述的特定任务一起执行。另外，不需要在一整片的衬底上如整个晶片上执行该工艺，也可在衬底某部分上选择性的执行。因此，虽然图中与上文所描述的实施例为最佳例子，但应了解到这些实施例仅为示意性的。本发明并不限于某特定实施例，而可延伸至落入本发明权利保护以及其均等物范围内的各种更改，合并，以及变形。

Claims (8)

1.一种绝缘体上硅金属氧化物半导体场效应晶体管器件，包括：
具有电介质层(40)的衬底；
形成在该电介质层(40)上的硅锗垂直双栅极场效应晶体管基体(46)，该垂直双栅极场效应晶体管基体(46)包括其中间延伸有沟道区域的源极和漏极区域；
一层应变硅(34)，至少形成在该垂直双栅极场效应晶体管基体的沟道区域表面上，该表面包含该沟道区域的侧壁以及顶部；
栅极绝缘层(36)，至少形成在该沟道区域上以覆盖形成于该沟道区域表面上的应变硅(34)；以及
导电栅极(48)，围绕着该沟道区域的侧壁以及顶部，并且通过该栅极绝缘层与该应变硅层将该导电栅极与该沟道区域分隔开。
2.如权利要求1所述的器件，其中该垂直双栅极场效应晶体管基体(46)包括第一垂直双栅极场效应晶体管基体，以及该器件中还包括：
第二硅锗垂直双栅极场效应晶体管基体，其形成在该电介质层上，该第二垂直双栅极场效应晶体管基体包括其中间延伸有第二沟道区域的第二源极和漏极区域；
一层应变硅，形成在该第二沟道区域表面上，该表面包含该第二沟道区域的侧壁以及顶部；
栅极绝缘层，至少形成在该第二沟道区域上以覆盖形成在该第二沟道区域表面上的应变硅；以及
第二导电栅极，围绕着该第二沟道区域的侧壁以及顶部，并且通过形成在该第二沟道区域上的该栅极绝缘层与该应变硅层将该第二导电栅极与该第二沟道区域分隔开，而且该第二导电栅极与围绕着该第一垂直双栅极场效应晶体管基体的沟道区域的导电栅极电性连接，
第一垂直双栅极场效应晶体管基体的源极和漏极掺杂第一掺杂物，并且第二垂直双栅极场效应晶体管基体的源极和漏极掺杂与第一掺杂物互补的第二掺杂物。
3.如权利要求1所述的器件，其中还包括形成在该导电栅极的侧壁上的间隔体。
4.一种形成绝缘体上硅金属氧化物半导体场效应晶体管器件的方法，包括：
提供包括覆盖在电介质层上的硅锗半导体层(42)的绝缘体上硅锗衬底(40)；
图形化该半导体层(42)以形成包括其中间延伸有第一沟道区域的源极和漏极区域的硅锗垂直双栅极场效应晶体管基体(46)；
至少在该第一沟道区域表面上形成一层应变硅(34)，该表面包含该第一沟道区域的侧壁以及顶部；
至少在生长在该第一沟道区域上的应变硅(34)上形成栅极绝缘层(36)，以覆盖该第一沟道区域上的应变硅(34)；以及
形成围绕着该沟道区域的侧壁以及顶部的导电栅极，并且通过该栅极绝缘层(36)和该应变硅层(34)将该导电栅极与该第一沟道区域分隔开。
5.如权利要求4所述的方法，其中该垂直双栅极场效应晶体管基体(46)包括第一垂直双栅极场效应晶体管基体，而且其中该方法还包括：
与该第一垂直双栅极场效应晶体管基体的图形化同时进行该半导体层的图形化，以形成包括其中间延伸有第二沟道区域的第二源极和漏极区域的第二硅锗垂直双栅极场效应晶体管基体；
与在该第一垂直双栅极场效应晶体管基体上生长应变硅层同时进行，至少在该第二垂直双栅极场效应晶体管基体的第二沟道区域表面上形成一层应变硅，该表面包含该第二沟道区域的侧壁以及顶部；
与在该第一垂直双栅极场效应晶体管基体上形成栅极绝缘层同时进行，至少在生长在该第二垂直双栅极场效应晶体管基体的第二沟道区域上的应变硅上形成栅极绝缘层，以覆盖生长在该第二沟道区域上的应变硅；以及
与在该第一垂直双栅极场效应晶体管基体上形成该导电栅极同时进行，形成围绕着该第二沟道区域的侧壁以及顶部的第二导电栅极，并且通过形成在该第二沟道区域上的该栅极绝缘层与该应变硅层将该第二导电栅极与该第二沟道区域分隔开，
其中第一垂直双栅极场效应晶体管基体的导电栅极和第二垂直双栅极场效应晶体管基体的导电栅极电性连接。
6.如权利要求5所述的方法，其中该垂直双栅极场效应晶体管基体(46)具有至少延伸于该源极和漏极区域之间的该第一和第二沟道区域。
7.如权利要求4所述的方法，其中提供包括覆盖在电介质层上的硅锗半导体层的绝缘体上硅锗衬底包括：
提供包括硅锗层的衬底；
将氧注入该硅锗层中；以及
将该衬底退火以在该硅锗层中形成埋入硅锗氧化物层。
8.如权利要求4所述的方法，其中提供包括覆盖在电介质层上的硅锗半导体层的绝缘体上硅锗衬底包括：
提供包括硅锗层的第一衬底；
将氢注入该硅锗层中以在硅锗层中形成富含氢的区域；
将该第一衬底粘接至第二衬底的氧化层；
将粘接的第一和第二衬底退火使第一衬底在富含氢的区域中断裂；以及
去除该第一衬底以形成具有粘接到该氧化层的硅锗层的第二衬底。
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