CN100435350C - High-dielectric coefficient grid dielectric material titanium aluminate film and preparing method thereof - Google Patents

Abstract

The present invention discloses a titanium aluminate thin film made of grid dielectric material with high dielectric coefficient and a manufacture method thereof. The thin film has a chemical formula: (TiO2)x(Al2O3)1-x, wherein x is greater than or equal to 0.1, but is smaller than or equal to 0.3. The thin film has the manufacture method that a pulse laser (1) is started; laser beams are focused on TAO ceramic target material (8) by pulse laser beams through a condenser lens (9); the TAO ceramic target material (8) is stripped by the pulse laser; the generated laser ion body is deposited on the silicon substrate material, and thus, a titanium aluminate thin film is manufactured. The physical thickness of the amorphous thin film is 5 nm, the thermodynamic stability is high, the dielectric constant is 17.8, the thickness of the equivalent oxide is 1.25 nm, the leakage current is 2.76*10<-4>A/cm<2>, and the boundary layer is the thickness of one to two atomic layers.

Description

High-dielectric coefficient grid dielectric material titanium aluminate film and preparation method thereof

One, technical field

The invention belongs to the microelectronic material field, specifically relate to be applied to high-dielectric coefficient grid dielectric material titanium aluminate film in the Metal-oxide-semicondutor field effect transistor (MOSFET) and preparation method thereof.

Two, background technology

In the silicon-based semiconductor integrated circuit, Metal-oxide-semicondutor field effect transistor (MOSFET) is the elementary cell that constitutes mnemon, microprocessor and logical circuit.The size of its volume is directly connected to the integrated level of very lagre scale integrated circuit (VLSIC).By famous Moore's Law, to double every the integrated level of 18 months integrated circuits.The prediction of the international semiconductor technology road figure (ITRS) that announces according to international semiconductor TIA in 1999 will be tending towards ripe to the photoetching technique of 2005 0.1 μ m, and among the corresponding M OSFET as the SiO of gate dielectric film ₂The thickness of layer will reduce to 1.0-1.5nm; And will reach 0.05 μ m to photoetching technique level in 2011, the SiO of corresponding equivalence ₂The thickness of gate dielectric film will reduce to 0.6-0.8nm.But showing, Quantum mechanical calculation works as SiO ₂When the thickness of gate dielectric film will reduce to 2nm, grid knot that tunnel effect causes and the leakage current between the silicon chip had promptly reached the degree that can not allow.In order to address this problem, must use material to replace existing SiO with higher dielectric coefficient and low-leakage current ₂Layer.This has become the bottleneck of restriction MOSFET integrated level raising in following 10 years, and has caused the very big concern and the extensive studies of various countries semiconductor educational circles and association area.People are accustomed to being equivalent to how thick SiO ₂The equivalent oxide thickness (EOT) of layer is described the thickness of high-dielectric coefficient grid dielectric layer (high-k gate dielectric), and its expression formula is:

$\mathrm{EOT}={\mathrm{<figure-callout\; id="2"\; label="t\; SiO"\; filenames="C20061003803000091.png"\; state="\{\{state\}\}">t</figure-callout>}}_{{\mathrm{SiO}}_{}}+t_{\mathrm{high}-k}\&times;\frac{{\mathrm{\&epsiv;}}_{{\mathrm{<figure-callout\; id="2"\; label="SiO"\; filenames="C20061003803000091.png"\; state="\{\{state\}\}">SiO</figure-callout>}}_2}}{{\mathrm{\&epsiv;}}_{\mathrm{high}-k}}$

Wherein

The SiO that causes for interfacial reaction ₂The thickness of layer, t _High-kBe the actual (real) thickness of high-dielectric coefficient dielectric layer,

And ε _High-kBe respectively SiO ₂The dielectric coefficient of layer and high-dielectric coefficient dielectric substance, wherein Be 3.9.In order to reduce leakage current, should make the actual (real) thickness of gate dielectric layer become big, but corresponding EOT also can increase.At this moment the approach that reduces EOT has two: one, selects for use the bigger material of dielectric coefficient as the gate dielectric membrane material; The 2nd, the SiO that try one's best minimizing and even elimination form at the interface ₂Layer.

The basic principle that present stage is sought high-dielectric coefficient grid dielectric material is:

(1) electrical properties: the broad stopband, cation valence is few, low defective and interface state density;

(2) dielectric property: high-dielectric coefficient (＞15), and more slow with temperature and frequency change, low-leakage current;

(3) thermal stability: can bear at least more than 800 ℃, 2 minutes short annealing heat treatment, preferably can bear the requirement (900-1000 ℃, 10-30 second) of traditional CMOS high-temperature post-treatment and keep can and SiO ₂The high heating power of analogy is learned stability;

(4) chemical property and Si substrate compatibility do not form or only form the SiO of one or two atomic layer at the interface ₂, compatible mutually with grid material, interfacial reaction does not take place, its preparation technology will with existing CMOS process compatible;

(5) thus for the defective that reduces gate dielectric film reduces leakage current, it is generally acknowledged that film is preferably epitaxy single-crystal film or amorphous film, the former preparation is difficulty comparatively, thereby amorphous film becomes object of greatest concern.

Many oxides such as ZrO ₂, HfO ₂, Ta ₂O ₅, TiO ₂, Al ₂O ₃Deng just being studied widely as candidate material.But they all can not satisfy alternative SiO fully ₂Whole requirements.TiO ₂Have higher dielectric constant (k ≈ 80), but because and between the Si less energy gap (1.2eV) cause its leakage current bigger, and its crystallization temperature lower (about～400 ℃); Yet Al ₂O ₃Have bigger energy gap (8.8eV), and thermal stability is preferably arranged between the Si, have higher crystallization temperature and low-down oxygen diffusion rate, but shortcoming is a dielectric coefficient less (K ≈ 8.9).Based on this, in conjunction with these two kinds of oxides advantage separately, preparation has the very titanium aluminate film of high chemical stability and medium dielectric constant.

Three, summary of the invention

1, goal of the invention

The objective of the invention is to prepare a kind of high-dielectric coefficient grid dielectric material (TiO ₂) _x(Al ₂O ₃) _1-xFilm.This material is under high vacuum under the low oxygen partial pressure condition, making the ultrathin membrane of thickness about 5nm on the silicon substrate, this film is an amorphous state, and has higher thermal stability, can bear the required The high temperature anneal more than 800 ℃ of CMOS technology and non-crystallization, its dielectric coefficient has variation by a small margin with the value difference of x.

2, technical scheme

A kind of high-dielectric coefficient grid dielectric material titanium aluminate film is characterized in that its chemical formula is (TiO ₂) _x(Al ₂O ₃) _1-x(being called for short TAO), wherein the span of x is 0.1≤x≤0.3.

A kind of preparation method who is applied to the grid dielectric material titanium aluminate film of Metal-oxide-semicondutor field effect transistor, it is characterized in that titanium aluminate film of the present invention is to utilize pulsed laser deposition technique, use the TAO ceramic target, under the high vacuum low oxygen partial pressure, prepare

Its preparation process is as follows:

(1) (TiO ₂) _x(Al ₂O ₃) _1-xThe preparation of ceramic target: with pure TiO ₂And Al ₂O ₃Powder is according to 1: 2-1: 9 mixed in molar ratio, through the abundant ball milling 24-36 of ball mill hour, mixed-powder is cold-pressed into the disk of Ф 22 * 4mm under 12-15Mpa pressure, in chamber type electric resistance furnace disk 1400-1600 ℃ of following sintering 68 hours, obtain the TAO ceramic target of fine and close white, standby;

(2) selection of backing material and processing: select n type Si (100), resistivity is 2-3 Ω cm, at first n type Si (100) substrate was put into acetone or absolute ethyl alcohol ultrasonic cleaning 3-5 minute, again with deionized water rinsing number time, use 1: 20 hydrofluoric acid solution of mol ratio to erode one deck SiO on the silicon chip surface then ₂, at last again in the absolute ethyl alcohol ultrasonic cleaning, it is standby that the back is dried in taking-up;

(3) the TAO ceramic target is placed on the target platform, silicon substrate material is put on the substrate table, and target platform and substrate table all are placed in the growth room;

(4) with vacuum pump vacuum in the growth room is extracted into 1.0 * 10 ^-1Pa starts molecular pump then, and growth room's internal pressure is extracted into 1.0 * 10 ^-5About Pa;

(5) with resistance furnace heated substrate platform, make silicon substrate material reach design temperature 300-700 ℃;

(6) starting impulse laser, pulse laser beam is focused on laser beam on the TAO ceramic target by condenser lens, peel off the TAO ceramic target with pulse laser, the lasing ion body that produces is deposited on the silicon substrate material and makes the TAO film, in film-forming process, target platform and substrate table rotate with constant 30-90 rev/min speed, are deposited on the silicon substrate equably to guarantee the laser beam plasma, thereby make the uniform film of thickness.

It is constant that the resistance furnace of above-mentioned steps (5) can keep under any temperature between 20-900 ℃, and the temperature of heating silicon substrate is 400 ℃.

The laser of above-mentioned steps (6) is a krypton fluoride excimer laser, wavelength 248nm, and pulse duration 20-30ns, single pulse energy 50-600mJ, energy density is 0-10J/cm ²

The TAO film that makes after tested, the physical thickness of this film is the amorphous film of 5nm, has higher thermodynamic stability, after 900 ℃ of short annealing heat treatment, still keep amorphous state, its dielectric constant is 17.8, and equivalent oxide thickness is 1.25nm, and leakage current is 2.76 * 10 ^-4A/cm ², boundary layer only is a 1-2 atomic layer level thickness.

The microstructure analysis instrument of film: X-ray diffraction analysis instrument, model are D/Max-RA

The electrical performance testing instrument of film: HP4294A impedance/phase analysis instrument and HP4140B skin peace/direct voltage source.

Below in conjunction with TAO film performance test result is further specified useful result of the present invention.

XRD spectra analysis explanation among Fig. 2, after through 900 ℃ of short annealing heat treatments, the TAO film still keeps amorphous; And after 1000 ℃ of annealing, (040) crystal face diffraction maximum of TAO film has appearred, show that film begins crystallization.

Fig. 3 is that physical thickness is the high resolution electron microscopy image of the TAO film of 5nm.As can be seen from the figure have the very thin transition zone of one deck between film and substrate, its thickness is about 0.76nm.

Fig. 4 is that the dielectric constant of TAO film and dielectric loss are with frequency variation curve.By measuring metal-insulator-metal type (MIM) capacitor arrangement of Pt/TAO/Pt, obtain under the 1MHz frequency, the dielectric constant of TAO film is 17.8, and dielectric loss is 0.05, and this is worth greater than SiO ₂And Al ₂O ₃Dielectric constant values (being respectively 3.9 and 8.9), satisfy the requirement of high-dielectric-coefficient grid medium material of future generation.

Fig. 5 and Fig. 6 show respectively and are grown in capacitance voltage (C-V) curve and current/voltage (J-V) curve of 5nm TAO film under different frequency on the n type silicon substrate.Sample is through high vacuum partial pressure of oxygen 9.0 * 10 ⁵The following 400 ℃ of annealing of Pa 20 minutes.The equivalent oxide thickness EOT that is calculated by C-V curve among Fig. 5 is 1.25nm.This value and do not have the low-k boundary layer fully by hypothesis between film and Si is utilized $\mathrm{EOT}=t_{\mathrm{high}-k}\&times;\frac{{\mathrm{\&epsiv;}}_{{\mathrm{<figure-callout\; id="2"\; label="SiO"\; filenames="C20061003803000091.png"\; state="\{\{state\}\}">SiO</figure-callout>}}_2}}{{\mathrm{\&epsiv;}}_{\mathrm{high}-k}}$ The equivalent oxide thickness value 1.09nm that calculates is bigger, and this shows between TAO film and the Si substrate and to have the boundary layer that is equivalent to one or two atomic layer level thickness.This proves that also Al can stop oxygen to diffuse into film effectively and forms thicker boundary layer in film.Fig. 6 shows that the thick leakage current density of TAO film under the gate voltage of 1V of 5nm is 2.76 * 10 ^-4A/cm ²This value is than the SiO with identical EOT value ₂The leakage current of film is little 6 orders of magnitude approximately.

The x-ray photoelectron that Fig. 7 obtained 400 ℃ of annealing for 5nm TAO film in 20 minutes can spectrogram.The spectrum peak that shows Ti2p, Al2p in the film among the figure is apparent in view, with they at TiO ₂And Al ₂O ₃In compare in conjunction with configuration, binding energy all has less moving, this shows that Ti atom and Al atom are not that the single form with oxide exists in the TAO film, and has new material to form.

3, useful result

Result by above-mentioned Micro-Structure Analysis and performance test to the TAO film can clearly be seen that the present invention compares with existing gate dielectric material, has tangible advantage.

The amorphous state TAO dielectric film of the present invention preparation has higher thermodynamic stability, can bear the required The high temperature anneal more than 800 ℃ of CMOS technology and non-crystallization can satisfy the requirement of the follow-up high-temperature heat treatment of current semi-conductor industry fully.The metal-insulator-metal type of Pt-TAO-Pt (MIM) capacitor arrangement that utilized this material preparation, the dielectric coefficient that records TAO is 17.8.Corresponding to physical thickness is that the measured equivalent oxide thickness of TAO film of 5nm is 1.25nm, and leakage current is 2.76 * 10 ^-4A/cm ²Forming between TAO film and Si substrate only is the boundary layer of one to two atomic layer level thickness, and its performance index have reached the higher level that grid medium with high dielectric Materials Research Laboratories that colleague in the world obtains reaches.

The present invention utilizes the method for pulsed laser deposition, adopts metal oxide TiO ₂And Al ₂O ₃For raw material preparing EOT value is not appeared in the newspapers in the world as yet less than 1.5nm TAO film.

Four, description of drawings

Fig. 1: the present invention is used to prepare the PLD film growth system structural representation of TAO film, 1-KrF excimer laser; 2-target platform; The 3-substrate table; 4-substrate heating resistor stove; The 5-intake valve; The 6-vent valve; The 7-growth room; The 8-TAO ceramic target; The 9-condenser lens.

Fig. 2: the TAO film is after underlayer temperature is 400 ℃ of growths, and through 800 ℃, 900 ℃ and 3 minutes measured XRD diffraction patterns of 1000 ℃ of quick thermal annealing process, wherein the x axle is 2 θ scanning angles (unit degree), and the y axle is represented intensity.

Fig. 3: physical thickness is that the TAO film of 5nm is respectively at 400 ℃, 500 ℃ and 3 minutes high resolution electron microscopy image of 600 ℃ of quick thermal annealing process.

Fig. 4: the dielectric constant of TAO film and dielectric loss are with frequency variation curve, and wherein the x axle is represented frequency (unit hertz), y (left side) axle expression dielectric constant (ε _r), y (right side) represents dielectric loss (tan δ).

Fig. 5: capacitance voltage (C-V) curve of TAO film under different frequency, wherein the x axle is represented grid voltage (unit volt), the y axle is represented electric capacity (unit is a pico farad).

Fig. 6: the current/voltage of TAO film (J-V) curve, wherein the x axle is represented grid voltage (unit volt), the y axle is represented leakage current density (unit is every square centimeter of an ampere).

Fig. 7: x-ray photoelectron power spectrum (XPS) curve of TAO film, wherein the x axle is represented atomic binding energy (unit electron-volt), the y axle is represented relative intensity.

Five, embodiment

With preparation Ti/Al atomic ratio is that 1: 5 TAO film is an example, and its preparation process is as follows:

(1) (TiO ₂) _x(Al ₂O ₃) _1-xThe preparation of ceramic target: with pure TiO ₂And Al ₂O ₃Powder was according to 1: 2.5 mixed in molar ratio, through the abundant ball milling of ball mill 24 hours, mixed-powder is cold-pressed into the disk of Ф 22 * 4mm under 15Mpa pressure, in chamber type electric resistance furnace disk 1400 ℃ of following sintering 7 hours, obtain the TAO ceramic target of fine and close white, standby;

(2) selection of backing material and processing: select n type Si (100), resistivity is 2-3 Ω cm.At first n type Si (100) substrate was put into acetone or absolute ethyl alcohol ultrasonic cleaning 3 minutes,, use 1: 20 hydrofluoric acid solution of mol ratio to erode one deck SiO on the silicon chip surface then again with deionized water rinsing number time ₂, at last again in the absolute ethyl alcohol ultrasonic cleaning, it is standby that the back is dried in taking-up;

(3) the TAO ceramic target is placed on the target platform, silicon substrate material is put on the substrate table, and target platform and substrate table all are placed in the growth room;

(4) with vacuum pump vacuum in the growth room is extracted into 1.0 * 10 ^-1Pa starts molecular pump then, and growth room's internal pressure is extracted into 1.0 * 10 ^-5About Pa;

(5) with resistance furnace heated substrate platform, make silicon substrate material reach 400 ℃ of design temperatures;

(6) starting impulse laser, pulse laser beam is focused on laser beam on the TAO ceramic target by condenser lens, peel off the TAO ceramic target with pulse laser, the lasing ion body that produces is deposited on the silicon substrate material and makes the TAO film, in film-forming process, target platform and substrate table are deposited on the silicon substrate equably to guarantee the laser beam plasma, thereby make the uniform film of thickness with 60 rev/mins of constant speed rotations.

Claims (3)

1, a kind of preparation method who is applied to the grid dielectric material titanium aluminate film of Metal-oxide-semicondutor field effect transistor, it is characterized in that titanium aluminate film is to utilize pulsed laser deposition technique, use the TAO ceramic target, prepare under the high vacuum low oxygen partial pressure, its preparation process is as follows:

A, (TiO ₂) _x(Al ₂O ₃) _1-xThe preparation of ceramic target: with pure TiO ₂And Al ₂O ₃Powder is according to 1: 2-1: 9 mixed in molar ratio, through the abundant ball milling of ball mill, mixed-powder is cold-pressed into disk, and in chamber type electric resistance furnace,, obtain the TAO ceramic target (8) of fine and close white the disk sintering, standby;

The selection of B, backing material and processing: select n type Si (100), at first n type Si (100) substrate is put into acetone or absolute ethyl alcohol ultrasonic cleaning, use deionized water rinsing again, erode one deck SiO on the silicon chip surface with hydrofluoric acid solution then ₂, at last again in the absolute ethyl alcohol ultrasonic cleaning, it is standby that the back is dried in taking-up;

C, TAO ceramic target (8) is placed on the target platform (2), silicon substrate material is put on the substrate table (3), and target platform (2) and substrate table (3) all are placed in the growth room (7);

D, the interior vacuum in growth room (7) is extracted into 1.0 * 10 after connecting vent valve (6) with vacuum pump ^-1Pa starts molecular pump then, and growth room (7) internal pressure is extracted into 1.0 * 10 ^-5Pa;

E, usefulness resistance furnace (4) heated substrate platform (3) make silicon substrate material reach design temperature 300-700 ℃;

F, starting impulse laser (1), making pulse laser beam pass through condenser lens (9) focuses on laser beam on the TAO ceramic target (8), peel off TAO ceramic target (8) with pulse laser, the laser beam that produces is plasma-deposited on silicon substrate material and make the TAO film, in film-forming process, target platform (2) and substrate table

(3) with constant 30-90 rev/min speed rotation, be deposited on the silicon substrate equably to guarantee the laser beam plasma, thereby make the uniform film of thickness.

2, the preparation method of titanium aluminate film according to claim 1 is characterized in that the resistance furnace in above-mentioned steps E can keep constant under any temperature between 20-900 ℃, and the temperature of heating silicon substrate is 400 ℃.

3, the preparation method of titanium aluminate film according to claim 1, it is characterized in that the laser in above-mentioned steps F is a krypton fluoride excimer laser, its wavelength 248nm, pulse duration 20-30ns, single pulse energy 50-600mJ, energy density is 0-10J/cm ²

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